Lines Matching +full:avg +full:- +full:samples
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
14 #include <linux/clk-provider.h>
25 #include <linux/atmel-isc-media.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-event.h>
30 #include <media/v4l2-image-sizes.h>
31 #include <media/v4l2-ioctl.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
34 #include <media/videobuf2-dma-contig.h>
36 #include "atmel-isc-regs.h"
37 #include "atmel-isc.h"
41 MODULE_PARM_DESC(debug, "debug level (0-2)");
46 "Sensor is preferred to output the specified format (1-on 0-off), default 1");
57 struct isc_ctrls *ctrls = &isc->ctrls; in isc_update_v4l2_ctrls()
60 v4l2_ctrl_s_ctrl(isc->r_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()
61 v4l2_ctrl_s_ctrl(isc->b_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_B]); in isc_update_v4l2_ctrls()
62 v4l2_ctrl_s_ctrl(isc->gr_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_GR]); in isc_update_v4l2_ctrls()
63 v4l2_ctrl_s_ctrl(isc->gb_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_GB]); in isc_update_v4l2_ctrls()
65 v4l2_ctrl_s_ctrl(isc->r_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()
66 v4l2_ctrl_s_ctrl(isc->b_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_B]); in isc_update_v4l2_ctrls()
67 v4l2_ctrl_s_ctrl(isc->gr_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_GR]); in isc_update_v4l2_ctrls()
68 v4l2_ctrl_s_ctrl(isc->gb_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_GB]); in isc_update_v4l2_ctrls()
73 struct isc_ctrls *ctrls = &isc->ctrls; in isc_update_awb_ctrls()
77 regmap_write(isc->regmap, ISC_WB_O_RGR, in isc_update_awb_ctrls()
78 ((ctrls->offset[ISC_HIS_CFG_MODE_R])) | in isc_update_awb_ctrls()
79 ((ctrls->offset[ISC_HIS_CFG_MODE_GR]) << 16)); in isc_update_awb_ctrls()
80 regmap_write(isc->regmap, ISC_WB_O_BGB, in isc_update_awb_ctrls()
81 ((ctrls->offset[ISC_HIS_CFG_MODE_B])) | in isc_update_awb_ctrls()
82 ((ctrls->offset[ISC_HIS_CFG_MODE_GB]) << 16)); in isc_update_awb_ctrls()
83 regmap_write(isc->regmap, ISC_WB_G_RGR, in isc_update_awb_ctrls()
84 ctrls->gain[ISC_HIS_CFG_MODE_R] | in isc_update_awb_ctrls()
85 (ctrls->gain[ISC_HIS_CFG_MODE_GR] << 16)); in isc_update_awb_ctrls()
86 regmap_write(isc->regmap, ISC_WB_G_BGB, in isc_update_awb_ctrls()
87 ctrls->gain[ISC_HIS_CFG_MODE_B] | in isc_update_awb_ctrls()
88 (ctrls->gain[ISC_HIS_CFG_MODE_GB] << 16)); in isc_update_awb_ctrls()
97 isc->ctrls.gain[c] = 1 << 9; in isc_reset_awb_ctrls()
99 isc->ctrls.offset[c] = 0; in isc_reset_awb_ctrls()
106 struct regmap *regmap = isc_clk->regmap; in isc_wait_clk_stable()
118 return -ETIMEDOUT; in isc_wait_clk_stable()
126 if (isc_clk->id == ISC_ISPCK) { in isc_clk_prepare()
127 ret = pm_runtime_resume_and_get(isc_clk->dev); in isc_clk_prepare()
141 if (isc_clk->id == ISC_ISPCK) in isc_clk_unprepare()
142 pm_runtime_put_sync(isc_clk->dev); in isc_clk_unprepare()
148 u32 id = isc_clk->id; in isc_clk_enable()
149 struct regmap *regmap = isc_clk->regmap; in isc_clk_enable()
153 dev_dbg(isc_clk->dev, "ISC CLK: %s, id = %d, div = %d, parent id = %d\n", in isc_clk_enable()
154 __func__, id, isc_clk->div, isc_clk->parent_id); in isc_clk_enable()
156 spin_lock_irqsave(&isc_clk->lock, flags); in isc_clk_enable()
159 (isc_clk->div << ISC_CLKCFG_DIV_SHIFT(id)) | in isc_clk_enable()
160 (isc_clk->parent_id << ISC_CLKCFG_SEL_SHIFT(id))); in isc_clk_enable()
163 spin_unlock_irqrestore(&isc_clk->lock, flags); in isc_clk_enable()
169 return -EINVAL; in isc_clk_enable()
175 u32 id = isc_clk->id; in isc_clk_disable()
178 spin_lock_irqsave(&isc_clk->lock, flags); in isc_clk_disable()
179 regmap_write(isc_clk->regmap, ISC_CLKDIS, ISC_CLK(id)); in isc_clk_disable()
180 spin_unlock_irqrestore(&isc_clk->lock, flags); in isc_clk_disable()
189 if (isc_clk->id == ISC_ISPCK) { in isc_clk_is_enabled()
190 ret = pm_runtime_resume_and_get(isc_clk->dev); in isc_clk_is_enabled()
195 regmap_read(isc_clk->regmap, ISC_CLKSR, &status); in isc_clk_is_enabled()
197 if (isc_clk->id == ISC_ISPCK) in isc_clk_is_enabled()
198 pm_runtime_put_sync(isc_clk->dev); in isc_clk_is_enabled()
200 return status & ISC_CLK(isc_clk->id) ? 1 : 0; in isc_clk_is_enabled()
208 return DIV_ROUND_CLOSEST(parent_rate, isc_clk->div + 1); in isc_clk_recalc_rate()
215 long best_rate = -EINVAL; in isc_clk_determine_rate()
216 int best_diff = -1; in isc_clk_determine_rate()
236 diff = abs(req->rate - rate); in isc_clk_determine_rate()
241 req->best_parent_rate = parent_rate; in isc_clk_determine_rate()
242 req->best_parent_hw = parent; in isc_clk_determine_rate()
245 if (!best_diff || rate < req->rate) in isc_clk_determine_rate()
253 dev_dbg(isc_clk->dev, in isc_clk_determine_rate()
256 __clk_get_name((req->best_parent_hw)->clk), in isc_clk_determine_rate()
257 req->best_parent_rate); in isc_clk_determine_rate()
262 req->rate = best_rate; in isc_clk_determine_rate()
272 return -EINVAL; in isc_clk_set_parent()
274 isc_clk->parent_id = index; in isc_clk_set_parent()
283 return isc_clk->parent_id; in isc_clk_get_parent()
294 return -EINVAL; in isc_clk_set_rate()
298 return -EINVAL; in isc_clk_set_rate()
300 isc_clk->div = div - 1; in isc_clk_set_rate()
320 struct regmap *regmap = isc->regmap; in isc_clk_register()
321 struct device_node *np = isc->dev->of_node; in isc_clk_register()
324 const char *clk_name = np->name; in isc_clk_register()
330 return -EINVAL; in isc_clk_register()
338 of_property_read_string(np, "clock-output-names", &clk_name); in isc_clk_register()
340 clk_name = "isc-ispck"; in isc_clk_register()
348 isc_clk = &isc->isc_clks[id]; in isc_clk_register()
349 isc_clk->hw.init = &init; in isc_clk_register()
350 isc_clk->regmap = regmap; in isc_clk_register()
351 isc_clk->id = id; in isc_clk_register()
352 isc_clk->dev = isc->dev; in isc_clk_register()
353 spin_lock_init(&isc_clk->lock); in isc_clk_register()
355 isc_clk->clk = clk_register(isc->dev, &isc_clk->hw); in isc_clk_register()
356 if (IS_ERR(isc_clk->clk)) { in isc_clk_register()
357 dev_err(isc->dev, "%s: clock register fail\n", clk_name); in isc_clk_register()
358 return PTR_ERR(isc_clk->clk); in isc_clk_register()
360 of_clk_add_provider(np, of_clk_src_simple_get, isc_clk->clk); in isc_clk_register()
370 for (i = 0; i < ARRAY_SIZE(isc->isc_clks); i++) in isc_clk_init()
371 isc->isc_clks[i].clk = ERR_PTR(-EINVAL); in isc_clk_init()
373 for (i = 0; i < ARRAY_SIZE(isc->isc_clks); i++) { in isc_clk_init()
387 of_clk_del_provider(isc->dev->of_node); in isc_clk_cleanup()
389 for (i = 0; i < ARRAY_SIZE(isc->isc_clks); i++) { in isc_clk_cleanup()
390 struct isc_clk *isc_clk = &isc->isc_clks[i]; in isc_clk_cleanup()
392 if (!IS_ERR(isc_clk->clk)) in isc_clk_cleanup()
393 clk_unregister(isc_clk->clk); in isc_clk_cleanup()
403 unsigned int size = isc->fmt.fmt.pix.sizeimage; in isc_queue_setup()
406 return sizes[0] < size ? -EINVAL : 0; in isc_queue_setup()
417 struct isc_device *isc = vb2_get_drv_priv(vb->vb2_queue); in isc_buffer_prepare()
418 unsigned long size = isc->fmt.fmt.pix.sizeimage; in isc_buffer_prepare()
421 v4l2_err(&isc->v4l2_dev, "buffer too small (%lu < %lu)\n", in isc_buffer_prepare()
423 return -EINVAL; in isc_buffer_prepare()
428 vbuf->field = isc->fmt.fmt.pix.field; in isc_buffer_prepare()
435 struct regmap *regmap = isc->regmap; in isc_start_dma()
436 u32 sizeimage = isc->fmt.fmt.pix.sizeimage; in isc_start_dma()
441 h = isc->fmt.fmt.pix.height; in isc_start_dma()
442 w = isc->fmt.fmt.pix.width; in isc_start_dma()
445 * In case the sensor is not RAW, it will output a pixel (12-16 bits) in isc_start_dma()
446 * with two samples on the ISC Data bus (which is 8-12) in isc_start_dma()
448 * by two, to get the real number of samples for the required pixels. in isc_start_dma()
450 if (!ISC_IS_FORMAT_RAW(isc->config.sd_format->mbus_code)) { in isc_start_dma()
464 (ISC_PFE_CFG1_COLMAX(w - 1) & ISC_PFE_CFG1_COLMAX_MASK)); in isc_start_dma()
468 (ISC_PFE_CFG2_ROWMAX(h - 1) & ISC_PFE_CFG2_ROWMAX_MASK)); in isc_start_dma()
474 addr0 = vb2_dma_contig_plane_dma_addr(&isc->cur_frm->vb.vb2_buf, 0); in isc_start_dma()
475 regmap_write(regmap, ISC_DAD0 + isc->offsets.dma, addr0); in isc_start_dma()
477 switch (isc->config.fourcc) { in isc_start_dma()
479 regmap_write(regmap, ISC_DAD1 + isc->offsets.dma, in isc_start_dma()
481 regmap_write(regmap, ISC_DAD2 + isc->offsets.dma, in isc_start_dma()
485 regmap_write(regmap, ISC_DAD1 + isc->offsets.dma, in isc_start_dma()
487 regmap_write(regmap, ISC_DAD2 + isc->offsets.dma, in isc_start_dma()
494 dctrl_dview = isc->config.dctrl_dview; in isc_start_dma()
496 regmap_write(regmap, ISC_DCTRL + isc->offsets.dma, in isc_start_dma()
498 spin_lock(&isc->awb_lock); in isc_start_dma()
500 spin_unlock(&isc->awb_lock); in isc_start_dma()
505 struct regmap *regmap = isc->regmap; in isc_set_pipeline()
506 struct isc_ctrls *ctrls = &isc->ctrls; in isc_set_pipeline()
511 /* WB-->CFA-->CC-->GAM-->CSC-->CBC-->SUB422-->SUB420 */ in isc_set_pipeline()
514 regmap_field_write(isc->pipeline[i], val); in isc_set_pipeline()
520 bay_cfg = isc->config.sd_format->cfa_baycfg; in isc_set_pipeline()
528 gamma = &isc->gamma_table[ctrls->gamma_index][0]; in isc_set_pipeline()
533 isc->config_dpc(isc); in isc_set_pipeline()
534 isc->config_csc(isc); in isc_set_pipeline()
535 isc->config_cbc(isc); in isc_set_pipeline()
536 isc->config_cc(isc); in isc_set_pipeline()
537 isc->config_gam(isc); in isc_set_pipeline()
542 struct regmap *regmap = isc->regmap; in isc_update_profile()
549 while ((sr & ISC_CTRL_UPPRO) && counter--) { in isc_update_profile()
555 v4l2_warn(&isc->v4l2_dev, "Time out to update profile\n"); in isc_update_profile()
556 return -ETIMEDOUT; in isc_update_profile()
564 struct regmap *regmap = isc->regmap; in isc_set_histogram()
565 struct isc_ctrls *ctrls = &isc->ctrls; in isc_set_histogram()
568 regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, in isc_set_histogram()
570 (isc->config.sd_format->cfa_baycfg in isc_set_histogram()
573 regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, in isc_set_histogram()
576 ctrls->hist_id = ISC_HIS_CFG_MODE_GR; in isc_set_histogram()
580 ctrls->hist_stat = HIST_ENABLED; in isc_set_histogram()
583 regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, in isc_set_histogram()
586 ctrls->hist_stat = HIST_DISABLED; in isc_set_histogram()
592 struct regmap *regmap = isc->regmap; in isc_configure()
594 struct isc_subdev_entity *subdev = isc->current_subdev; in isc_configure()
596 pfe_cfg0 = isc->config.sd_format->pfe_cfg0_bps; in isc_configure()
597 pipeline = isc->config.bits_pipeline; in isc_configure()
599 dcfg = isc->config.dcfg_imode | isc->dcfg; in isc_configure()
601 pfe_cfg0 |= subdev->pfe_cfg0 | ISC_PFE_CFG0_MODE_PROGRESSIVE; in isc_configure()
609 isc->config_rlp(isc); in isc_configure()
611 regmap_write(regmap, ISC_DCFG + isc->offsets.dma, dcfg); in isc_configure()
620 if (isc->ctrls.awb && in isc_configure()
621 ISC_IS_FORMAT_RAW(isc->config.sd_format->mbus_code)) in isc_configure()
633 struct regmap *regmap = isc->regmap; in isc_start_streaming()
639 ret = v4l2_subdev_call(isc->current_subdev->sd, video, s_stream, 1); in isc_start_streaming()
640 if (ret && ret != -ENOIOCTLCMD) { in isc_start_streaming()
641 v4l2_err(&isc->v4l2_dev, "stream on failed in subdev %d\n", in isc_start_streaming()
646 ret = pm_runtime_resume_and_get(isc->dev); in isc_start_streaming()
648 v4l2_err(&isc->v4l2_dev, "RPM resume failed in subdev %d\n", in isc_start_streaming()
660 spin_lock_irqsave(&isc->dma_queue_lock, flags); in isc_start_streaming()
662 isc->sequence = 0; in isc_start_streaming()
663 isc->stop = false; in isc_start_streaming()
664 reinit_completion(&isc->comp); in isc_start_streaming()
666 isc->cur_frm = list_first_entry(&isc->dma_queue, in isc_start_streaming()
668 list_del(&isc->cur_frm->list); in isc_start_streaming()
672 spin_unlock_irqrestore(&isc->dma_queue_lock, flags); in isc_start_streaming()
674 /* if we streaming from RAW, we can do one-shot white balance adj */ in isc_start_streaming()
675 if (ISC_IS_FORMAT_RAW(isc->config.sd_format->mbus_code)) in isc_start_streaming()
676 v4l2_ctrl_activate(isc->do_wb_ctrl, true); in isc_start_streaming()
681 pm_runtime_put_sync(isc->dev); in isc_start_streaming()
683 v4l2_subdev_call(isc->current_subdev->sd, video, s_stream, 0); in isc_start_streaming()
686 spin_lock_irqsave(&isc->dma_queue_lock, flags); in isc_start_streaming()
687 list_for_each_entry(buf, &isc->dma_queue, list) in isc_start_streaming()
688 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); in isc_start_streaming()
689 INIT_LIST_HEAD(&isc->dma_queue); in isc_start_streaming()
690 spin_unlock_irqrestore(&isc->dma_queue_lock, flags); in isc_start_streaming()
702 v4l2_ctrl_activate(isc->do_wb_ctrl, false); in isc_stop_streaming()
704 isc->stop = true; in isc_stop_streaming()
707 if (isc->cur_frm && !wait_for_completion_timeout(&isc->comp, 5 * HZ)) in isc_stop_streaming()
708 v4l2_err(&isc->v4l2_dev, in isc_stop_streaming()
712 regmap_write(isc->regmap, ISC_INTDIS, ISC_INT_DDONE); in isc_stop_streaming()
714 pm_runtime_put_sync(isc->dev); in isc_stop_streaming()
717 ret = v4l2_subdev_call(isc->current_subdev->sd, video, s_stream, 0); in isc_stop_streaming()
718 if (ret && ret != -ENOIOCTLCMD) in isc_stop_streaming()
719 v4l2_err(&isc->v4l2_dev, "stream off failed in subdev\n"); in isc_stop_streaming()
722 spin_lock_irqsave(&isc->dma_queue_lock, flags); in isc_stop_streaming()
723 if (unlikely(isc->cur_frm)) { in isc_stop_streaming()
724 vb2_buffer_done(&isc->cur_frm->vb.vb2_buf, in isc_stop_streaming()
726 isc->cur_frm = NULL; in isc_stop_streaming()
728 list_for_each_entry(buf, &isc->dma_queue, list) in isc_stop_streaming()
729 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); in isc_stop_streaming()
730 INIT_LIST_HEAD(&isc->dma_queue); in isc_stop_streaming()
731 spin_unlock_irqrestore(&isc->dma_queue_lock, flags); in isc_stop_streaming()
738 struct isc_device *isc = vb2_get_drv_priv(vb->vb2_queue); in isc_buffer_queue()
741 spin_lock_irqsave(&isc->dma_queue_lock, flags); in isc_buffer_queue()
742 if (!isc->cur_frm && list_empty(&isc->dma_queue) && in isc_buffer_queue()
743 vb2_is_streaming(vb->vb2_queue)) { in isc_buffer_queue()
744 isc->cur_frm = buf; in isc_buffer_queue()
747 list_add_tail(&buf->list, &isc->dma_queue); in isc_buffer_queue()
748 spin_unlock_irqrestore(&isc->dma_queue_lock, flags); in isc_buffer_queue()
754 unsigned int num_formats = isc->num_user_formats; in find_format_by_fourcc()
759 fmt = isc->user_formats[i]; in find_format_by_fourcc()
760 if (fmt->fourcc == fourcc) in find_format_by_fourcc()
782 strscpy(cap->driver, "microchip-isc", sizeof(cap->driver)); in isc_querycap()
783 strscpy(cap->card, "Atmel Image Sensor Controller", sizeof(cap->card)); in isc_querycap()
784 snprintf(cap->bus_info, sizeof(cap->bus_info), in isc_querycap()
785 "platform:%s", isc->v4l2_dev.name); in isc_querycap()
794 u32 index = f->index; in isc_enum_fmt_vid_cap()
797 if (index < isc->controller_formats_size) { in isc_enum_fmt_vid_cap()
798 f->pixelformat = isc->controller_formats[index].fourcc; in isc_enum_fmt_vid_cap()
802 index -= isc->controller_formats_size; in isc_enum_fmt_vid_cap()
806 for (i = 0; i < isc->formats_list_size; i++) { in isc_enum_fmt_vid_cap()
807 if (!ISC_IS_FORMAT_RAW(isc->formats_list[i].mbus_code) || in isc_enum_fmt_vid_cap()
808 !isc->formats_list[i].sd_support) in isc_enum_fmt_vid_cap()
811 f->pixelformat = isc->formats_list[i].fourcc; in isc_enum_fmt_vid_cap()
817 return -EINVAL; in isc_enum_fmt_vid_cap()
825 *fmt = isc->fmt; in isc_g_fmt_vid_cap()
840 switch (isc->try_config.fourcc) { in isc_try_validate_formats()
882 ret = -EINVAL; in isc_try_validate_formats()
884 v4l2_dbg(1, debug, &isc->v4l2_dev, in isc_try_validate_formats()
889 if ((bayer) && !ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) in isc_try_validate_formats()
890 return -EINVAL; in isc_try_validate_formats()
893 if (grey && !ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code) && in isc_try_validate_formats()
894 !ISC_IS_FORMAT_GREY(isc->try_config.sd_format->mbus_code)) in isc_try_validate_formats()
895 return -EINVAL; in isc_try_validate_formats()
907 isc->try_config.rlp_cfg_mode = 0; in isc_try_configure_rlp_dma()
909 switch (isc->try_config.fourcc) { in isc_try_configure_rlp_dma()
914 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DAT8; in isc_try_configure_rlp_dma()
915 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED8; in isc_try_configure_rlp_dma()
916 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
917 isc->try_config.bpp = 8; in isc_try_configure_rlp_dma()
923 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DAT10; in isc_try_configure_rlp_dma()
924 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
925 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
926 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
932 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DAT12; in isc_try_configure_rlp_dma()
933 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
934 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
935 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
938 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_RGB565; in isc_try_configure_rlp_dma()
939 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
940 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
941 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
944 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_ARGB444; in isc_try_configure_rlp_dma()
945 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
946 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
947 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
950 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_ARGB555; in isc_try_configure_rlp_dma()
951 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
952 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
953 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
957 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_ARGB32; in isc_try_configure_rlp_dma()
958 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; in isc_try_configure_rlp_dma()
959 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
960 isc->try_config.bpp = 32; in isc_try_configure_rlp_dma()
963 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YYCC; in isc_try_configure_rlp_dma()
964 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_YC420P; in isc_try_configure_rlp_dma()
965 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PLANAR; in isc_try_configure_rlp_dma()
966 isc->try_config.bpp = 12; in isc_try_configure_rlp_dma()
969 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YYCC; in isc_try_configure_rlp_dma()
970 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_YC422P; in isc_try_configure_rlp_dma()
971 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PLANAR; in isc_try_configure_rlp_dma()
972 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
975 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_YUYV; in isc_try_configure_rlp_dma()
976 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; in isc_try_configure_rlp_dma()
977 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
978 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
981 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_UYVY; in isc_try_configure_rlp_dma()
982 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; in isc_try_configure_rlp_dma()
983 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
984 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
987 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_VYUY; in isc_try_configure_rlp_dma()
988 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; in isc_try_configure_rlp_dma()
989 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
990 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
993 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY8; in isc_try_configure_rlp_dma()
994 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED8; in isc_try_configure_rlp_dma()
995 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
996 isc->try_config.bpp = 8; in isc_try_configure_rlp_dma()
999 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY10 | ISC_RLP_CFG_LSH; in isc_try_configure_rlp_dma()
1002 isc->try_config.rlp_cfg_mode |= ISC_RLP_CFG_MODE_DATY10; in isc_try_configure_rlp_dma()
1003 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; in isc_try_configure_rlp_dma()
1004 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
1005 isc->try_config.bpp = 16; in isc_try_configure_rlp_dma()
1008 return -EINVAL; in isc_try_configure_rlp_dma()
1012 isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DAT8; in isc_try_configure_rlp_dma()
1013 isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED8; in isc_try_configure_rlp_dma()
1014 isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; in isc_try_configure_rlp_dma()
1027 switch (isc->try_config.fourcc) { in isc_try_configure_pipeline()
1034 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { in isc_try_configure_pipeline()
1035 isc->try_config.bits_pipeline = CFA_ENABLE | in isc_try_configure_pipeline()
1039 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1044 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { in isc_try_configure_pipeline()
1045 isc->try_config.bits_pipeline = CFA_ENABLE | in isc_try_configure_pipeline()
1050 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1055 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { in isc_try_configure_pipeline()
1056 isc->try_config.bits_pipeline = CFA_ENABLE | in isc_try_configure_pipeline()
1060 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1067 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { in isc_try_configure_pipeline()
1068 isc->try_config.bits_pipeline = CFA_ENABLE | in isc_try_configure_pipeline()
1072 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1078 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { in isc_try_configure_pipeline()
1079 isc->try_config.bits_pipeline = CFA_ENABLE | in isc_try_configure_pipeline()
1083 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1087 if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) in isc_try_configure_pipeline()
1088 isc->try_config.bits_pipeline = WB_ENABLE | DPC_BLCENABLE; in isc_try_configure_pipeline()
1090 isc->try_config.bits_pipeline = 0x0; in isc_try_configure_pipeline()
1094 isc->adapt_pipeline(isc); in isc_try_configure_pipeline()
1109 if (!isc->try_config.sd_format) in isc_try_fse()
1112 fse.code = isc->try_config.sd_format->mbus_code; in isc_try_fse()
1115 ret = v4l2_subdev_call(isc->current_subdev->sd, pad, enum_frame_size, in isc_try_fse()
1122 sd_state->pads->try_crop.width = isc->max_width; in isc_try_fse()
1123 sd_state->pads->try_crop.height = isc->max_height; in isc_try_fse()
1125 sd_state->pads->try_crop.width = fse.max_width; in isc_try_fse()
1126 sd_state->pads->try_crop.height = fse.max_height; in isc_try_fse()
1135 struct v4l2_pix_format *pixfmt = &f->fmt.pix; in isc_try_fmt()
1147 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) in isc_try_fmt()
1148 return -EINVAL; in isc_try_fmt()
1151 for (i = 0; i < isc->num_user_formats; i++) { in isc_try_fmt()
1152 if (ISC_IS_FORMAT_RAW(isc->user_formats[i]->mbus_code)) { in isc_try_fmt()
1153 sd_fmt = isc->user_formats[i]; in isc_try_fmt()
1160 direct_fmt = find_format_by_fourcc(isc, pixfmt->pixelformat); in isc_try_fmt()
1183 sd_fmt = isc->user_formats[isc->num_user_formats - 1]; in isc_try_fmt()
1184 v4l2_dbg(1, debug, &isc->v4l2_dev, in isc_try_fmt()
1186 (char *)&pixfmt->pixelformat, (char *)&sd_fmt->fourcc); in isc_try_fmt()
1190 ret = -EINVAL; in isc_try_fmt()
1195 v4l2_dbg(1, debug, &isc->v4l2_dev, in isc_try_fmt()
1197 (char *)&sd_fmt->fourcc); in isc_try_fmt()
1200 isc->try_config.sd_format = sd_fmt; in isc_try_fmt()
1203 if (pixfmt->width > isc->max_width) in isc_try_fmt()
1204 pixfmt->width = isc->max_width; in isc_try_fmt()
1205 if (pixfmt->height > isc->max_height) in isc_try_fmt()
1206 pixfmt->height = isc->max_height; in isc_try_fmt()
1210 * The pixels will be transferred in this format Sensor -> ISC in isc_try_fmt()
1212 mbus_code = sd_fmt->mbus_code; in isc_try_fmt()
1218 isc->try_config.fourcc = pixfmt->pixelformat; in isc_try_fmt()
1221 pixfmt->pixelformat = isc->try_config.fourcc = sd_fmt->fourcc; in isc_try_fmt()
1222 /* Re-try to validate the new format */ in isc_try_fmt()
1240 ret = v4l2_subdev_call(isc->current_subdev->sd, pad, set_fmt, in isc_try_fmt()
1248 if (pixfmt->width > isc->max_width) in isc_try_fmt()
1249 pixfmt->width = isc->max_width; in isc_try_fmt()
1250 if (pixfmt->height > isc->max_height) in isc_try_fmt()
1251 pixfmt->height = isc->max_height; in isc_try_fmt()
1253 pixfmt->field = V4L2_FIELD_NONE; in isc_try_fmt()
1254 pixfmt->bytesperline = (pixfmt->width * isc->try_config.bpp) >> 3; in isc_try_fmt()
1255 pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; in isc_try_fmt()
1263 v4l2_err(&isc->v4l2_dev, "Could not find any possible format for a working pipeline\n"); in isc_try_fmt()
1265 memset(&isc->try_config, 0, sizeof(isc->try_config)); in isc_try_fmt()
1282 v4l2_fill_mbus_format(&format.format, &f->fmt.pix, mbus_code); in isc_set_fmt()
1283 ret = v4l2_subdev_call(isc->current_subdev->sd, pad, in isc_set_fmt()
1289 if (f->fmt.pix.width > isc->max_width) in isc_set_fmt()
1290 f->fmt.pix.width = isc->max_width; in isc_set_fmt()
1291 if (f->fmt.pix.height > isc->max_height) in isc_set_fmt()
1292 f->fmt.pix.height = isc->max_height; in isc_set_fmt()
1294 isc->fmt = *f; in isc_set_fmt()
1296 if (isc->try_config.sd_format && isc->config.sd_format && in isc_set_fmt()
1297 isc->try_config.sd_format != isc->config.sd_format) { in isc_set_fmt()
1298 isc->ctrls.hist_stat = HIST_INIT; in isc_set_fmt()
1303 isc->config = isc->try_config; in isc_set_fmt()
1305 v4l2_dbg(1, debug, &isc->v4l2_dev, "New ISC configuration in place\n"); in isc_set_fmt()
1315 if (vb2_is_streaming(&isc->vb2_vidq)) in isc_s_fmt_vid_cap()
1316 return -EBUSY; in isc_s_fmt_vid_cap()
1332 if (inp->index != 0) in isc_enum_input()
1333 return -EINVAL; in isc_enum_input()
1335 inp->type = V4L2_INPUT_TYPE_CAMERA; in isc_enum_input()
1336 inp->std = 0; in isc_enum_input()
1337 strscpy(inp->name, "Camera", sizeof(inp->name)); in isc_enum_input()
1352 return -EINVAL; in isc_s_input()
1361 return v4l2_g_parm_cap(video_devdata(file), isc->current_subdev->sd, a); in isc_g_parm()
1368 return v4l2_s_parm_cap(video_devdata(file), isc->current_subdev->sd, a); in isc_s_parm()
1376 .code = isc->config.sd_format->mbus_code, in isc_enum_framesizes()
1377 .index = fsize->index, in isc_enum_framesizes()
1380 int ret = -EINVAL; in isc_enum_framesizes()
1383 for (i = 0; i < isc->num_user_formats; i++) in isc_enum_framesizes()
1384 if (isc->user_formats[i]->fourcc == fsize->pixel_format) in isc_enum_framesizes()
1387 for (i = 0; i < isc->controller_formats_size; i++) in isc_enum_framesizes()
1388 if (isc->controller_formats[i].fourcc == fsize->pixel_format) in isc_enum_framesizes()
1394 ret = v4l2_subdev_call(isc->current_subdev->sd, pad, enum_frame_size, in isc_enum_framesizes()
1399 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; in isc_enum_framesizes()
1400 fsize->discrete.width = fse.max_width; in isc_enum_framesizes()
1401 fsize->discrete.height = fse.max_height; in isc_enum_framesizes()
1411 .code = isc->config.sd_format->mbus_code, in isc_enum_frameintervals()
1412 .index = fival->index, in isc_enum_frameintervals()
1413 .width = fival->width, in isc_enum_frameintervals()
1414 .height = fival->height, in isc_enum_frameintervals()
1417 int ret = -EINVAL; in isc_enum_frameintervals()
1420 for (i = 0; i < isc->num_user_formats; i++) in isc_enum_frameintervals()
1421 if (isc->user_formats[i]->fourcc == fival->pixel_format) in isc_enum_frameintervals()
1424 for (i = 0; i < isc->controller_formats_size; i++) in isc_enum_frameintervals()
1425 if (isc->controller_formats[i].fourcc == fival->pixel_format) in isc_enum_frameintervals()
1431 ret = v4l2_subdev_call(isc->current_subdev->sd, pad, in isc_enum_frameintervals()
1436 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; in isc_enum_frameintervals()
1437 fival->discrete = fie.interval; in isc_enum_frameintervals()
1476 struct v4l2_subdev *sd = isc->current_subdev->sd; in isc_open()
1479 if (mutex_lock_interruptible(&isc->lock)) in isc_open()
1480 return -ERESTARTSYS; in isc_open()
1490 if (ret < 0 && ret != -ENOIOCTLCMD) { in isc_open()
1495 ret = isc_set_fmt(isc, &isc->fmt); in isc_open()
1502 mutex_unlock(&isc->lock); in isc_open()
1509 struct v4l2_subdev *sd = isc->current_subdev->sd; in isc_release()
1513 mutex_lock(&isc->lock); in isc_release()
1522 mutex_unlock(&isc->lock); in isc_release()
1540 struct regmap *regmap = isc->regmap; in isc_interrupt()
1550 spin_lock(&isc->dma_queue_lock); in isc_interrupt()
1551 if (isc->cur_frm) { in isc_interrupt()
1552 struct vb2_v4l2_buffer *vbuf = &isc->cur_frm->vb; in isc_interrupt()
1553 struct vb2_buffer *vb = &vbuf->vb2_buf; in isc_interrupt()
1555 vb->timestamp = ktime_get_ns(); in isc_interrupt()
1556 vbuf->sequence = isc->sequence++; in isc_interrupt()
1558 isc->cur_frm = NULL; in isc_interrupt()
1561 if (!list_empty(&isc->dma_queue) && !isc->stop) { in isc_interrupt()
1562 isc->cur_frm = list_first_entry(&isc->dma_queue, in isc_interrupt()
1564 list_del(&isc->cur_frm->list); in isc_interrupt()
1569 if (isc->stop) in isc_interrupt()
1570 complete(&isc->comp); in isc_interrupt()
1573 spin_unlock(&isc->dma_queue_lock); in isc_interrupt()
1577 schedule_work(&isc->awb_work); in isc_interrupt()
1587 struct regmap *regmap = isc->regmap; in isc_hist_count()
1588 struct isc_ctrls *ctrls = &isc->ctrls; in isc_hist_count()
1589 u32 *hist_count = &ctrls->hist_count[ctrls->hist_id]; in isc_hist_count()
1590 u32 *hist_entry = &ctrls->hist_entry[0]; in isc_hist_count()
1596 regmap_bulk_read(regmap, ISC_HIS_ENTRY + isc->offsets.his_entry, in isc_hist_count()
1618 u32 *hist_count = &ctrls->hist_count[0]; in isc_wb_update()
1620 u64 avg = 0; in isc_wb_update() local
1630 avg = (u64)hist_count[ISC_HIS_CFG_MODE_GR] + in isc_wb_update()
1632 avg >>= 1; in isc_wb_update()
1635 if (!avg) in isc_wb_update()
1644 offset[c] = ctrls->hist_minmax[c][HIST_MIN_INDEX]; in isc_wb_update()
1654 ctrls->offset[c] = (offset[c] - 1) << 3; in isc_wb_update()
1661 ctrls->offset[c] = -ctrls->offset[c]; in isc_wb_update()
1665 * divided by the actual range of color component (Max - Min) in isc_wb_update()
1672 (ctrls->hist_minmax[c][HIST_MAX_INDEX] - in isc_wb_update()
1673 ctrls->hist_minmax[c][HIST_MIN_INDEX] + 1); in isc_wb_update()
1682 gw_gain[c] = div_u64(avg << 9, hist_count[c]); in isc_wb_update()
1687 ctrls->gain[c] = s_gain[c] * gw_gain[c]; in isc_wb_update()
1688 ctrls->gain[c] >>= 9; in isc_wb_update()
1696 struct regmap *regmap = isc->regmap; in isc_awb_work()
1697 struct isc_ctrls *ctrls = &isc->ctrls; in isc_awb_work()
1698 u32 hist_id = ctrls->hist_id; in isc_awb_work()
1705 if (isc->stop) in isc_awb_work()
1708 if (ctrls->hist_stat != HIST_ENABLED) in isc_awb_work()
1712 ctrls->hist_minmax[hist_id][HIST_MIN_INDEX] = min; in isc_awb_work()
1713 ctrls->hist_minmax[hist_id][HIST_MAX_INDEX] = max; in isc_awb_work()
1722 ctrls->hist_id = hist_id; in isc_awb_work()
1723 baysel = isc->config.sd_format->cfa_baycfg << ISC_HIS_CFG_BAYSEL_SHIFT; in isc_awb_work()
1725 ret = pm_runtime_resume_and_get(isc->dev); in isc_awb_work()
1733 if (hist_id == ISC_HIS_CFG_MODE_GR || ctrls->awb == ISC_WB_NONE) { in isc_awb_work()
1740 spin_lock_irqsave(&isc->awb_lock, flags); in isc_awb_work()
1742 spin_unlock_irqrestore(&isc->awb_lock, flags); in isc_awb_work()
1748 if (ctrls->awb == ISC_WB_ONETIME) { in isc_awb_work()
1749 v4l2_info(&isc->v4l2_dev, in isc_awb_work()
1750 "Completed one time white-balance adjustment.\n"); in isc_awb_work()
1753 ctrls->awb = ISC_WB_NONE; in isc_awb_work()
1756 regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, in isc_awb_work()
1760 if (ctrls->awb) in isc_awb_work()
1763 pm_runtime_put_sync(isc->dev); in isc_awb_work()
1768 struct isc_device *isc = container_of(ctrl->handler, in isc_s_ctrl()
1770 struct isc_ctrls *ctrls = &isc->ctrls; in isc_s_ctrl()
1772 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) in isc_s_ctrl()
1775 switch (ctrl->id) { in isc_s_ctrl()
1777 ctrls->brightness = ctrl->val & ISC_CBC_BRIGHT_MASK; in isc_s_ctrl()
1780 ctrls->contrast = ctrl->val & ISC_CBC_CONTRAST_MASK; in isc_s_ctrl()
1783 ctrls->gamma_index = ctrl->val; in isc_s_ctrl()
1786 return -EINVAL; in isc_s_ctrl()
1798 struct isc_device *isc = container_of(ctrl->handler, in isc_s_awb_ctrl()
1800 struct isc_ctrls *ctrls = &isc->ctrls; in isc_s_awb_ctrl()
1802 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) in isc_s_awb_ctrl()
1805 switch (ctrl->id) { in isc_s_awb_ctrl()
1807 if (ctrl->val == 1) in isc_s_awb_ctrl()
1808 ctrls->awb = ISC_WB_AUTO; in isc_s_awb_ctrl()
1810 ctrls->awb = ISC_WB_NONE; in isc_s_awb_ctrl()
1813 if (!isc->config.sd_format) in isc_s_awb_ctrl()
1817 if (ctrl->cluster[ISC_CTRL_R_GAIN]->is_new) in isc_s_awb_ctrl()
1818 ctrls->gain[ISC_HIS_CFG_MODE_R] = isc->r_gain_ctrl->val; in isc_s_awb_ctrl()
1819 if (ctrl->cluster[ISC_CTRL_B_GAIN]->is_new) in isc_s_awb_ctrl()
1820 ctrls->gain[ISC_HIS_CFG_MODE_B] = isc->b_gain_ctrl->val; in isc_s_awb_ctrl()
1821 if (ctrl->cluster[ISC_CTRL_GR_GAIN]->is_new) in isc_s_awb_ctrl()
1822 ctrls->gain[ISC_HIS_CFG_MODE_GR] = isc->gr_gain_ctrl->val; in isc_s_awb_ctrl()
1823 if (ctrl->cluster[ISC_CTRL_GB_GAIN]->is_new) in isc_s_awb_ctrl()
1824 ctrls->gain[ISC_HIS_CFG_MODE_GB] = isc->gb_gain_ctrl->val; in isc_s_awb_ctrl()
1826 if (ctrl->cluster[ISC_CTRL_R_OFF]->is_new) in isc_s_awb_ctrl()
1827 ctrls->offset[ISC_HIS_CFG_MODE_R] = isc->r_off_ctrl->val; in isc_s_awb_ctrl()
1828 if (ctrl->cluster[ISC_CTRL_B_OFF]->is_new) in isc_s_awb_ctrl()
1829 ctrls->offset[ISC_HIS_CFG_MODE_B] = isc->b_off_ctrl->val; in isc_s_awb_ctrl()
1830 if (ctrl->cluster[ISC_CTRL_GR_OFF]->is_new) in isc_s_awb_ctrl()
1831 ctrls->offset[ISC_HIS_CFG_MODE_GR] = isc->gr_off_ctrl->val; in isc_s_awb_ctrl()
1832 if (ctrl->cluster[ISC_CTRL_GB_OFF]->is_new) in isc_s_awb_ctrl()
1833 ctrls->offset[ISC_HIS_CFG_MODE_GB] = isc->gb_off_ctrl->val; in isc_s_awb_ctrl()
1837 if (vb2_is_streaming(&isc->vb2_vidq)) { in isc_s_awb_ctrl()
1849 v4l2_ctrl_activate(isc->do_wb_ctrl, false); in isc_s_awb_ctrl()
1853 if (ctrls->awb == ISC_WB_AUTO && in isc_s_awb_ctrl()
1854 vb2_is_streaming(&isc->vb2_vidq) && in isc_s_awb_ctrl()
1855 ISC_IS_FORMAT_RAW(isc->config.sd_format->mbus_code)) in isc_s_awb_ctrl()
1862 if (ctrls->awb == ISC_WB_NONE && in isc_s_awb_ctrl()
1863 ctrl->cluster[ISC_CTRL_DO_WB]->is_new && in isc_s_awb_ctrl()
1864 !(ctrl->cluster[ISC_CTRL_DO_WB]->flags & in isc_s_awb_ctrl()
1866 ctrls->awb = ISC_WB_ONETIME; in isc_s_awb_ctrl()
1868 v4l2_dbg(1, debug, &isc->v4l2_dev, in isc_s_awb_ctrl()
1869 "One time white-balance started.\n"); in isc_s_awb_ctrl()
1878 struct isc_device *isc = container_of(ctrl->handler, in isc_g_volatile_awb_ctrl()
1880 struct isc_ctrls *ctrls = &isc->ctrls; in isc_g_volatile_awb_ctrl()
1882 switch (ctrl->id) { in isc_g_volatile_awb_ctrl()
1885 ctrl->cluster[ISC_CTRL_R_GAIN]->val = in isc_g_volatile_awb_ctrl()
1886 ctrls->gain[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()
1887 ctrl->cluster[ISC_CTRL_B_GAIN]->val = in isc_g_volatile_awb_ctrl()
1888 ctrls->gain[ISC_HIS_CFG_MODE_B]; in isc_g_volatile_awb_ctrl()
1889 ctrl->cluster[ISC_CTRL_GR_GAIN]->val = in isc_g_volatile_awb_ctrl()
1890 ctrls->gain[ISC_HIS_CFG_MODE_GR]; in isc_g_volatile_awb_ctrl()
1891 ctrl->cluster[ISC_CTRL_GB_GAIN]->val = in isc_g_volatile_awb_ctrl()
1892 ctrls->gain[ISC_HIS_CFG_MODE_GB]; in isc_g_volatile_awb_ctrl()
1894 ctrl->cluster[ISC_CTRL_R_OFF]->val = in isc_g_volatile_awb_ctrl()
1895 ctrls->offset[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()
1896 ctrl->cluster[ISC_CTRL_B_OFF]->val = in isc_g_volatile_awb_ctrl()
1897 ctrls->offset[ISC_HIS_CFG_MODE_B]; in isc_g_volatile_awb_ctrl()
1898 ctrl->cluster[ISC_CTRL_GR_OFF]->val = in isc_g_volatile_awb_ctrl()
1899 ctrls->offset[ISC_HIS_CFG_MODE_GR]; in isc_g_volatile_awb_ctrl()
1900 ctrl->cluster[ISC_CTRL_GB_OFF]->val = in isc_g_volatile_awb_ctrl()
1901 ctrls->offset[ISC_HIS_CFG_MODE_GB]; in isc_g_volatile_awb_ctrl()
1919 .min = -4095, \
1951 struct isc_ctrls *ctrls = &isc->ctrls; in isc_ctrl_init()
1952 struct v4l2_ctrl_handler *hdl = &ctrls->handler; in isc_ctrl_init()
1955 ctrls->hist_stat = HIST_INIT; in isc_ctrl_init()
1963 isc->config_ctrls(isc, ops); in isc_ctrl_init()
1965 ctrls->brightness = 0; in isc_ctrl_init()
1967 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -1024, 1023, 1, 0); in isc_ctrl_init()
1968 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAMMA, 0, isc->gamma_max, 1, in isc_ctrl_init()
1969 isc->gamma_max); in isc_ctrl_init()
1970 isc->awb_ctrl = v4l2_ctrl_new_std(hdl, &isc_awb_ops, in isc_ctrl_init()
1975 isc->do_wb_ctrl = v4l2_ctrl_new_std(hdl, &isc_awb_ops, in isc_ctrl_init()
1979 if (!isc->do_wb_ctrl) { in isc_ctrl_init()
1980 ret = hdl->error; in isc_ctrl_init()
1985 v4l2_ctrl_activate(isc->do_wb_ctrl, false); in isc_ctrl_init()
1987 isc->r_gain_ctrl = v4l2_ctrl_new_custom(hdl, &isc_r_gain_ctrl, NULL); in isc_ctrl_init()
1988 isc->b_gain_ctrl = v4l2_ctrl_new_custom(hdl, &isc_b_gain_ctrl, NULL); in isc_ctrl_init()
1989 isc->gr_gain_ctrl = v4l2_ctrl_new_custom(hdl, &isc_gr_gain_ctrl, NULL); in isc_ctrl_init()
1990 isc->gb_gain_ctrl = v4l2_ctrl_new_custom(hdl, &isc_gb_gain_ctrl, NULL); in isc_ctrl_init()
1991 isc->r_off_ctrl = v4l2_ctrl_new_custom(hdl, &isc_r_off_ctrl, NULL); in isc_ctrl_init()
1992 isc->b_off_ctrl = v4l2_ctrl_new_custom(hdl, &isc_b_off_ctrl, NULL); in isc_ctrl_init()
1993 isc->gr_off_ctrl = v4l2_ctrl_new_custom(hdl, &isc_gr_off_ctrl, NULL); in isc_ctrl_init()
1994 isc->gb_off_ctrl = v4l2_ctrl_new_custom(hdl, &isc_gb_off_ctrl, NULL); in isc_ctrl_init()
2000 v4l2_ctrl_auto_cluster(10, &isc->awb_ctrl, 0, true); in isc_ctrl_init()
2011 struct isc_device *isc = container_of(notifier->v4l2_dev, in isc_async_bound()
2016 if (video_is_registered(&isc->video_dev)) { in isc_async_bound()
2017 v4l2_err(&isc->v4l2_dev, "only supports one sub-device.\n"); in isc_async_bound()
2018 return -EBUSY; in isc_async_bound()
2021 subdev_entity->sd = subdev; in isc_async_bound()
2030 struct isc_device *isc = container_of(notifier->v4l2_dev, in isc_async_unbind()
2032 cancel_work_sync(&isc->awb_work); in isc_async_unbind()
2033 video_unregister_device(&isc->video_dev); in isc_async_unbind()
2034 v4l2_ctrl_handler_free(&isc->ctrls.handler); in isc_async_unbind()
2040 struct isc_format *fmt = &isc->formats_list[0]; in find_format_by_code()
2043 for (i = 0; i < isc->formats_list_size; i++) { in find_format_by_code()
2044 if (fmt->mbus_code == code) { in find_format_by_code()
2058 struct v4l2_subdev *subdev = isc->current_subdev->sd; in isc_formats_init()
2060 u32 list_size = isc->formats_list_size; in isc_formats_init()
2072 v4l2_warn(&isc->v4l2_dev, "Mbus code %x not supported\n", in isc_formats_init()
2077 fmt->sd_support = true; in isc_formats_init()
2082 return -ENXIO; in isc_formats_init()
2084 isc->num_user_formats = num_fmts; in isc_formats_init()
2085 isc->user_formats = devm_kcalloc(isc->dev, in isc_formats_init()
2086 num_fmts, sizeof(*isc->user_formats), in isc_formats_init()
2088 if (!isc->user_formats) in isc_formats_init()
2089 return -ENOMEM; in isc_formats_init()
2091 fmt = &isc->formats_list[0]; in isc_formats_init()
2093 if (fmt->sd_support) in isc_formats_init()
2094 isc->user_formats[j++] = fmt; in isc_formats_init()
2109 .pixelformat = isc->user_formats[0]->fourcc, in isc_set_default_fmt()
2118 isc->fmt = f; in isc_set_default_fmt()
2124 struct isc_device *isc = container_of(notifier->v4l2_dev, in isc_async_complete()
2126 struct video_device *vdev = &isc->video_dev; in isc_async_complete()
2127 struct vb2_queue *q = &isc->vb2_vidq; in isc_async_complete()
2130 INIT_WORK(&isc->awb_work, isc_awb_work); in isc_async_complete()
2132 ret = v4l2_device_register_subdev_nodes(&isc->v4l2_dev); in isc_async_complete()
2134 v4l2_err(&isc->v4l2_dev, "Failed to register subdev nodes\n"); in isc_async_complete()
2138 isc->current_subdev = container_of(notifier, in isc_async_complete()
2140 mutex_init(&isc->lock); in isc_async_complete()
2141 init_completion(&isc->comp); in isc_async_complete()
2144 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; in isc_async_complete()
2145 q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; in isc_async_complete()
2146 q->drv_priv = isc; in isc_async_complete()
2147 q->buf_struct_size = sizeof(struct isc_buffer); in isc_async_complete()
2148 q->ops = &isc_vb2_ops; in isc_async_complete()
2149 q->mem_ops = &vb2_dma_contig_memops; in isc_async_complete()
2150 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; in isc_async_complete()
2151 q->lock = &isc->lock; in isc_async_complete()
2152 q->min_buffers_needed = 1; in isc_async_complete()
2153 q->dev = isc->dev; in isc_async_complete()
2157 v4l2_err(&isc->v4l2_dev, in isc_async_complete()
2163 INIT_LIST_HEAD(&isc->dma_queue); in isc_async_complete()
2164 spin_lock_init(&isc->dma_queue_lock); in isc_async_complete()
2165 spin_lock_init(&isc->awb_lock); in isc_async_complete()
2169 v4l2_err(&isc->v4l2_dev, in isc_async_complete()
2176 v4l2_err(&isc->v4l2_dev, "Could not set default format\n"); in isc_async_complete()
2182 v4l2_err(&isc->v4l2_dev, "Init isc ctrols failed: %d\n", ret); in isc_async_complete()
2187 strscpy(vdev->name, "microchip-isc", sizeof(vdev->name)); in isc_async_complete()
2188 vdev->release = video_device_release_empty; in isc_async_complete()
2189 vdev->fops = &isc_fops; in isc_async_complete()
2190 vdev->ioctl_ops = &isc_ioctl_ops; in isc_async_complete()
2191 vdev->v4l2_dev = &isc->v4l2_dev; in isc_async_complete()
2192 vdev->vfl_dir = VFL_DIR_RX; in isc_async_complete()
2193 vdev->queue = q; in isc_async_complete()
2194 vdev->lock = &isc->lock; in isc_async_complete()
2195 vdev->ctrl_handler = &isc->ctrls.handler; in isc_async_complete()
2196 vdev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE; in isc_async_complete()
2199 ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); in isc_async_complete()
2201 v4l2_err(&isc->v4l2_dev, in isc_async_complete()
2209 mutex_destroy(&isc->lock); in isc_async_complete()
2224 list_for_each_entry(subdev_entity, &isc->subdev_entities, list) { in isc_subdev_cleanup()
2225 v4l2_async_notifier_unregister(&subdev_entity->notifier); in isc_subdev_cleanup()
2226 v4l2_async_notifier_cleanup(&subdev_entity->notifier); in isc_subdev_cleanup()
2229 INIT_LIST_HEAD(&isc->subdev_entities); in isc_subdev_cleanup()
2235 struct device *dev = isc->dev; in isc_pipeline_init()
2236 struct regmap *regmap = isc->regmap; in isc_pipeline_init()
2241 * DPCEN-->GDCEN-->BLCEN-->WB-->CFA-->CC--> in isc_pipeline_init()
2242 * GAM-->VHXS-->CSC-->CBC-->SUB422-->SUB420 in isc_pipeline_init()
2256 REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0), in isc_pipeline_init()
2257 REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), in isc_pipeline_init()
2258 REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0), in isc_pipeline_init()
2259 REG_FIELD(ISC_SUB420_CTRL + isc->offsets.sub420, 0, 0), in isc_pipeline_init()
2267 isc->pipeline[i] = regs; in isc_pipeline_init()