24 #define OV7251_SC_MODE_SELECT		0x0100
25 #define OV7251_SC_MODE_SELECT_SW_STANDBY	0x0
26 #define OV7251_SC_MODE_SELECT_STREAMING		0x1
28 #define OV7251_CHIP_ID_HIGH		0x300a
29 #define OV7251_CHIP_ID_HIGH_BYTE	0x77
30 #define OV7251_CHIP_ID_LOW		0x300b
31 #define OV7251_CHIP_ID_LOW_BYTE		0x50
32 #define OV7251_SC_GP_IO_IN1		0x3029
33 #define OV7251_AEC_EXPO_0		0x3500
34 #define OV7251_AEC_EXPO_1		0x3501
35 #define OV7251_AEC_EXPO_2		0x3502
36 #define OV7251_AEC_AGC_ADJ_0		0x350a
37 #define OV7251_AEC_AGC_ADJ_1		0x350b
38 #define OV7251_TIMING_FORMAT1		0x3820
40 #define OV7251_TIMING_FORMAT2		0x3821
42 #define OV7251_PRE_ISP_00		0x5e00
103 	{ 0x0103, 0x01 },
104 	{ 0x303b, 0x02 },
108 	{ 0x3005, 0x00 },
109 	{ 0x3012, 0xc0 },
110 	{ 0x3013, 0xd2 },
111 	{ 0x3014, 0x04 },
112 	{ 0x3016, 0xf0 },
113 	{ 0x3017, 0xf0 },
114 	{ 0x3018, 0xf0 },
115 	{ 0x301a, 0xf0 },
116 	{ 0x301b, 0xf0 },
117 	{ 0x301c, 0xf0 },
118 	{ 0x3023, 0x05 },
119 	{ 0x3037, 0xf0 },
120 	{ 0x3098, 0x04 }, /* pll2 pre divider */
121 	{ 0x3099, 0x28 }, /* pll2 multiplier */
122 	{ 0x309a, 0x05 }, /* pll2 sys divider */
123 	{ 0x309b, 0x04 }, /* pll2 adc divider */
124 	{ 0x309d, 0x00 }, /* pll2 divider */
125 	{ 0x30b0, 0x0a }, /* pll1 pix divider */
126 	{ 0x30b1, 0x01 }, /* pll1 divider */
127 	{ 0x30b3, 0x64 }, /* pll1 multiplier */
128 	{ 0x30b4, 0x03 }, /* pll1 pre divider */
129 	{ 0x30b5, 0x05 }, /* pll1 mipi divider */
130 	{ 0x3106, 0xda },
131 	{ 0x3503, 0x07 },
132 	{ 0x3509, 0x10 },
133 	{ 0x3600, 0x1c },
134 	{ 0x3602, 0x62 },
135 	{ 0x3620, 0xb7 },
136 	{ 0x3622, 0x04 },
137 	{ 0x3626, 0x21 },
138 	{ 0x3627, 0x30 },
139 	{ 0x3630, 0x44 },
140 	{ 0x3631, 0x35 },
141 	{ 0x3634, 0x60 },
142 	{ 0x3636, 0x00 },
143 	{ 0x3662, 0x01 },
144 	{ 0x3663, 0x70 },
145 	{ 0x3664, 0x50 },
146 	{ 0x3666, 0x0a },
147 	{ 0x3669, 0x1a },
148 	{ 0x366a, 0x00 },
149 	{ 0x366b, 0x50 },
150 	{ 0x3673, 0x01 },
151 	{ 0x3674, 0xff },
152 	{ 0x3675, 0x03 },
153 	{ 0x3705, 0xc1 },
154 	{ 0x3709, 0x40 },
155 	{ 0x373c, 0x08 },
156 	{ 0x3742, 0x00 },
157 	{ 0x3757, 0xb3 },
158 	{ 0x3788, 0x00 },
159 	{ 0x37a8, 0x01 },
160 	{ 0x37a9, 0xc0 },
161 	{ 0x3800, 0x00 },
162 	{ 0x3801, 0x04 },
163 	{ 0x3802, 0x00 },
164 	{ 0x3803, 0x04 },
165 	{ 0x3804, 0x02 },
166 	{ 0x3805, 0x8b },
167 	{ 0x3806, 0x01 },
168 	{ 0x3807, 0xeb },
169 	{ 0x3808, 0x02 }, /* width high */
170 	{ 0x3809, 0x80 }, /* width low */
171 	{ 0x380a, 0x01 }, /* height high */
172 	{ 0x380b, 0xe0 }, /* height low */
173 	{ 0x380c, 0x03 }, /* total horiz timing high */
174 	{ 0x380d, 0xa0 }, /* total horiz timing low */
175 	{ 0x380e, 0x06 }, /* total vertical timing high */
176 	{ 0x380f, 0xbc }, /* total vertical timing low */
177 	{ 0x3810, 0x00 },
178 	{ 0x3811, 0x04 },
179 	{ 0x3812, 0x00 },
180 	{ 0x3813, 0x05 },
181 	{ 0x3814, 0x11 },
182 	{ 0x3815, 0x11 },
183 	{ 0x3820, 0x40 },
184 	{ 0x3821, 0x00 },
185 	{ 0x382f, 0x0e },
186 	{ 0x3832, 0x00 },
187 	{ 0x3833, 0x05 },
188 	{ 0x3834, 0x00 },
189 	{ 0x3835, 0x0c },
190 	{ 0x3837, 0x00 },
191 	{ 0x3b80, 0x00 },
192 	{ 0x3b81, 0xa5 },
193 	{ 0x3b82, 0x10 },
194 	{ 0x3b83, 0x00 },
195 	{ 0x3b84, 0x08 },
196 	{ 0x3b85, 0x00 },
197 	{ 0x3b86, 0x01 },
198 	{ 0x3b87, 0x00 },
199 	{ 0x3b88, 0x00 },
200 	{ 0x3b89, 0x00 },
201 	{ 0x3b8a, 0x00 },
202 	{ 0x3b8b, 0x05 },
203 	{ 0x3b8c, 0x00 },
204 	{ 0x3b8d, 0x00 },
205 	{ 0x3b8e, 0x00 },
206 	{ 0x3b8f, 0x1a },
207 	{ 0x3b94, 0x05 },
208 	{ 0x3b95, 0xf2 },
209 	{ 0x3b96, 0x40 },
210 	{ 0x3c00, 0x89 },
211 	{ 0x3c01, 0x63 },
212 	{ 0x3c02, 0x01 },
213 	{ 0x3c03, 0x00 },
214 	{ 0x3c04, 0x00 },
215 	{ 0x3c05, 0x03 },
216 	{ 0x3c06, 0x00 },
217 	{ 0x3c07, 0x06 },
218 	{ 0x3c0c, 0x01 },
219 	{ 0x3c0d, 0xd0 },
220 	{ 0x3c0e, 0x02 },
221 	{ 0x3c0f, 0x0a },
222 	{ 0x4001, 0x42 },
223 	{ 0x4004, 0x04 },
224 	{ 0x4005, 0x00 },
225 	{ 0x404e, 0x01 },
226 	{ 0x4300, 0xff },
227 	{ 0x4301, 0x00 },
228 	{ 0x4315, 0x00 },
229 	{ 0x4501, 0x48 },
230 	{ 0x4600, 0x00 },
231 	{ 0x4601, 0x4e },
232 	{ 0x4801, 0x0f },
233 	{ 0x4806, 0x0f },
234 	{ 0x4819, 0xaa },
235 	{ 0x4823, 0x3e },
236 	{ 0x4837, 0x19 },
237 	{ 0x4a0d, 0x00 },
238 	{ 0x4a47, 0x7f },
239 	{ 0x4a49, 0xf0 },
240 	{ 0x4a4b, 0x30 },
241 	{ 0x5000, 0x85 },
242 	{ 0x5001, 0x80 },
246 	{ 0x3005, 0x00 },
247 	{ 0x3012, 0xc0 },
248 	{ 0x3013, 0xd2 },
249 	{ 0x3014, 0x04 },
250 	{ 0x3016, 0x10 },
251 	{ 0x3017, 0x00 },
252 	{ 0x3018, 0x00 },
253 	{ 0x301a, 0x00 },
254 	{ 0x301b, 0x00 },
255 	{ 0x301c, 0x00 },
256 	{ 0x3023, 0x05 },
257 	{ 0x3037, 0xf0 },
258 	{ 0x3098, 0x04 }, /* pll2 pre divider */
259 	{ 0x3099, 0x28 }, /* pll2 multiplier */
260 	{ 0x309a, 0x05 }, /* pll2 sys divider */
261 	{ 0x309b, 0x04 }, /* pll2 adc divider */
262 	{ 0x309d, 0x00 }, /* pll2 divider */
263 	{ 0x30b0, 0x0a }, /* pll1 pix divider */
264 	{ 0x30b1, 0x01 }, /* pll1 divider */
265 	{ 0x30b3, 0x64 }, /* pll1 multiplier */
266 	{ 0x30b4, 0x03 }, /* pll1 pre divider */
267 	{ 0x30b5, 0x05 }, /* pll1 mipi divider */
268 	{ 0x3106, 0xda },
269 	{ 0x3503, 0x07 },
270 	{ 0x3509, 0x10 },
271 	{ 0x3600, 0x1c },
272 	{ 0x3602, 0x62 },
273 	{ 0x3620, 0xb7 },
274 	{ 0x3622, 0x04 },
275 	{ 0x3626, 0x21 },
276 	{ 0x3627, 0x30 },
277 	{ 0x3630, 0x44 },
278 	{ 0x3631, 0x35 },
279 	{ 0x3634, 0x60 },
280 	{ 0x3636, 0x00 },
281 	{ 0x3662, 0x01 },
282 	{ 0x3663, 0x70 },
283 	{ 0x3664, 0x50 },
284 	{ 0x3666, 0x0a },
285 	{ 0x3669, 0x1a },
286 	{ 0x366a, 0x00 },
287 	{ 0x366b, 0x50 },
288 	{ 0x3673, 0x01 },
289 	{ 0x3674, 0xff },
290 	{ 0x3675, 0x03 },
291 	{ 0x3705, 0xc1 },
292 	{ 0x3709, 0x40 },
293 	{ 0x373c, 0x08 },
294 	{ 0x3742, 0x00 },
295 	{ 0x3757, 0xb3 },
296 	{ 0x3788, 0x00 },
297 	{ 0x37a8, 0x01 },
298 	{ 0x37a9, 0xc0 },
299 	{ 0x3800, 0x00 },
300 	{ 0x3801, 0x04 },
301 	{ 0x3802, 0x00 },
302 	{ 0x3803, 0x04 },
303 	{ 0x3804, 0x02 },
304 	{ 0x3805, 0x8b },
305 	{ 0x3806, 0x01 },
306 	{ 0x3807, 0xeb },
307 	{ 0x3808, 0x02 }, /* width high */
308 	{ 0x3809, 0x80 }, /* width low */
309 	{ 0x380a, 0x01 }, /* height high */
310 	{ 0x380b, 0xe0 }, /* height low */
311 	{ 0x380c, 0x03 }, /* total horiz timing high */
312 	{ 0x380d, 0xa0 }, /* total horiz timing low */
313 	{ 0x380e, 0x03 }, /* total vertical timing high */
314 	{ 0x380f, 0x5c }, /* total vertical timing low */
315 	{ 0x3810, 0x00 },
316 	{ 0x3811, 0x04 },
317 	{ 0x3812, 0x00 },
318 	{ 0x3813, 0x05 },
319 	{ 0x3814, 0x11 },
320 	{ 0x3815, 0x11 },
321 	{ 0x3820, 0x40 },
322 	{ 0x3821, 0x00 },
323 	{ 0x382f, 0x0e },
324 	{ 0x3832, 0x00 },
325 	{ 0x3833, 0x05 },
326 	{ 0x3834, 0x00 },
327 	{ 0x3835, 0x0c },
328 	{ 0x3837, 0x00 },
329 	{ 0x3b80, 0x00 },
330 	{ 0x3b81, 0xa5 },
331 	{ 0x3b82, 0x10 },
332 	{ 0x3b83, 0x00 },
333 	{ 0x3b84, 0x08 },
334 	{ 0x3b85, 0x00 },
335 	{ 0x3b86, 0x01 },
336 	{ 0x3b87, 0x00 },
337 	{ 0x3b88, 0x00 },
338 	{ 0x3b89, 0x00 },
339 	{ 0x3b8a, 0x00 },
340 	{ 0x3b8b, 0x05 },
341 	{ 0x3b8c, 0x00 },
342 	{ 0x3b8d, 0x00 },
343 	{ 0x3b8e, 0x00 },
344 	{ 0x3b8f, 0x1a },
345 	{ 0x3b94, 0x05 },
346 	{ 0x3b95, 0xf2 },
347 	{ 0x3b96, 0x40 },
348 	{ 0x3c00, 0x89 },
349 	{ 0x3c01, 0x63 },
350 	{ 0x3c02, 0x01 },
351 	{ 0x3c03, 0x00 },
352 	{ 0x3c04, 0x00 },
353 	{ 0x3c05, 0x03 },
354 	{ 0x3c06, 0x00 },
355 	{ 0x3c07, 0x06 },
356 	{ 0x3c0c, 0x01 },
357 	{ 0x3c0d, 0xd0 },
358 	{ 0x3c0e, 0x02 },
359 	{ 0x3c0f, 0x0a },
360 	{ 0x4001, 0x42 },
361 	{ 0x4004, 0x04 },
362 	{ 0x4005, 0x00 },
363 	{ 0x404e, 0x01 },
364 	{ 0x4300, 0xff },
365 	{ 0x4301, 0x00 },
366 	{ 0x4315, 0x00 },
367 	{ 0x4501, 0x48 },
368 	{ 0x4600, 0x00 },
369 	{ 0x4601, 0x4e },
370 	{ 0x4801, 0x0f },
371 	{ 0x4806, 0x0f },
372 	{ 0x4819, 0xaa },
373 	{ 0x4823, 0x3e },
374 	{ 0x4837, 0x19 },
375 	{ 0x4a0d, 0x00 },
376 	{ 0x4a47, 0x7f },
377 	{ 0x4a49, 0xf0 },
378 	{ 0x4a4b, 0x30 },
379 	{ 0x5000, 0x85 },
380 	{ 0x5001, 0x80 },
384 	{ 0x3005, 0x00 },
385 	{ 0x3012, 0xc0 },
386 	{ 0x3013, 0xd2 },
387 	{ 0x3014, 0x04 },
388 	{ 0x3016, 0x10 },
389 	{ 0x3017, 0x00 },
390 	{ 0x3018, 0x00 },
391 	{ 0x301a, 0x00 },
392 	{ 0x301b, 0x00 },
393 	{ 0x301c, 0x00 },
394 	{ 0x3023, 0x05 },
395 	{ 0x3037, 0xf0 },
396 	{ 0x3098, 0x04 }, /* pll2 pre divider */
397 	{ 0x3099, 0x28 }, /* pll2 multiplier */
398 	{ 0x309a, 0x05 }, /* pll2 sys divider */
399 	{ 0x309b, 0x04 }, /* pll2 adc divider */
400 	{ 0x309d, 0x00 }, /* pll2 divider */
401 	{ 0x30b0, 0x0a }, /* pll1 pix divider */
402 	{ 0x30b1, 0x01 }, /* pll1 divider */
403 	{ 0x30b3, 0x64 }, /* pll1 multiplier */
404 	{ 0x30b4, 0x03 }, /* pll1 pre divider */
405 	{ 0x30b5, 0x05 }, /* pll1 mipi divider */
406 	{ 0x3106, 0xda },
407 	{ 0x3503, 0x07 },
408 	{ 0x3509, 0x10 },
409 	{ 0x3600, 0x1c },
410 	{ 0x3602, 0x62 },
411 	{ 0x3620, 0xb7 },
412 	{ 0x3622, 0x04 },
413 	{ 0x3626, 0x21 },
414 	{ 0x3627, 0x30 },
415 	{ 0x3630, 0x44 },
416 	{ 0x3631, 0x35 },
417 	{ 0x3634, 0x60 },
418 	{ 0x3636, 0x00 },
419 	{ 0x3662, 0x01 },
420 	{ 0x3663, 0x70 },
421 	{ 0x3664, 0x50 },
422 	{ 0x3666, 0x0a },
423 	{ 0x3669, 0x1a },
424 	{ 0x366a, 0x00 },
425 	{ 0x366b, 0x50 },
426 	{ 0x3673, 0x01 },
427 	{ 0x3674, 0xff },
428 	{ 0x3675, 0x03 },
429 	{ 0x3705, 0xc1 },
430 	{ 0x3709, 0x40 },
431 	{ 0x373c, 0x08 },
432 	{ 0x3742, 0x00 },
433 	{ 0x3757, 0xb3 },
434 	{ 0x3788, 0x00 },
435 	{ 0x37a8, 0x01 },
436 	{ 0x37a9, 0xc0 },
437 	{ 0x3800, 0x00 },
438 	{ 0x3801, 0x04 },
439 	{ 0x3802, 0x00 },
440 	{ 0x3803, 0x04 },
441 	{ 0x3804, 0x02 },
442 	{ 0x3805, 0x8b },
443 	{ 0x3806, 0x01 },
444 	{ 0x3807, 0xeb },
445 	{ 0x3808, 0x02 }, /* width high */
446 	{ 0x3809, 0x80 }, /* width low */
447 	{ 0x380a, 0x01 }, /* height high */
448 	{ 0x380b, 0xe0 }, /* height low */
449 	{ 0x380c, 0x03 }, /* total horiz timing high */
450 	{ 0x380d, 0xa0 }, /* total horiz timing low */
451 	{ 0x380e, 0x02 }, /* total vertical timing high */
452 	{ 0x380f, 0x3c }, /* total vertical timing low */
453 	{ 0x3810, 0x00 },
454 	{ 0x3811, 0x04 },
455 	{ 0x3812, 0x00 },
456 	{ 0x3813, 0x05 },
457 	{ 0x3814, 0x11 },
458 	{ 0x3815, 0x11 },
459 	{ 0x3820, 0x40 },
460 	{ 0x3821, 0x00 },
461 	{ 0x382f, 0x0e },
462 	{ 0x3832, 0x00 },
463 	{ 0x3833, 0x05 },
464 	{ 0x3834, 0x00 },
465 	{ 0x3835, 0x0c },
466 	{ 0x3837, 0x00 },
467 	{ 0x3b80, 0x00 },
468 	{ 0x3b81, 0xa5 },
469 	{ 0x3b82, 0x10 },
470 	{ 0x3b83, 0x00 },
471 	{ 0x3b84, 0x08 },
472 	{ 0x3b85, 0x00 },
473 	{ 0x3b86, 0x01 },
474 	{ 0x3b87, 0x00 },
475 	{ 0x3b88, 0x00 },
476 	{ 0x3b89, 0x00 },
477 	{ 0x3b8a, 0x00 },
478 	{ 0x3b8b, 0x05 },
479 	{ 0x3b8c, 0x00 },
480 	{ 0x3b8d, 0x00 },
481 	{ 0x3b8e, 0x00 },
482 	{ 0x3b8f, 0x1a },
483 	{ 0x3b94, 0x05 },
484 	{ 0x3b95, 0xf2 },
485 	{ 0x3b96, 0x40 },
486 	{ 0x3c00, 0x89 },
487 	{ 0x3c01, 0x63 },
488 	{ 0x3c02, 0x01 },
489 	{ 0x3c03, 0x00 },
490 	{ 0x3c04, 0x00 },
491 	{ 0x3c05, 0x03 },
492 	{ 0x3c06, 0x00 },
493 	{ 0x3c07, 0x06 },
494 	{ 0x3c0c, 0x01 },
495 	{ 0x3c0d, 0xd0 },
496 	{ 0x3c0e, 0x02 },
497 	{ 0x3c0f, 0x0a },
498 	{ 0x4001, 0x42 },
499 	{ 0x4004, 0x04 },
500 	{ 0x4005, 0x00 },
501 	{ 0x404e, 0x01 },
502 	{ 0x4300, 0xff },
503 	{ 0x4301, 0x00 },
504 	{ 0x4315, 0x00 },
505 	{ 0x4501, 0x48 },
506 	{ 0x4600, 0x00 },
507 	{ 0x4601, 0x4e },
508 	{ 0x4801, 0x0f },
509 	{ 0x4806, 0x0f },
510 	{ 0x4819, 0xaa },
511 	{ 0x4823, 0x3e },
512 	{ 0x4837, 0x19 },
513 	{ 0x4a0d, 0x00 },
514 	{ 0x4a47, 0x7f },
515 	{ 0x4a49, 0xf0 },
516 	{ 0x4a4b, 0x30 },
517 	{ 0x5000, 0x85 },
518 	{ 0x5001, 0x80 },
532 		.link_freq = 0, /* an index in link_freq[] */
546 		.link_freq = 0, /* an index in link_freq[] */
560 		.link_freq = 0, /* an index in link_freq[] */
579 	if (ret < 0) {  in ov7251_regulators_enable()
596 	return 0;  in ov7251_regulators_enable()
612 	if (ret < 0)  in ov7251_regulators_disable()
616 	if (ret < 0)  in ov7251_regulators_disable()
620 	if (ret < 0)  in ov7251_regulators_disable()
629 	regbuf[0] = reg >> 8;  in ov7251_write_reg()
630 	regbuf[1] = reg & 0xff;  in ov7251_write_reg()
634 	if (ret < 0) {  in ov7251_write_reg()
640 	return 0;  in ov7251_write_reg()
648 	int ret = 0;  in ov7251_write_seq_regs()
653 	regbuf[0] = reg >> 8;  in ov7251_write_seq_regs()
654 	regbuf[1] = reg & 0xff;  in ov7251_write_seq_regs()
659 	if (ret < 0) {  in ov7251_write_seq_regs()
666 	return 0;  in ov7251_write_seq_regs()
674 	regbuf[0] = reg >> 8;  in ov7251_read_reg()
675 	regbuf[1] = reg & 0xff;  in ov7251_read_reg()
678 	if (ret < 0) {  in ov7251_read_reg()
685 	if (ret < 0) {  in ov7251_read_reg()
691 	return 0;  in ov7251_read_reg()
700 	val[0] = (exposure & 0xf000) >> 12; /* goes to OV7251_AEC_EXPO_0 */  in ov7251_set_exposure()
701 	val[1] = (exposure & 0x0ff0) >> 4;  /* goes to OV7251_AEC_EXPO_1 */  in ov7251_set_exposure()
702 	val[2] = (exposure & 0x000f) << 4;  /* goes to OV7251_AEC_EXPO_2 */  in ov7251_set_exposure()
713 	val[0] = (gain & 0x0300) >> 8; /* goes to OV7251_AEC_AGC_ADJ_0 */  in ov7251_set_gain()
714 	val[1] = gain & 0xff;          /* goes to OV7251_AEC_AGC_ADJ_1 */  in ov7251_set_gain()
726 	for (i = 0; i < num_settings; ++i, ++settings) {  in ov7251_set_register_array()
728 		if (ret < 0)  in ov7251_set_register_array()
732 	return 0;  in ov7251_set_register_array()
741 	if (ret < 0)  in ov7251_set_power_on()
745 	if (ret < 0) {  in ov7251_set_power_on()
758 	return 0;  in ov7251_set_power_on()
764 	gpiod_set_value_cansleep(ov7251->enable_gpio, 0);  in ov7251_set_power_off()
771 	int ret = 0;  in ov7251_s_power()
781 		if (ret < 0)  in ov7251_s_power()
787 		if (ret < 0) {  in ov7251_s_power()
870 		return 0;  in ov7251_s_ctrl()
904 	if (code->index > 0)  in ov7251_enum_mbus_code()
909 	return 0;  in ov7251_enum_mbus_code()
927 	return 0;  in ov7251_enum_frame_size()
937 	for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) {  in ov7251_enum_frame_ival()
942 		if (index-- == 0) {  in ov7251_enum_frame_ival()
944 			return 0;  in ov7251_enum_frame_ival()
979 	return 0;  in ov7251_get_format()
1008 	unsigned int i, n = 0;  in ov7251_find_mode_by_ival()
1010 	for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) {  in ov7251_find_mode_by_ival()
1039 	int ret = 0;  in ov7251_set_format()
1057 		if (ret < 0)  in ov7251_set_format()
1062 		if (ret < 0)  in ov7251_set_format()
1068 		if (ret < 0)  in ov7251_set_format()
1073 		if (ret < 0)  in ov7251_set_format()
1077 		if (ret < 0)  in ov7251_set_format()
1117 	return 0;  in ov7251_entity_init_cfg()
1134 	return 0;  in ov7251_get_selection()
1148 		if (ret < 0) {  in ov7251_s_stream()
1155 		if (ret < 0) {  in ov7251_s_stream()
1181 	return 0;  in ov7251_get_frame_interval()
1189 	int ret = 0;  in ov7251_set_frame_interval()
1197 		if (ret < 0)  in ov7251_set_frame_interval()
1202 		if (ret < 0)  in ov7251_set_frame_interval()
1208 		if (ret < 0)  in ov7251_set_frame_interval()
1213 		if (ret < 0)  in ov7251_set_frame_interval()
1217 		if (ret < 0)  in ov7251_set_frame_interval()
1280 	if (ret < 0) {  in ov7251_probe()
1348 			  V4L2_CID_HFLIP, 0, 1, 1, 0);  in ov7251_probe()
1350 			  V4L2_CID_VFLIP, 0, 1, 1, 0);  in ov7251_probe()
1358 				     0, 0, ov7251_test_pattern_menu);  in ov7251_probe()
1367 						   0, link_freq);  in ov7251_probe()
1387 	if (ret < 0) {  in ov7251_probe()
1393 	if (ret < 0) {  in ov7251_probe()
1399 	if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE) {  in ov7251_probe()
1405 	if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE) {  in ov7251_probe()
1412 	if (ret < 0) {  in ov7251_probe()
1419 	dev_info(dev, "OV7251 revision %x (%s) detected at address 0x%02x\n",  in ov7251_probe()
1421 		 chip_rev == 0x4 ? "1A / 1B" :  in ov7251_probe()
1422 		 chip_rev == 0x5 ? "1C / 1D" :  in ov7251_probe()
1423 		 chip_rev == 0x6 ? "1E" :  in ov7251_probe()
1424 		 chip_rev == 0x7 ? "1F" : "unknown",  in ov7251_probe()
1429 	if (ret < 0) {  in ov7251_probe()
1437 	if (ret < 0) {  in ov7251_probe()
1445 	if (ret < 0) {  in ov7251_probe()
1454 	if (ret < 0) {  in ov7251_probe()
1461 	return 0;  in ov7251_probe()
1484 	return 0;  in ov7251_remove()