Lines Matching refs:write16
376 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
496 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
499 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
503 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
761 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
769 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
778 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
796 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
800 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
806 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
993 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1034 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1038 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1042 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1046 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1050 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1054 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1094 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1100 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1106 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1109 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1112 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1115 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1118 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1121 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1124 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1127 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1130 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1133 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1136 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1139 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1151 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1158 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1161 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1167 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1171 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1175 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1179 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1183 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1187 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1191 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1200 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1206 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1209 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1212 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1215 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1218 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1222 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1225 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1230 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1234 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1257 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1260 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1263 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1266 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1378 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1408 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1417 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1552 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1642 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1645 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1696 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1699 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1702 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1736 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1906 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1909 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1923 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1926 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1929 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1932 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1935 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1938 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1941 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1944 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1949 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1952 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1955 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2066 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2069 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2072 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2075 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2078 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2081 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2089 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2093 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2130 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2154 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2169 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2183 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2200 status = write16(state, in set_agc_rf()
2208 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2214 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2227 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2240 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2245 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2250 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2262 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2271 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2305 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2321 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2334 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2345 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2358 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2374 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2379 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2392 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2401 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2409 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2745 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2750 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2755 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2780 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2799 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2802 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2805 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2808 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2811 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2814 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2846 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2849 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2904 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3038 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3043 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3046 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3049 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3052 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3055 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3059 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3063 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3066 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3069 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3072 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3075 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3078 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3082 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3086 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3090 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3094 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3097 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3100 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3104 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3107 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3110 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3113 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3116 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3119 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3122 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3125 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3128 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3131 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3134 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3137 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3140 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3143 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3146 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3149 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3152 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3155 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3158 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3173 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3186 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3231 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3250 status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3254 status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3259 status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3335 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3337 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3352 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3356 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3392 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3414 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3454 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3500 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3503 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3506 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3512 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3516 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3520 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3524 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3531 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3536 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3539 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3542 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3546 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3549 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3552 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3555 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3558 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3563 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3566 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3575 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3578 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3582 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3585 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3598 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3614 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3619 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3625 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3633 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3636 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3642 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3648 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3652 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3656 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3700 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3739 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3744 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3747 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3753 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3852 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3899 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3904 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3908 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3912 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3916 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3923 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3928 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3932 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3936 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3940 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3947 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3952 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3956 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3960 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3964 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
4020 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
4025 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
4028 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4141 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4234 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4237 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4241 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4255 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4258 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4261 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4264 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4267 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4270 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4274 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4277 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4280 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4283 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4286 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4289 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4293 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4296 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4299 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4304 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4310 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4313 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4316 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4319 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4322 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4325 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4328 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4331 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4335 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4338 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4341 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4344 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4347 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4350 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4353 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4356 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4359 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4362 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4365 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4368 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4375 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4378 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4381 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4384 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4387 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4390 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4394 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4397 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4400 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4407 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4410 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4413 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4416 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4419 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4422 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4425 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4450 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4453 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4456 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4459 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4462 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4465 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4470 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4473 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4476 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4479 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4482 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4485 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4489 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4492 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4495 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4501 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4509 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4512 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4515 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4518 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4521 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4524 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4527 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4530 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4534 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4537 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4540 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4543 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4546 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4549 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4552 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4555 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4558 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4561 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4564 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4567 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4574 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4577 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4580 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4583 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4586 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4589 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4593 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4596 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4599 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4606 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4609 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4612 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4615 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4618 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4621 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4624 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4645 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4648 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4651 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4654 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4657 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4660 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4665 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4668 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4671 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4674 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4677 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4680 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4684 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4687 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4690 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4695 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4703 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4706 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4709 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4712 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4715 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4718 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4721 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4724 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4728 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4731 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4734 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4737 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4740 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4743 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4746 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4749 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4752 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4755 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4758 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4761 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4768 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4771 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4774 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4777 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4780 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4783 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4787 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4790 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4793 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4800 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4803 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4806 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4809 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4812 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4815 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4818 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4840 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4843 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4846 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4849 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4852 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4855 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4860 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4863 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4866 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4869 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4872 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4875 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4879 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4882 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4885 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4892 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4900 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4903 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4906 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4909 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4912 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4915 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4918 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4921 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4925 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4928 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4931 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4934 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4937 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4940 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4943 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4946 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4949 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4952 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4955 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4958 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4965 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4968 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4971 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4974 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
4977 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
4980 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
4984 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
4987 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
4991 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
4997 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
5000 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
5003 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
5006 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
5009 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
5012 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
5015 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5037 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5040 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5043 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5046 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5049 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5052 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5057 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5060 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5063 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5066 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5069 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5072 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5076 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5079 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5082 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5088 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5096 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5099 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5102 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5105 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5108 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5111 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5114 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5117 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5121 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5124 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5127 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5130 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5133 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5136 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5139 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5142 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5145 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5148 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5151 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5154 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5161 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5164 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5167 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5170 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5173 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5176 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5180 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5183 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5186 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5193 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5196 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5199 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5202 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5205 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5208 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5211 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5233 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5273 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5307 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5437 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5440 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5538 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5541 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5546 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5549 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5552 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5555 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5559 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5562 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5565 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5568 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5571 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5574 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5577 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5580 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5583 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5586 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5589 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5592 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5595 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5598 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5601 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5606 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5612 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5642 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5657 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5660 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5663 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5709 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5712 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5743 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5746 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5749 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5754 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5757 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5760 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5763 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5766 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5770 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5773 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5776 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5779 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5784 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5787 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5790 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5793 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5796 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5799 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5802 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5810 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5820 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5825 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5848 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5862 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5868 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5875 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5889 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5895 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5909 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5915 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5929 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5935 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
6015 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
6019 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6047 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6053 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6092 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6104 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6107 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6112 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6118 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6134 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6140 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6165 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6174 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6194 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6200 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6592 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()