Lines Matching +full:4 +full:x2
62 #define ATV_COMM_EXEC_HOLD 0x2
108 #define ATV_TOP_COMM_EXEC_HOLD 0x2
129 #define ATV_TOP_COMM_MB_OBS__M 0x2
133 #define ATV_TOP_COMM_MB_MUX_CTRL__W 4
147 #define ATV_TOP_COMM_MB_MUX_OBS__W 4
176 #define ATV_TOP_COMM_INT_STA_OVM_STA__M 0x2
196 #define ATV_TOP_COMM_INT_MSK_OVM_MSK__M 0x2
216 #define ATV_TOP_COMM_INT_STM_OVM_STM__M 0x2
277 #define ATV_TOP_NOISE_TH__W 4
346 #define ATV_TOP_MOD_CONTROL_MOD_IF__W 4
360 #define ATV_TOP_MOD_CONTROL_MOD_TH__W 4
380 #define ATV_TOP_STD_VID_POL__M 0x2
383 #define ATV_TOP_STD_VID_POL_POS 0x2
440 #define ATV_TOP_AF_SIF_ATT_M6DB 0x2
457 #define ATV_TOP_STDBY_CVBS_STDBY__M 0x2
460 #define ATV_TOP_STDBY_CVBS_STDBY_A1_STANDBY 0x2
461 #define ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE 0x2
499 #define ATV_TOP_OUT_CONF_SIF_DAC_SIGN__M 0x2
502 #define ATV_TOP_OUT_CONF_SIF_DAC_SIGN_SIGNED 0x2
518 #define ATV_TOP_OUT_CONF_SIF_DAC_BR__B 4
531 #define ATV_AFT_COMM_EXEC_HOLD 0x2
534 #define ATV_AFT_TST__W 4
571 #define AUD_TOP_COMM_MB_OBS__M 0x2
574 #define AUD_TOP_COMM_MB_OBS_OBS_ON 0x2
577 #define AUD_TOP_COMM_MB_MUX_CTRL__W 4
587 #define AUD_TOP_COMM_MB_MUX_OBS__W 4
602 #define AUD_TOP_TR_MDE_FIFO_SIZE__W 4
606 #define AUD_TOP_TR_MDE_RD_LOCK__B 4
614 #define AUD_TOP_TR_CTR__W 4
627 #define AUD_TOP_TR_CTR_FIFO_EMPTY__M 0x2
630 #define AUD_TOP_TR_CTR_FIFO_EMPTY_EMPTY 0x2
685 #define AUD_DEM_WR_MODUS_MOD_STATINTERR__M 0x2
688 #define AUD_DEM_WR_MODUS_MOD_STATINTERR_ENABLE 0x2
758 #define AUD_DEM_WR_STANDARD_SEL_STD_SEL_M_KOREA 0x2
782 #define AUD_DEM_RD_STANDARD_RES_STD_RESULT_NTSC_M_DUAL_CARRIER_FM 0x2
811 #define AUD_DEM_RD_STATUS_STAT_CARR_A__M 0x2
814 #define AUD_DEM_RD_STATUS_STAT_CARR_A_NOT_DETECTED 0x2
941 #define AUD_DSP_WR_AVC_AVC_DECAY__W 4
949 #define AUD_DSP_WR_AVC_AVC_REF_LEV__B 4
950 #define AUD_DSP_WR_AVC_AVC_REF_LEV__W 4
1030 #define AUD_DEM_WR_I2S_CONFIG2_I2S_ENABLE__B 4
1053 #define AUD_DEM_WR_I2S_CONFIG2_I2S_WS_MODE__M 0x2
1056 #define AUD_DEM_WR_I2S_CONFIG2_I2S_WS_MODE_DELAY 0x2
1100 #define AUD_DSP_WR_AV_SYNC_AV_STD_SEL_NTSC 0x2
1217 #define AUD_DEM_RD_NIC_C_AD_BITS_C__W 4
1248 #define AUD_DEM_RD_NIC_CIB_CIB1__M 0x2
1275 #define AUD_DEM_WR_FM_MATRIX_KOREAN_MATRIX 0x2
1370 #define FEC_COMM_EXEC_HOLD 0x2
1386 #define FEC_COMM_INT_REQ_RS_REQ__M 0x2
1412 #define FEC_TOP_COMM_EXEC_HOLD 0x2
1420 #define FEC_TOP_ANNEX_C 0x2
1429 #define FEC_DI_COMM_EXEC_HOLD 0x2
1443 #define FEC_DI_COMM_MB_OBS__M 0x2
1446 #define FEC_DI_COMM_MB_OBS_ON 0x2
1464 #define FEC_DI_COMM_INT_STA_TIMEOUT_INT__M 0x2
1477 #define FEC_DI_COMM_INT_MSK_TIMEOUT_INT__M 0x2
1490 #define FEC_DI_COMM_INT_STM_TIMEOUT_INT__M 0x2
1509 #define FEC_DI_MODE_IGNORE_LOST_SYNC__M 0x2
1518 #define FEC_DI_CONTROL_WORD__W 4
1543 #define FEC_RS_COMM_EXEC_HOLD 0x2
1557 #define FEC_RS_COMM_MB_OBS__M 0x2
1560 #define FEC_RS_COMM_MB_OBS_ON 0x2
1578 #define FEC_RS_COMM_INT_STA_MEASUREMENT_INT__M 0x2
1591 #define FEC_RS_COMM_INT_MSK_MEASUREMENT_MSK__M 0x2
1604 #define FEC_RS_COMM_INT_STM_MEASUREMENT_MSK__M 0x2
1652 #define FEC_RS_NR_BIT_ERRORS_EXP__W 4
1667 #define FEC_RS_NR_SYMBOL_ERRORS_EXP__W 4
1682 #define FEC_RS_NR_PACKET_ERRORS_EXP__W 4
1697 #define FEC_RS_NR_FAILURES_EXP__W 4
1707 #define FEC_OC_COMM_EXEC_HOLD 0x2
1721 #define FEC_OC_COMM_MB_OBS__M 0x2
1724 #define FEC_OC_COMM_MB_OBS_ON 0x2
1742 #define FEC_OC_COMM_INT_STA_SNC_LOCK_INT__M 0x2
1755 #define FEC_OC_COMM_INT_STA_FIFO_FULL_INT__B 4
1785 #define FEC_OC_COMM_INT_MSK_SNC_LOCK_MSK__M 0x2
1795 #define FEC_OC_COMM_INT_MSK_FIFO_FULL_MSK__B 4
1822 #define FEC_OC_COMM_INT_STM_SNC_LOCK_MSK__M 0x2
1832 #define FEC_OC_COMM_INT_STM_FIFO_FULL_MSK__B 4
1869 #define FEC_OC_STATUS_FIFO_EMPTY__B 4
1875 #define FEC_OC_MODE__W 4
1886 #define FEC_OC_MODE_TRANSPARENT__M 0x2
1911 #define FEC_OC_DPR_MODE_NOSYNC_ENABLE__M 0x2
1930 #define FEC_OC_DTO_MODE_DUTY_CYCLE__M 0x2
1984 #define FEC_OC_FCT_MODE_VIRT_ENA__M 0x2
1990 #define FEC_OC_FCT_USAGE__PRE 0x2
1995 #define FEC_OC_FCT_USAGE_USAGE__PRE 0x2
2048 #define FEC_OC_TMD_CTL_UPD_RATE__W 4
2053 #define FEC_OC_TMD_CTL_UPD_RATE_RATE__W 4
2058 #define FEC_OC_TMD_INT_UPD_RATE__W 4
2063 #define FEC_OC_TMD_INT_UPD_RATE_RATE__W 4
2068 #define FEC_OC_AVR_PARM_A__W 4
2073 #define FEC_OC_AVR_PARM_A_PARM__W 4
2078 #define FEC_OC_AVR_PARM_B__W 4
2083 #define FEC_OC_AVR_PARM_B_PARM__W 4
2128 #define FEC_OC_RCN_GAIN__W 4
2133 #define FEC_OC_RCN_GAIN_GAIN__W 4
2258 #define FEC_OC_SNC_MODE__W 4
2278 #define FEC_OC_SNC_LWM__W 4
2283 #define FEC_OC_SNC_LWM_MARK__W 4
2288 #define FEC_OC_SNC_HWM__W 4
2293 #define FEC_OC_SNC_HWM_MARK__W 4
2359 #define FEC_OC_IPR_MODE_REVERSE_ORDER__M 0x2
2372 #define FEC_OC_IPR_MODE_MVAL_DIS_PAR__B 4
2424 #define FEC_OC_IPR_INVERT_MD1__M 0x2
2437 #define FEC_OC_IPR_INVERT_MD4__B 4
2478 #define FEC_OC_OCR_MODE__W 4
2489 #define FEC_OC_OCR_MODE_GRAB_ENABLE__M 0x2
2503 #define FEC_OC_OCR_RATE__W 4
2508 #define FEC_OC_OCR_RATE_RATE__W 4
2543 #define FEC_OC_OCR_GRAB_SYNC_BIT_SEL__W 4
2624 #define IQM_COMM_EXEC_HOLD 0x2
2642 #define IQM_COMM_INT_REQ_CF_REQ__M 0x2
2664 #define IQM_FS_COMM_EXEC_HOLD 0x2
2678 #define IQM_FS_COMM_MB_OBS__M 0x2
2681 #define IQM_FS_COMM_MB_OBS_OBS_ON 0x2
2706 #define IQM_FS_ADJ_SEL_VSB 0x2
2714 #define IQM_FD_COMM_EXEC_HOLD 0x2
2728 #define IQM_FD_COMM_MB_OBS__M 0x2
2731 #define IQM_FD_COMM_MB_OBS_OBS_ON 0x2
2739 #define IQM_RC_COMM_EXEC_HOLD 0x2
2753 #define IQM_RC_COMM_MB_OBS__M 0x2
2756 #define IQM_RC_COMM_MB_OBS_OBS_ON 0x2
2781 #define IQM_RC_ADJ_SEL_VSB 0x2
2807 #define IQM_RT_COMM_EXEC_HOLD 0x2
2821 #define IQM_RT_COMM_MB_OBS__M 0x2
2824 #define IQM_RT_COMM_MB_OBS_OBS_ON 0x2
2840 #define IQM_RT_ACTIVE_ACTIVE_CR__M 0x2
2843 #define IQM_RT_ACTIVE_ACTIVE_CR_ATV_CR_ON 0x2
2866 #define IQM_RT_ROT_BP_ROT_BPF__M 0x2
2885 #define IQM_CF_COMM_EXEC_HOLD 0x2
2899 #define IQM_CF_COMM_MB_OBS__M 0x2
2902 #define IQM_CF_COMM_MB_OBS_OBS_ON 0x2
2947 #define IQM_CF_SYMMETRIC_IM__M 0x2
2962 #define IQM_CF_MIDTAP_IM__M 0x2
2963 #define IQM_CF_MIDTAP_IM__PRE 0x2
2977 #define IQM_CF_OUT_ENA_QAM__M 0x2
3007 #define IQM_CF_POW_MEAS_LEN__PRE 0x2
3014 #define IQM_CF_POW__PRE 0x2
3018 #define IQM_CF_TAP_RE0__PRE 0x2
3022 #define IQM_CF_TAP_RE1__PRE 0x2
3026 #define IQM_CF_TAP_RE2__PRE 0x2
3030 #define IQM_CF_TAP_RE3__PRE 0x2
3034 #define IQM_CF_TAP_RE4__PRE 0x2
3038 #define IQM_CF_TAP_RE5__PRE 0x2
3042 #define IQM_CF_TAP_RE6__PRE 0x2
3046 #define IQM_CF_TAP_RE7__PRE 0x2
3050 #define IQM_CF_TAP_RE8__PRE 0x2
3054 #define IQM_CF_TAP_RE9__PRE 0x2
3058 #define IQM_CF_TAP_RE10__PRE 0x2
3062 #define IQM_CF_TAP_RE11__PRE 0x2
3066 #define IQM_CF_TAP_RE12__PRE 0x2
3070 #define IQM_CF_TAP_RE13__PRE 0x2
3074 #define IQM_CF_TAP_RE14__PRE 0x2
3078 #define IQM_CF_TAP_RE15__PRE 0x2
3082 #define IQM_CF_TAP_RE16__PRE 0x2
3086 #define IQM_CF_TAP_RE17__PRE 0x2
3090 #define IQM_CF_TAP_RE18__PRE 0x2
3094 #define IQM_CF_TAP_RE19__PRE 0x2
3098 #define IQM_CF_TAP_RE20__PRE 0x2
3102 #define IQM_CF_TAP_RE21__PRE 0x2
3106 #define IQM_CF_TAP_RE22__PRE 0x2
3110 #define IQM_CF_TAP_RE23__PRE 0x2
3114 #define IQM_CF_TAP_RE24__PRE 0x2
3118 #define IQM_CF_TAP_RE25__PRE 0x2
3122 #define IQM_CF_TAP_RE26__PRE 0x2
3126 #define IQM_CF_TAP_RE27__PRE 0x2
3130 #define IQM_CF_TAP_IM0__PRE 0x2
3134 #define IQM_CF_TAP_IM1__PRE 0x2
3138 #define IQM_CF_TAP_IM2__PRE 0x2
3142 #define IQM_CF_TAP_IM3__PRE 0x2
3146 #define IQM_CF_TAP_IM4__PRE 0x2
3150 #define IQM_CF_TAP_IM5__PRE 0x2
3154 #define IQM_CF_TAP_IM6__PRE 0x2
3158 #define IQM_CF_TAP_IM7__PRE 0x2
3162 #define IQM_CF_TAP_IM8__PRE 0x2
3166 #define IQM_CF_TAP_IM9__PRE 0x2
3170 #define IQM_CF_TAP_IM10__PRE 0x2
3174 #define IQM_CF_TAP_IM11__PRE 0x2
3178 #define IQM_CF_TAP_IM12__PRE 0x2
3182 #define IQM_CF_TAP_IM13__PRE 0x2
3186 #define IQM_CF_TAP_IM14__PRE 0x2
3190 #define IQM_CF_TAP_IM15__PRE 0x2
3194 #define IQM_CF_TAP_IM16__PRE 0x2
3198 #define IQM_CF_TAP_IM17__PRE 0x2
3202 #define IQM_CF_TAP_IM18__PRE 0x2
3206 #define IQM_CF_TAP_IM19__PRE 0x2
3210 #define IQM_CF_TAP_IM20__PRE 0x2
3214 #define IQM_CF_TAP_IM21__PRE 0x2
3218 #define IQM_CF_TAP_IM22__PRE 0x2
3222 #define IQM_CF_TAP_IM23__PRE 0x2
3226 #define IQM_CF_TAP_IM24__PRE 0x2
3230 #define IQM_CF_TAP_IM25__PRE 0x2
3234 #define IQM_CF_TAP_IM26__PRE 0x2
3238 #define IQM_CF_TAP_IM27__PRE 0x2
3246 #define IQM_AF_COMM_EXEC_HOLD 0x2
3260 #define IQM_AF_COMM_MB_OBS__M 0x2
3263 #define IQM_AF_COMM_MB_OBS_OBS_ON 0x2
3297 #define IQM_AF_COMM_INT_STA_SNS_INT_STA__M 0x2
3310 #define IQM_AF_COMM_INT_MSK_SNS_INT_MSK__M 0x2
3323 #define IQM_AF_COMM_INT_STM_SNS_INT_STA__M 0x2
3349 #define IQM_AF_CLKNEG_CLKNEGDATA__M 0x2
3352 #define IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_NEG 0x2
3424 #define IQM_AF_ADC_CONF__W 4
3437 #define IQM_AF_ADC_CONF_BITREVERSE_ADC__M 0x2
3440 #define IQM_AF_ADC_CONF_BITREVERSE_ADC_ADC_BITREVERSED 0x2
3508 #define IQM_AF_PGA_GAIN__W 4
3534 #define IQM_AF_STDBY_STDBY_ADC__M 0x2
3537 #define IQM_AF_STDBY_STDBY_ADC_A1_STANDBY 0x2
3538 #define IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE 0x2
3559 #define IQM_AF_STDBY_STDBY_TAGC_IF__B 4
3600 #define ORX_COMM_EXEC_HOLD 0x2
3620 #define ORX_COMM_INT_REQ_DDC_REQ__M 0x2
3630 #define ORX_COMM_INT_REQ_NSU_REQ__B 4
3654 #define ORX_TOP_COMM_EXEC_HOLD 0x2
3665 #define ORX_TOP_MDE_W__PRE 0x2
3668 #define ORX_TOP_MDE_W_RATE_2048KBPS_SQRT 0x2
3683 #define ORX_TOP_AIF_CTRL_W_BIT_REVERSE__M 0x2
3686 #define ORX_TOP_AIF_CTRL_W_BIT_REVERSE_REVERSAL_BIT_ORDER_ADC 0x2
3700 #define ORX_FWP_COMM_EXEC_HOLD 0x2
3714 #define ORX_FWP_COMM_MB_OBS__M 0x2
3717 #define ORX_FWP_COMM_MB_OBS_ON 0x2
3781 #define ORX_FWP_KR1_LDT_W__PRE 0x2
3793 #define ORX_FWP_SRC_DGN_W_EXP__W 4
3818 #define ORX_EQU_COMM_EXEC_HOLD 0x2
3832 #define ORX_EQU_COMM_MB_OBS__M 0x2
3835 #define ORX_EQU_COMM_MB_OBS_ON 0x2
3863 #define ORX_EQU_COMM_INT_STA_FBF_READ__M 0x2
3876 #define ORX_EQU_COMM_INT_MSK_FBF_READ__M 0x2
3889 #define ORX_EQU_COMM_INT_STM_FBF_READ__M 0x2
3909 #define ORX_EQU_FFF_STP_W__PRE 0x2
3912 #define ORX_EQU_FFF_LEA_W__W 4
4048 #define ORX_EQU_FBF_STP_W__PRE 0x2
4051 #define ORX_EQU_FBF_LEA_W__W 4
4175 #define ORX_DDC_COMM_EXEC_HOLD 0x2
4189 #define ORX_DDC_COMM_MB_OBS__M 0x2
4192 #define ORX_DDC_COMM_MB_OBS_ON 0x2
4199 #define ORX_DDC_COMM_MB_OBS_MUX__B 4
4239 #define ORX_DDC_DEC_MAP_W_QUADR2__B 4
4267 #define ORX_DDC_OFO_SET_W_PHASE__PRE 0x2
4290 #define ORX_CON_COMM_EXEC_HOLD 0x2
4303 #define ORX_CON_RST_W__W 4
4314 #define ORX_CON_RST_W_CTI__M 0x2
4343 #define ORX_CON_CPH_KDF_W__W 4
4348 #define ORX_CON_CPH_KPF_W__W 4
4353 #define ORX_CON_CPH_KIF_W__W 4
4377 #define ORX_CON_CPH_WLC_W_LATC__W 4
4381 #define ORX_CON_CPH_WLC_W_WLIM__B 4
4382 #define ORX_CON_CPH_WLC_W_WLIM__W 4
4412 #define ORX_CON_CTI_KDT_W__W 4
4417 #define ORX_CON_CTI_KPT_W__W 4
4422 #define ORX_CON_CTI_KIT_W__W 4
4427 #define ORX_CON_CTI_TAT_W__W 4
4437 #define ORX_NSU_COMM_EXEC_HOLD 0x2
4455 #define ORX_NSU_AOX_STDBY_W_STDBYAMP__M 0x2
4458 #define ORX_NSU_AOX_STDBY_W_STDBYAMP_A1_OFF 0x2
4460 #define ORX_NSU_AOX_STDBY_W_STDBYAMP_A2_ON 0x2
4480 #define ORX_NSU_AOX_STDBY_W_STDBYPD__B 4
4546 #define ORX_NSU_AOX_LOPOW_W_POWER_MINUS10DB 0x2
4580 #define ORX_NSU_NSS_BITSWAP_W_BITSWAP_NS1_IF__M 0x2
4594 #define ORX_TST_COMM_EXEC_HOLD 0x2
4607 #define QAM_COMM_EXEC_HOLD 0x2
4625 #define QAM_COMM_INT_REQ_LC_REQ__M 0x2
4657 #define QAM_TOP_COMM_EXEC_HOLD 0x2
4665 #define QAM_TOP_ANNEX_C 0x2
4674 #define QAM_TOP_CONSTELLATION_QAM8 0x2
4687 #define QAM_FQ_COMM_EXEC_HOLD 0x2
4702 #define QAM_FQ_MODE_TAPLMS__M 0x2
4704 #define QAM_FQ_MODE_TAPLMS_UPD 0x2
4718 #define QAM_FQ_LA_FACTOR__W 4
4744 #define QAM_FQ_TAP_RE_EL0__PRE 0x2
4749 #define QAM_FQ_TAP_RE_EL0_TAP__PRE 0x2
4754 #define QAM_FQ_TAP_IM_EL0__PRE 0x2
4759 #define QAM_FQ_TAP_IM_EL0_TAP__PRE 0x2
4764 #define QAM_FQ_TAP_RE_EL1__PRE 0x2
4769 #define QAM_FQ_TAP_RE_EL1_TAP__PRE 0x2
4774 #define QAM_FQ_TAP_IM_EL1__PRE 0x2
4779 #define QAM_FQ_TAP_IM_EL1_TAP__PRE 0x2
4784 #define QAM_FQ_TAP_RE_EL2__PRE 0x2
4789 #define QAM_FQ_TAP_RE_EL2_TAP__PRE 0x2
4794 #define QAM_FQ_TAP_IM_EL2__PRE 0x2
4799 #define QAM_FQ_TAP_IM_EL2_TAP__PRE 0x2
4804 #define QAM_FQ_TAP_RE_EL3__PRE 0x2
4809 #define QAM_FQ_TAP_RE_EL3_TAP__PRE 0x2
4814 #define QAM_FQ_TAP_IM_EL3__PRE 0x2
4819 #define QAM_FQ_TAP_IM_EL3_TAP__PRE 0x2
4824 #define QAM_FQ_TAP_RE_EL4__PRE 0x2
4829 #define QAM_FQ_TAP_RE_EL4_TAP__PRE 0x2
4834 #define QAM_FQ_TAP_IM_EL4__PRE 0x2
4839 #define QAM_FQ_TAP_IM_EL4_TAP__PRE 0x2
4844 #define QAM_FQ_TAP_RE_EL5__PRE 0x2
4849 #define QAM_FQ_TAP_RE_EL5_TAP__PRE 0x2
4854 #define QAM_FQ_TAP_IM_EL5__PRE 0x2
4859 #define QAM_FQ_TAP_IM_EL5_TAP__PRE 0x2
4864 #define QAM_FQ_TAP_RE_EL6__PRE 0x2
4869 #define QAM_FQ_TAP_RE_EL6_TAP__PRE 0x2
4874 #define QAM_FQ_TAP_IM_EL6__PRE 0x2
4879 #define QAM_FQ_TAP_IM_EL6_TAP__PRE 0x2
4884 #define QAM_FQ_TAP_RE_EL7__PRE 0x2
4889 #define QAM_FQ_TAP_RE_EL7_TAP__PRE 0x2
4894 #define QAM_FQ_TAP_IM_EL7__PRE 0x2
4899 #define QAM_FQ_TAP_IM_EL7_TAP__PRE 0x2
4904 #define QAM_FQ_TAP_RE_EL8__PRE 0x2
4909 #define QAM_FQ_TAP_RE_EL8_TAP__PRE 0x2
4914 #define QAM_FQ_TAP_IM_EL8__PRE 0x2
4919 #define QAM_FQ_TAP_IM_EL8_TAP__PRE 0x2
4924 #define QAM_FQ_TAP_RE_EL9__PRE 0x2
4929 #define QAM_FQ_TAP_RE_EL9_TAP__PRE 0x2
4934 #define QAM_FQ_TAP_IM_EL9__PRE 0x2
4939 #define QAM_FQ_TAP_IM_EL9_TAP__PRE 0x2
4944 #define QAM_FQ_TAP_RE_EL10__PRE 0x2
4949 #define QAM_FQ_TAP_RE_EL10_TAP__PRE 0x2
4954 #define QAM_FQ_TAP_IM_EL10__PRE 0x2
4959 #define QAM_FQ_TAP_IM_EL10_TAP__PRE 0x2
4964 #define QAM_FQ_TAP_RE_EL11__PRE 0x2
4969 #define QAM_FQ_TAP_RE_EL11_TAP__PRE 0x2
4974 #define QAM_FQ_TAP_IM_EL11__PRE 0x2
4979 #define QAM_FQ_TAP_IM_EL11_TAP__PRE 0x2
4984 #define QAM_FQ_TAP_RE_EL12__PRE 0x2
4989 #define QAM_FQ_TAP_RE_EL12_TAP__PRE 0x2
4994 #define QAM_FQ_TAP_IM_EL12__PRE 0x2
4999 #define QAM_FQ_TAP_IM_EL12_TAP__PRE 0x2
5004 #define QAM_FQ_TAP_RE_EL13__PRE 0x2
5009 #define QAM_FQ_TAP_RE_EL13_TAP__PRE 0x2
5014 #define QAM_FQ_TAP_IM_EL13__PRE 0x2
5019 #define QAM_FQ_TAP_IM_EL13_TAP__PRE 0x2
5024 #define QAM_FQ_TAP_RE_EL14__PRE 0x2
5029 #define QAM_FQ_TAP_RE_EL14_TAP__PRE 0x2
5034 #define QAM_FQ_TAP_IM_EL14__PRE 0x2
5039 #define QAM_FQ_TAP_IM_EL14_TAP__PRE 0x2
5044 #define QAM_FQ_TAP_RE_EL15__PRE 0x2
5049 #define QAM_FQ_TAP_RE_EL15_TAP__PRE 0x2
5054 #define QAM_FQ_TAP_IM_EL15__PRE 0x2
5059 #define QAM_FQ_TAP_IM_EL15_TAP__PRE 0x2
5064 #define QAM_FQ_TAP_RE_EL16__PRE 0x2
5069 #define QAM_FQ_TAP_RE_EL16_TAP__PRE 0x2
5074 #define QAM_FQ_TAP_IM_EL16__PRE 0x2
5079 #define QAM_FQ_TAP_IM_EL16_TAP__PRE 0x2
5084 #define QAM_FQ_TAP_RE_EL17__PRE 0x2
5089 #define QAM_FQ_TAP_RE_EL17_TAP__PRE 0x2
5094 #define QAM_FQ_TAP_IM_EL17__PRE 0x2
5099 #define QAM_FQ_TAP_IM_EL17_TAP__PRE 0x2
5104 #define QAM_FQ_TAP_RE_EL18__PRE 0x2
5109 #define QAM_FQ_TAP_RE_EL18_TAP__PRE 0x2
5114 #define QAM_FQ_TAP_IM_EL18__PRE 0x2
5119 #define QAM_FQ_TAP_IM_EL18_TAP__PRE 0x2
5134 #define QAM_FQ_TAP_IM_EL19__PRE 0x2
5139 #define QAM_FQ_TAP_IM_EL19_TAP__PRE 0x2
5144 #define QAM_FQ_TAP_RE_EL20__PRE 0x2
5149 #define QAM_FQ_TAP_RE_EL20_TAP__PRE 0x2
5154 #define QAM_FQ_TAP_IM_EL20__PRE 0x2
5159 #define QAM_FQ_TAP_IM_EL20_TAP__PRE 0x2
5164 #define QAM_FQ_TAP_RE_EL21__PRE 0x2
5169 #define QAM_FQ_TAP_RE_EL21_TAP__PRE 0x2
5174 #define QAM_FQ_TAP_IM_EL21__PRE 0x2
5179 #define QAM_FQ_TAP_IM_EL21_TAP__PRE 0x2
5184 #define QAM_FQ_TAP_RE_EL22__PRE 0x2
5189 #define QAM_FQ_TAP_RE_EL22_TAP__PRE 0x2
5194 #define QAM_FQ_TAP_IM_EL22__PRE 0x2
5199 #define QAM_FQ_TAP_IM_EL22_TAP__PRE 0x2
5204 #define QAM_FQ_TAP_RE_EL23__PRE 0x2
5209 #define QAM_FQ_TAP_RE_EL23_TAP__PRE 0x2
5214 #define QAM_FQ_TAP_IM_EL23__PRE 0x2
5219 #define QAM_FQ_TAP_IM_EL23_TAP__PRE 0x2
5227 #define QAM_SL_COMM_EXEC_HOLD 0x2
5230 #define QAM_SL_COMM_MB__W 4
5241 #define QAM_SL_COMM_MB_OBS__M 0x2
5244 #define QAM_SL_COMM_MB_OBS_ON 0x2
5270 #define QAM_SL_COMM_INT_STA_MER_INT__M 0x2
5283 #define QAM_SL_COMM_INT_MSK_MER_MSK__M 0x2
5296 #define QAM_SL_COMM_INT_STM_MER_STM__M 0x2
5310 #define QAM_SL_MODE_SLICER4LC_RAD 0x2
5320 #define QAM_SL_MODE_SLICER4VD__B 4
5354 #define QAM_SL_K_FACTOR__W 4
5368 #define QAM_SL_MEDIAN_CORRECT__W 4
5422 #define QAM_DQ_COMM_EXEC_HOLD 0x2
5437 #define QAM_DQ_MODE_TAPLMS__M 0x2
5439 #define QAM_DQ_MODE_TAPLMS_UPD 0x2
5462 #define QAM_DQ_LA_FACTOR__W 4
5572 #define QAM_DQ_TAP_RE_EL0__PRE 0x2
5577 #define QAM_DQ_TAP_RE_EL0_TAP__PRE 0x2
5582 #define QAM_DQ_TAP_IM_EL0__PRE 0x2
5587 #define QAM_DQ_TAP_IM_EL0_TAP__PRE 0x2
5592 #define QAM_DQ_TAP_RE_EL1__PRE 0x2
5597 #define QAM_DQ_TAP_RE_EL1_TAP__PRE 0x2
5602 #define QAM_DQ_TAP_IM_EL1__PRE 0x2
5607 #define QAM_DQ_TAP_IM_EL1_TAP__PRE 0x2
5612 #define QAM_DQ_TAP_RE_EL2__PRE 0x2
5617 #define QAM_DQ_TAP_RE_EL2_TAP__PRE 0x2
5622 #define QAM_DQ_TAP_IM_EL2__PRE 0x2
5627 #define QAM_DQ_TAP_IM_EL2_TAP__PRE 0x2
5632 #define QAM_DQ_TAP_RE_EL3__PRE 0x2
5637 #define QAM_DQ_TAP_RE_EL3_TAP__PRE 0x2
5642 #define QAM_DQ_TAP_IM_EL3__PRE 0x2
5647 #define QAM_DQ_TAP_IM_EL3_TAP__PRE 0x2
5652 #define QAM_DQ_TAP_RE_EL4__PRE 0x2
5657 #define QAM_DQ_TAP_RE_EL4_TAP__PRE 0x2
5662 #define QAM_DQ_TAP_IM_EL4__PRE 0x2
5667 #define QAM_DQ_TAP_IM_EL4_TAP__PRE 0x2
5672 #define QAM_DQ_TAP_RE_EL5__PRE 0x2
5677 #define QAM_DQ_TAP_RE_EL5_TAP__PRE 0x2
5682 #define QAM_DQ_TAP_IM_EL5__PRE 0x2
5687 #define QAM_DQ_TAP_IM_EL5_TAP__PRE 0x2
5692 #define QAM_DQ_TAP_RE_EL6__PRE 0x2
5697 #define QAM_DQ_TAP_RE_EL6_TAP__PRE 0x2
5702 #define QAM_DQ_TAP_IM_EL6__PRE 0x2
5707 #define QAM_DQ_TAP_IM_EL6_TAP__PRE 0x2
5712 #define QAM_DQ_TAP_RE_EL7__PRE 0x2
5717 #define QAM_DQ_TAP_RE_EL7_TAP__PRE 0x2
5722 #define QAM_DQ_TAP_IM_EL7__PRE 0x2
5727 #define QAM_DQ_TAP_IM_EL7_TAP__PRE 0x2
5732 #define QAM_DQ_TAP_RE_EL8__PRE 0x2
5737 #define QAM_DQ_TAP_RE_EL8_TAP__PRE 0x2
5742 #define QAM_DQ_TAP_IM_EL8__PRE 0x2
5747 #define QAM_DQ_TAP_IM_EL8_TAP__PRE 0x2
5752 #define QAM_DQ_TAP_RE_EL9__PRE 0x2
5757 #define QAM_DQ_TAP_RE_EL9_TAP__PRE 0x2
5762 #define QAM_DQ_TAP_IM_EL9__PRE 0x2
5767 #define QAM_DQ_TAP_IM_EL9_TAP__PRE 0x2
5772 #define QAM_DQ_TAP_RE_EL10__PRE 0x2
5777 #define QAM_DQ_TAP_RE_EL10_TAP__PRE 0x2
5782 #define QAM_DQ_TAP_IM_EL10__PRE 0x2
5787 #define QAM_DQ_TAP_IM_EL10_TAP__PRE 0x2
5792 #define QAM_DQ_TAP_RE_EL11__PRE 0x2
5797 #define QAM_DQ_TAP_RE_EL11_TAP__PRE 0x2
5802 #define QAM_DQ_TAP_IM_EL11__PRE 0x2
5807 #define QAM_DQ_TAP_IM_EL11_TAP__PRE 0x2
5812 #define QAM_DQ_TAP_RE_EL12__PRE 0x2
5817 #define QAM_DQ_TAP_RE_EL12_TAP__PRE 0x2
5822 #define QAM_DQ_TAP_IM_EL12__PRE 0x2
5827 #define QAM_DQ_TAP_IM_EL12_TAP__PRE 0x2
5832 #define QAM_DQ_TAP_RE_EL13__PRE 0x2
5837 #define QAM_DQ_TAP_RE_EL13_TAP__PRE 0x2
5842 #define QAM_DQ_TAP_IM_EL13__PRE 0x2
5847 #define QAM_DQ_TAP_IM_EL13_TAP__PRE 0x2
5852 #define QAM_DQ_TAP_RE_EL14__PRE 0x2
5857 #define QAM_DQ_TAP_RE_EL14_TAP__PRE 0x2
5862 #define QAM_DQ_TAP_IM_EL14__PRE 0x2
5867 #define QAM_DQ_TAP_IM_EL14_TAP__PRE 0x2
5872 #define QAM_DQ_TAP_RE_EL15__PRE 0x2
5877 #define QAM_DQ_TAP_RE_EL15_TAP__PRE 0x2
5882 #define QAM_DQ_TAP_IM_EL15__PRE 0x2
5887 #define QAM_DQ_TAP_IM_EL15_TAP__PRE 0x2
5892 #define QAM_DQ_TAP_RE_EL16__PRE 0x2
5897 #define QAM_DQ_TAP_RE_EL16_TAP__PRE 0x2
5902 #define QAM_DQ_TAP_IM_EL16__PRE 0x2
5907 #define QAM_DQ_TAP_IM_EL16_TAP__PRE 0x2
5912 #define QAM_DQ_TAP_RE_EL17__PRE 0x2
5917 #define QAM_DQ_TAP_RE_EL17_TAP__PRE 0x2
5922 #define QAM_DQ_TAP_IM_EL17__PRE 0x2
5927 #define QAM_DQ_TAP_IM_EL17_TAP__PRE 0x2
5932 #define QAM_DQ_TAP_RE_EL18__PRE 0x2
5937 #define QAM_DQ_TAP_RE_EL18_TAP__PRE 0x2
5942 #define QAM_DQ_TAP_IM_EL18__PRE 0x2
5947 #define QAM_DQ_TAP_IM_EL18_TAP__PRE 0x2
5952 #define QAM_DQ_TAP_RE_EL19__PRE 0x2
5957 #define QAM_DQ_TAP_RE_EL19_TAP__PRE 0x2
5962 #define QAM_DQ_TAP_IM_EL19__PRE 0x2
5967 #define QAM_DQ_TAP_IM_EL19_TAP__PRE 0x2
5972 #define QAM_DQ_TAP_RE_EL20__PRE 0x2
5977 #define QAM_DQ_TAP_RE_EL20_TAP__PRE 0x2
5982 #define QAM_DQ_TAP_IM_EL20__PRE 0x2
5987 #define QAM_DQ_TAP_IM_EL20_TAP__PRE 0x2
5992 #define QAM_DQ_TAP_RE_EL21__PRE 0x2
5997 #define QAM_DQ_TAP_RE_EL21_TAP__PRE 0x2
6002 #define QAM_DQ_TAP_IM_EL21__PRE 0x2
6007 #define QAM_DQ_TAP_IM_EL21_TAP__PRE 0x2
6012 #define QAM_DQ_TAP_RE_EL22__PRE 0x2
6017 #define QAM_DQ_TAP_RE_EL22_TAP__PRE 0x2
6022 #define QAM_DQ_TAP_IM_EL22__PRE 0x2
6027 #define QAM_DQ_TAP_IM_EL22_TAP__PRE 0x2
6032 #define QAM_DQ_TAP_RE_EL23__PRE 0x2
6037 #define QAM_DQ_TAP_RE_EL23_TAP__PRE 0x2
6042 #define QAM_DQ_TAP_IM_EL23__PRE 0x2
6047 #define QAM_DQ_TAP_IM_EL23_TAP__PRE 0x2
6052 #define QAM_DQ_TAP_RE_EL24__PRE 0x2
6057 #define QAM_DQ_TAP_RE_EL24_TAP__PRE 0x2
6062 #define QAM_DQ_TAP_IM_EL24__PRE 0x2
6067 #define QAM_DQ_TAP_IM_EL24_TAP__PRE 0x2
6072 #define QAM_DQ_TAP_RE_EL25__PRE 0x2
6077 #define QAM_DQ_TAP_RE_EL25_TAP__PRE 0x2
6082 #define QAM_DQ_TAP_IM_EL25__PRE 0x2
6087 #define QAM_DQ_TAP_IM_EL25_TAP__PRE 0x2
6092 #define QAM_DQ_TAP_RE_EL26__PRE 0x2
6097 #define QAM_DQ_TAP_RE_EL26_TAP__PRE 0x2
6102 #define QAM_DQ_TAP_IM_EL26__PRE 0x2
6107 #define QAM_DQ_TAP_IM_EL26_TAP__PRE 0x2
6112 #define QAM_DQ_TAP_RE_EL27__PRE 0x2
6117 #define QAM_DQ_TAP_RE_EL27_TAP__PRE 0x2
6122 #define QAM_DQ_TAP_IM_EL27__PRE 0x2
6127 #define QAM_DQ_TAP_IM_EL27_TAP__PRE 0x2
6135 #define QAM_LC_COMM_EXEC_HOLD 0x2
6149 #define QAM_LC_COMM_MB_OBS__M 0x2
6152 #define QAM_LC_COMM_MB_OBS_ON 0x2
6170 #define QAM_LC_COMM_INT_STA_OVERFLOW__M 0x2
6188 #define QAM_LC_COMM_INT_MSK_OVERFLOW__M 0x2
6205 #define QAM_LC_COMM_INT_STM_OVERFLOW__M 0x2
6224 #define QAM_LC_MODE_ENABLE_F__M 0x2
6225 #define QAM_LC_MODE_ENABLE_F__PRE 0x2
6507 #define QAM_LC_MTA_LENGTH__PRE 0x2
6512 #define QAM_LC_MTA_LENGTH_LENGTH__PRE 0x2
6590 #define QAM_VD_COMM_EXEC_HOLD 0x2
6604 #define QAM_VD_COMM_MB_OBS__M 0x2
6607 #define QAM_VD_COMM_MB_OBS_ON 0x2
6625 #define QAM_VD_COMM_INT_STA_PERIOD_INT__M 0x2
6638 #define QAM_VD_COMM_INT_MSK_PERIOD_INT__M 0x2
6651 #define QAM_VD_COMM_INT_STM_PERIOD_INT__M 0x2
6739 #define QAM_VD_DELTA_PATH_METRIC_EXP__W 4
6754 #define QAM_VD_NR_QSYM_ERRORS_EXP__W 4
6769 #define QAM_VD_NR_SYMBOL_ERRORS_EXP__W 4
6789 #define QAM_SY_COMM_EXEC_HOLD 0x2
6803 #define QAM_SY_COMM_MB_OBS__M 0x2
6806 #define QAM_SY_COMM_MB_OBS_ON 0x2
6813 #define QAM_SY_COMM_INT_STA__W 4
6824 #define QAM_SY_COMM_INT_STA_UNLOCK_INT__M 0x2
6838 #define QAM_SY_COMM_INT_MSK__W 4
6847 #define QAM_SY_COMM_INT_MSK_UNLOCK_MSK__M 0x2
6859 #define QAM_SY_COMM_INT_STM__W 4
6868 #define QAM_SY_COMM_INT_STM_UNLOCK_MSK__M 0x2
6895 #define QAM_SY_SYNC_LWM__W 4
6897 #define QAM_SY_SYNC_LWM__PRE 0x2
6900 #define QAM_SY_SYNC_AWM__W 4
6905 #define QAM_SY_SYNC_HWM__W 4
6914 #define QAM_SY_CONTROL_WORD__W 4
6919 #define QAM_SY_CONTROL_WORD_CTRL_WORD__W 4
6935 #define SCU_COMM_EXEC_HOLD 0x2
6953 #define SCU_TOP_COMM_EXEC_HOLD 0x2
6973 #define SCU_TOP_MWAIT_CTR_READY_DIS__M 0x2
6976 #define SCU_TOP_MWAIT_CTR_READY_DIS_NMI_OFF 0x2
7032 #define SCU_RAM_AGC_KI_DGAIN__W 4
7036 #define SCU_RAM_AGC_KI_RF__B 4
7037 #define SCU_RAM_AGC_KI_RF__W 4
7042 #define SCU_RAM_AGC_KI_IF__W 4
7076 #define SCU_RAM_AGC_KI_RED_IAGC_RED__B 4
7106 #define SCU_RAM_AGC_KI_MIN_DGAIN__W 4
7110 #define SCU_RAM_AGC_KI_MIN_RF__B 4
7111 #define SCU_RAM_AGC_KI_MIN_RF__W 4
7116 #define SCU_RAM_AGC_KI_MIN_IF__W 4
7126 #define SCU_RAM_AGC_KI_MAX_DGAIN__W 4
7130 #define SCU_RAM_AGC_KI_MAX_RF__B 4
7131 #define SCU_RAM_AGC_KI_MAX_RF__W 4
7136 #define SCU_RAM_AGC_KI_MAX_IF__W 4
7335 #define SCU_RAM_AGC_CLP_CTRL_MODE_FAST_CLP_BP__M 0x2
7338 #define SCU_RAM_AGC_CLP_CTRL_MODE_FAST_CLP_BP_FCC_DISABLE 0x2
7727 #define SCU_RAM_ORX_SCU_STATE_DGN_HUNT 0x2
7747 #define SCU_RAM_ORX_TARGET_MODE_2048KBPS_SQRT 0x2
8063 #define SCU_RAM_ORX_RST_CPH__W 4
8068 #define SCU_RAM_ORX_RST_CPH_RST_CPH__W 4
8073 #define SCU_RAM_ORX_RST_CTI__W 4
8078 #define SCU_RAM_ORX_RST_CTI_RST_CTI__W 4
8083 #define SCU_RAM_ORX_RST_KRN__W 4
8088 #define SCU_RAM_ORX_RST_KRN_RST_KRN__W 4
8093 #define SCU_RAM_ORX_RST_KRP__W 4
8098 #define SCU_RAM_ORX_RST_KRP_RST_KRP__W 4
8111 #define SCU_RAM_ATV_STANDARD_STANDARD_MN 0x2
8156 #define SCU_RAM_ATV_LOCK_SYNC_FLAG__M 0x2
8159 #define SCU_RAM_ATV_LOCK_SYNC_FLAG_SYNC 0x2
8190 #define SCU_RAM_ATV_AGC_MODE_SIF_STD__B 4
8465 #define SCU_RAM_QAM_PARAM_ANNEX_BIT_ANNEX_C 0x2
8495 #define SCU_RAM_QAM_PARAM_INTERLEAVE_BIT_I128_J2 0x2
8713 #define SCU_RAM_QAM_FSM_STATE_TGT__W 4
8718 #define SCU_RAM_QAM_FSM_STATE_TGT_BIT__W 4
8723 #define SCU_RAM_QAM_FSM_STATE_TGT_BIT_HUNTING_FREQ 0x2
9207 #define SCU_RAM_QAM_CTL_ENA_ACQ__M 0x2
9220 #define SCU_RAM_QAM_CTL_ENA_LC__B 4
9312 #define SCU_RAM_QAM_ACTIVE_INTERLEAVE_BIT_I128_J2 0x2
9348 #define SCU_RAM_QAM_LOCKED_INTLEVEL_RATE_OK 0x2
9376 #define SCU_RAM_QAM_EVENTS_OCC_HI_PACKET_FAIL__M 0x2
9389 #define SCU_RAM_QAM_EVENTS_OCC_HI_OC_LOCK_OUT__B 4
9430 #define SCU_RAM_QAM_EVENTS_OCC_HI_RSV__W 4
9446 #define SCU_RAM_QAM_EVENTS_OCC_LO_CLIP__M 0x2
9459 #define SCU_RAM_QAM_EVENTS_OCC_LO_MEDIAN__B 4
9650 #define SCU_RAM_QAM_FSM_STATE__W 4
9655 #define SCU_RAM_QAM_FSM_STATE_BIT__W 4
9660 #define SCU_RAM_QAM_FSM_STATE_BIT_HUNTING_FREQ 0x2
9668 #define SCU_RAM_QAM_FSM_STATE_NEW__W 4
9673 #define SCU_RAM_QAM_FSM_STATE_NEW_BIT__W 4
9678 #define SCU_RAM_QAM_FSM_STATE_NEW_BIT_HUNTING_FREQ 0x2
9697 #define SCU_RAM_QAM_FSM_LOCK_FLAGS_LCK_RATEVAR__M 0x2
9710 #define SCU_RAM_QAM_FSM_LOCK_FLAGS_LCK_FREQVAR__B 4
9756 #define SCU_RAM_QAM_ERR_STATE__W 4
9761 #define SCU_RAM_QAM_ERR_STATE_BIT__W 4
9766 #define SCU_RAM_QAM_ERR_STATE_BIT_HUNTING_FREQ 0x2
9857 #define SCU_RAM_VSB_CTL_MODE_VSB_CTL_MODE_MON__M 0x2
9860 #define SCU_RAM_VSB_CTL_MODE_VSB_CTL_MODE_MON_ON 0x2
10050 #define SCU_RAM_PARAM_0_ATV_DEMOD_SETENV_MN_STANDARD 0x2
10060 #define SCU_RAM_PARAM_0_QAM_DEMOD_SETENV_ANNEX_C 0x2
10073 #define SCU_RAM_COMMAND_CMD_DEMOD_SET_ENV 0x2
10114 #define SCU_RAM_VERSION_HI_VER_MAJOR_N3__W 4
10119 #define SCU_RAM_VERSION_HI_VER_MAJOR_N2__W 4
10123 #define SCU_RAM_VERSION_HI_VER_MAJOR_N1__B 4
10124 #define SCU_RAM_VERSION_HI_VER_MAJOR_N1__W 4
10129 #define SCU_RAM_VERSION_HI_VER_MINOR_N1__W 4
10139 #define SCU_RAM_VERSION_LO_VER_PATCH_N4__W 4
10144 #define SCU_RAM_VERSION_LO_VER_PATCH_N3__W 4
10148 #define SCU_RAM_VERSION_LO_VER_PATCH_N2__B 4
10149 #define SCU_RAM_VERSION_LO_VER_PATCH_N2__W 4
10154 #define SCU_RAM_VERSION_LO_VER_PATCH_N1__W 4
10164 #define SIO_COMM_EXEC_HOLD 0x2
10186 #define SIO_COMM_INT_REQ_SA_REQ__M 0x2
10208 #define SIO_TOP_COMM_EXEC_HOLD 0x2
10241 #define SIO_HI_RA_RAM_S0_FLG_ACC__W 4
10278 #define SIO_HI_RA_RAM_S0_BLK_BNK_S0_SLV_BNK__PRE 0x2
10345 #define SIO_HI_RA_RAM_S1_FLG_ACC__W 4
10382 #define SIO_HI_RA_RAM_S1_BLK_BNK_S1_SLV_BNK__PRE 0x2
10447 #define SIO_HI_RA_RAM_RES_I2C_STOP_FOUND 0x2
10452 #define SIO_HI_RA_RAM_CMD__W 4
10457 #define SIO_HI_RA_RAM_CMD_RESET 0x2
10492 #define SIO_HI_RA_RAM_PAR_1_I2CTX_TOE__M 0x2
10495 #define SIO_HI_RA_RAM_PAR_1_I2CTX_TOE_ENABLE 0x2
10636 #define SIO_HI_RA_RAM_PAR_5_CFG_SLV1__M 0x2
10639 #define SIO_HI_RA_RAM_PAR_5_CFG_SLV1_SLAVE 0x2
10700 #define SIO_HI_RA_RAM_VB_ENTRY0_HI_MAP_BNK__W 4
10704 #define SIO_HI_RA_RAM_VB_ENTRY0_HI_MAP_BLK__B 4
10705 #define SIO_HI_RA_RAM_VB_ENTRY0_HI_MAP_BLK__W 4
10710 #define SIO_HI_RA_RAM_VB_ENTRY0_HI_VIRT_BNK__W 4
10715 #define SIO_HI_RA_RAM_VB_ENTRY0_HI_VIRT_BLK__W 4
10854 #define SIO_HI_IF_COMM_EXEC_HOLD 0x2
10895 #define SIO_HI_IF_STK_0__PRE 0x2
10900 #define SIO_HI_IF_STK_0_ADDR__PRE 0x2
10905 #define SIO_HI_IF_STK_1__PRE 0x2
10909 #define SIO_HI_IF_STK_1_ADDR__PRE 0x2
10914 #define SIO_HI_IF_STK_2__PRE 0x2
10918 #define SIO_HI_IF_STK_2_ADDR__PRE 0x2
10923 #define SIO_HI_IF_STK_3__PRE 0x2
10928 #define SIO_HI_IF_STK_3_ADDR__PRE 0x2
10943 #define SIO_HI_IF_BPT__PRE 0x2
10948 #define SIO_HI_IF_BPT_ADDR__PRE 0x2
10956 #define SIO_CC_COMM_EXEC_HOLD 0x2
10969 #define SIO_CC_PLL_MODE_FREF_SEL_20_25 0x2
10977 #define SIO_CC_PLL_MODE_BYPASS__B 4
11000 #define SIO_CC_CLK_MODE_DELAY__W 4
11004 #define SIO_CC_CLK_MODE_INVERT__B 4
11020 #define SIO_CC_PWD_MODE_LEVEL_PLL 0x2
11040 #define SIO_CC_SOFT_RST_OSC__M 0x2
11055 #define SIO_SA_COMM_EXEC_HOLD 0x2
11062 #define SIO_SA_COMM_INT_STA__W 4
11073 #define SIO_SA_COMM_INT_STA_TR_BUFF_EMPTY_INT__M 0x2
11087 #define SIO_SA_COMM_INT_MSK__W 4
11098 #define SIO_SA_COMM_INT_MSK_TR_BUFF_EMPTY_MASK__M 0x2
11112 #define SIO_SA_COMM_INT_STM__W 4
11123 #define SIO_SA_COMM_INT_STM_TR_BUFF_EMPTY_MASK__M 0x2
11172 #define SIO_SA_TX_COMMAND_TX_ENABLE__M 0x2
11173 #define SIO_SA_TX_COMMAND_TX_ENABLE__PRE 0x2
11187 #define SIO_SA_TX_STATUS_BUFF_FULL__M 0x2
11224 #define SIO_SA_RX_STATUS_BUFF_FULL__M 0x2
11233 #define SIO_PDR_COMM_EXEC_HOLD 0x2
11247 #define SIO_PDR_MON_CFG_IACT__M 0x2
11260 #define SIO_PDR_SMA_RX_SEL__W 4
11264 #define SIO_PDR_SMA_RX_SEL_SEL__W 4
12053 #define VSB_COMM_EXEC_HOLD 0x2
12090 #define VSB_TOP_COMM_EXEC_HOLD 0x2
12106 #define VSB_TOP_COMM_MB_OBS__M 0x2
12109 #define VSB_TOP_COMM_MB_OBS_OBS_ON 0x2
12112 #define VSB_TOP_COMM_MB_MUX_CTL__W 4
12117 #define VSB_TOP_COMM_MB_MUX_OBS__W 4
12146 #define VSB_TOP_COMM_INT_STA_LOCK_STA__M 0x2
12159 #define VSB_TOP_COMM_INT_STA_SEGSYNCINTR_STA__B 4
12181 #define VSB_TOP_COMM_INT_MSK_LOCK_MSK__M 0x2
12194 #define VSB_TOP_COMM_INT_MSK_SEGSYNCINTR_MSK__B 4
12216 #define VSB_TOP_COMM_INT_STM_LOCK_STM__M 0x2
12229 #define VSB_TOP_COMM_INT_STM_SEGSYNCINTR_STM__B 4
12252 #define VSB_TOP_CKGN2ACQ__PRE 0x2
12282 #define VSB_TOP_CYGN2TRK__PRE 0x2
12300 #define VSB_TOP_SYNCCTRLWORD_DCFREEZ__M 0x2
12313 #define VSB_TOP_SYNCCTRLWORD_AGCIGNOREFS__B 4
12339 #define VSB_TOP_SYSMUXCTRL_CYLK_SEL_STATIC__M 0x2
12352 #define VSB_TOP_SYSMUXCTRL_FRAMELOCK_STATIC__B 4
12373 #define VSB_TOP_SYSMUXCTRL_SNROVTH_STATIC__W 4
12388 #define VSB_TOP_SNRTH_RCA1_DN__W 4
12392 #define VSB_TOP_SNRTH_RCA1_UP__B 4
12393 #define VSB_TOP_SNRTH_RCA1_UP__W 4
12403 #define VSB_TOP_SNRTH_RCA2_DN__W 4
12407 #define VSB_TOP_SNRTH_RCA2_UP__B 4
12408 #define VSB_TOP_SNRTH_RCA2_UP__W 4
12418 #define VSB_TOP_SNRTH_DDM1_DN__W 4
12422 #define VSB_TOP_SNRTH_DDM1_UP__B 4
12423 #define VSB_TOP_SNRTH_DDM1_UP__W 4
12433 #define VSB_TOP_SNRTH_DDM2_DN__W 4
12437 #define VSB_TOP_SNRTH_DDM2_UP__B 4
12438 #define VSB_TOP_SNRTH_DDM2_UP__W 4
12448 #define VSB_TOP_SNRTH_PT_DN__W 4
12452 #define VSB_TOP_SNRTH_PT_UP__B 4
12453 #define VSB_TOP_SNRTH_PT_UP__W 4
12463 #define VSB_TOP_CYSMSTATES_SYSST__W 4
12467 #define VSB_TOP_CYSMSTATES_EQST__B 4
12468 #define VSB_TOP_CYSMSTATES_EQST__W 4
12484 #define VSB_TOP_SMALL_NOTCH_CONTROL_BYPASS1__M 0x2
12493 #define VSB_TOP_SMALL_NOTCH_CONTROL_SPARE__W 4
12532 #define VSB_TOP_LOCKSTATUS_VSBMODE__W 4
12536 #define VSB_TOP_LOCKSTATUS_FRMLOCK__B 4
12552 #define VSB_TOP_CTST__W 4
12567 #define VSB_TOP_EQSMRSTCTRL_DFEON__M 0x2
12580 #define VSB_TOP_EQSMRSTCTRL_DIGIAGCON__B 4
12607 #define VSB_TOP_EQSMTRNCTRL_DFEON__M 0x2
12620 #define VSB_TOP_EQSMTRNCTRL_DIGIAGCON__B 4
12647 #define VSB_TOP_EQSMRCA1CTRL_DFEON__M 0x2
12660 #define VSB_TOP_EQSMRCA1CTRL_DIGIAGCON__B 4
12687 #define VSB_TOP_EQSMRCA2CTRL_DFEON__M 0x2
12688 #define VSB_TOP_EQSMRCA2CTRL_DFEON__PRE 0x2
12700 #define VSB_TOP_EQSMRCA2CTRL_DIGIAGCON__B 4
12727 #define VSB_TOP_EQSMDDM1CTRL_DFEON__M 0x2
12728 #define VSB_TOP_EQSMDDM1CTRL_DFEON__PRE 0x2
12740 #define VSB_TOP_EQSMDDM1CTRL_DIGIAGCON__B 4
12767 #define VSB_TOP_EQSMDDM2CTRL_DFEON__M 0x2
12768 #define VSB_TOP_EQSMDDM2CTRL_DFEON__PRE 0x2
12780 #define VSB_TOP_EQSMDDM2CTRL_DIGIAGCON__B 4
12807 #define VSB_TOP_SYSSMRSTCTRL_CTCALEN__M 0x2
12820 #define VSB_TOP_SYSSMRSTCTRL_RSTCYDET__B 4
12867 #define VSB_TOP_SYSSMCYCTRL_CTCALEN__M 0x2
12880 #define VSB_TOP_SYSSMCYCTRL_RSTCYDET__B 4
12927 #define VSB_TOP_SYSSMTRNCTRL_CTCALEN__M 0x2
12940 #define VSB_TOP_SYSSMTRNCTRL_RSTCYDET__B 4
12987 #define VSB_TOP_SYSSMEQCTRL_CTCALEN__M 0x2
13000 #define VSB_TOP_SYSSMEQCTRL_RSTCYDET__B 4
13047 #define VSB_TOP_SYSSMAGCCTRL_CTCALEN__M 0x2
13060 #define VSB_TOP_SYSSMAGCCTRL_RSTCYDET__B 4
13107 #define VSB_TOP_SYSSMCTCTRL_CTCALEN__M 0x2
13108 #define VSB_TOP_SYSSMCTCTRL_CTCALEN__PRE 0x2
13120 #define VSB_TOP_SYSSMCTCTRL_RSTCYDET__B 4
13167 #define VSB_TOP_EQCTRL_ORCANCMAEN__M 0x2
13168 #define VSB_TOP_EQCTRL_ORCANCMAEN__PRE 0x2
13196 #define VSB_TOP_PREEQAGCCTRL_PREEQAGCBWSEL__W 4
13200 #define VSB_TOP_PREEQAGCCTRL_PREEQAGCFRZ__B 4
13234 #define VSB_TOP_BEDETCTRL_DATAOFFSEL__B 4
13324 #define VSB_TOP_AGC_TRUNCCTRL__W 4
13553 #define VSB_TOP_PHASELOCKCTRL_DFORCEPLL__M 0x2
13566 #define VSB_TOP_PHASELOCKCTRL_CFORCEPOLARITY__B 4