Lines Matching refs:hc
241 #define HFC_outb(hc, reg, val) \ argument
242 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
243 #define HFC_outb_nodebug(hc, reg, val) \ argument
244 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
245 #define HFC_inb(hc, reg) \ argument
246 (hc->HFC_inb(hc, reg, __func__, __LINE__))
247 #define HFC_inb_nodebug(hc, reg) \ argument
248 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
249 #define HFC_inw(hc, reg) \ argument
250 (hc->HFC_inw(hc, reg, __func__, __LINE__))
251 #define HFC_inw_nodebug(hc, reg) \ argument
252 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
253 #define HFC_wait(hc) \ argument
254 (hc->HFC_wait(hc, __func__, __LINE__))
255 #define HFC_wait_nodebug(hc) \ argument
256 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
258 #define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val)) argument
259 #define HFC_outb_nodebug(hc, reg, val) (hc->HFC_outb_nodebug(hc, reg, val)) argument
260 #define HFC_inb(hc, reg) (hc->HFC_inb(hc, reg)) argument
261 #define HFC_inb_nodebug(hc, reg) (hc->HFC_inb_nodebug(hc, reg)) argument
262 #define HFC_inw(hc, reg) (hc->HFC_inw(hc, reg)) argument
263 #define HFC_inw_nodebug(hc, reg) (hc->HFC_inw_nodebug(hc, reg)) argument
264 #define HFC_wait(hc) (hc->HFC_wait(hc)) argument
265 #define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc)) argument
275 HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_pcimem() argument
278 HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val) in HFC_outb_pcimem()
281 writeb(val, hc->pci_membase + reg); in HFC_outb_pcimem()
285 HFC_inb_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_pcimem() argument
287 HFC_inb_pcimem(struct hfc_multi *hc, u_char reg) in HFC_inb_pcimem()
290 return readb(hc->pci_membase + reg); in HFC_inb_pcimem()
294 HFC_inw_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_pcimem() argument
296 HFC_inw_pcimem(struct hfc_multi *hc, u_char reg) in HFC_inw_pcimem()
299 return readw(hc->pci_membase + reg); in HFC_inw_pcimem()
303 HFC_wait_pcimem(struct hfc_multi *hc, const char *function, int line) in HFC_wait_pcimem() argument
305 HFC_wait_pcimem(struct hfc_multi *hc) in HFC_wait_pcimem()
308 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) in HFC_wait_pcimem()
315 HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_regio() argument
318 HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val) in HFC_outb_regio()
321 outb(reg, hc->pci_iobase + 4); in HFC_outb_regio()
322 outb(val, hc->pci_iobase); in HFC_outb_regio()
326 HFC_inb_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_regio() argument
328 HFC_inb_regio(struct hfc_multi *hc, u_char reg) in HFC_inb_regio()
331 outb(reg, hc->pci_iobase + 4); in HFC_inb_regio()
332 return inb(hc->pci_iobase); in HFC_inb_regio()
336 HFC_inw_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_regio() argument
338 HFC_inw_regio(struct hfc_multi *hc, u_char reg) in HFC_inw_regio()
341 outb(reg, hc->pci_iobase + 4); in HFC_inw_regio()
342 return inw(hc->pci_iobase); in HFC_inw_regio()
346 HFC_wait_regio(struct hfc_multi *hc, const char *function, int line) in HFC_wait_regio() argument
348 HFC_wait_regio(struct hfc_multi *hc) in HFC_wait_regio()
351 outb(R_STATUS, hc->pci_iobase + 4); in HFC_wait_regio()
352 while (inb(hc->pci_iobase) & V_BUSY) in HFC_wait_regio()
358 HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_debug() argument
382 hc->id, reg, regname, val, bits, function, line); in HFC_outb_debug()
383 HFC_outb_nodebug(hc, reg, val); in HFC_outb_debug()
386 HFC_inb_debug(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_debug() argument
389 u_char val = HFC_inb_nodebug(hc, reg); in HFC_inb_debug()
412 hc->id, reg, regname, val, bits, function, line); in HFC_inb_debug()
416 HFC_inw_debug(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_debug() argument
419 u_short val = HFC_inw_nodebug(hc, reg); in HFC_inw_debug()
434 hc->id, reg, regname, val, function, line); in HFC_inw_debug()
438 HFC_wait_debug(struct hfc_multi *hc, const char *function, int line) in HFC_wait_debug() argument
441 hc->id, function, line); in HFC_wait_debug()
442 HFC_wait_nodebug(hc); in HFC_wait_debug()
448 write_fifo_regio(struct hfc_multi *hc, u_char *data, int len) in write_fifo_regio() argument
450 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in write_fifo_regio()
452 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); in write_fifo_regio()
457 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); in write_fifo_regio()
462 outb(*data, hc->pci_iobase); in write_fifo_regio()
469 write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) in write_fifo_pcimem() argument
473 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
479 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
484 writeb(*data, hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
492 read_fifo_regio(struct hfc_multi *hc, u_char *data, int len) in read_fifo_regio() argument
494 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in read_fifo_regio()
496 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); in read_fifo_regio()
501 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); in read_fifo_regio()
506 *data = inb(hc->pci_iobase); in read_fifo_regio()
514 read_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) in read_fifo_pcimem() argument
518 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
524 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
529 *data = readb(hc->pci_membase + A_FIFO_DATA0); in read_fifo_pcimem()
536 enable_hwirq(struct hfc_multi *hc) in enable_hwirq() argument
538 hc->hw.r_irq_ctrl |= V_GLOB_IRQ_EN; in enable_hwirq()
539 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in enable_hwirq()
543 disable_hwirq(struct hfc_multi *hc) in disable_hwirq() argument
545 hc->hw.r_irq_ctrl &= ~((u_char)V_GLOB_IRQ_EN); in disable_hwirq()
546 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in disable_hwirq()
566 readpcibridge(struct hfc_multi *hc, unsigned char address) in readpcibridge() argument
571 if (!hc->pci_iobase) in readpcibridge()
575 HFC_outb(hc, R_CTRL, 0x4); /*was _io before*/ in readpcibridge()
584 outw(cipv, hc->pci_iobase + 4); in readpcibridge()
585 data = inb(hc->pci_iobase); in readpcibridge()
588 HFC_outb(hc, R_CTRL, 0x0); /* was _io before */ in readpcibridge()
594 writepcibridge(struct hfc_multi *hc, unsigned char address, unsigned char data) in writepcibridge() argument
599 if (!hc->pci_iobase) in writepcibridge()
608 outw(cipv, hc->pci_iobase + 4); in writepcibridge()
620 outl(datav, hc->pci_iobase); in writepcibridge()
624 cpld_set_reg(struct hfc_multi *hc, unsigned char reg) in cpld_set_reg() argument
627 HFC_outb(hc, R_GPIO_OUT1, reg); in cpld_set_reg()
631 cpld_write_reg(struct hfc_multi *hc, unsigned char reg, unsigned char val) in cpld_write_reg() argument
633 cpld_set_reg(hc, reg); in cpld_write_reg()
635 enablepcibridge(hc); in cpld_write_reg()
636 writepcibridge(hc, 1, val); in cpld_write_reg()
637 disablepcibridge(hc); in cpld_write_reg()
643 cpld_read_reg(struct hfc_multi *hc, unsigned char reg) in cpld_read_reg() argument
647 cpld_set_reg(hc, reg); in cpld_read_reg()
650 HFC_outb(hc, R_GPIO_OUT1, reg); in cpld_read_reg()
652 enablepcibridge(hc); in cpld_read_reg()
653 bytein = readpcibridge(hc, 1); in cpld_read_reg()
654 disablepcibridge(hc); in cpld_read_reg()
660 vpm_write_address(struct hfc_multi *hc, unsigned short addr) in vpm_write_address() argument
662 cpld_write_reg(hc, 0, 0xff & addr); in vpm_write_address()
663 cpld_write_reg(hc, 1, 0x01 & (addr >> 8)); in vpm_write_address()
840 vpm_echocan_on(struct hfc_multi *hc, int ch, int taps) in vpm_echocan_on() argument
844 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_on()
849 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_on()
868 vpm_out(hc, unit, timeslot, 0x7e); in vpm_echocan_on()
872 vpm_echocan_off(struct hfc_multi *hc, int ch) in vpm_echocan_off() argument
876 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_off()
882 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_off()
901 vpm_out(hc, unit, timeslot, 0x01); in vpm_echocan_off()
914 struct hfc_multi *hc, *next, *pcmmaster = NULL; in hfcmulti_resync() local
931 list_for_each_entry_safe(hc, next, &HFClist, list) { in hfcmulti_resync()
932 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
933 if (hc->syncronized) { in hfcmulti_resync()
934 newmaster = hc; in hfcmulti_resync()
942 list_for_each_entry_safe(hc, next, &HFClist, list) { in hfcmulti_resync()
943 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
944 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
948 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in hfcmulti_resync()
949 pcmmaster = hc; in hfcmulti_resync()
950 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
954 hc->e1_resync |= 1; /* get SYNC_I */ in hfcmulti_resync()
961 hc = newmaster; in hfcmulti_resync()
964 "interface.\n", hc->id, hc); in hfcmulti_resync()
966 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
971 if (hc->ctype == HFC_TYPE_E1 in hfcmulti_resync()
972 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { in hfcmulti_resync()
975 hc->e1_resync |= 2; /* switch to jatt */ in hfcmulti_resync()
979 hc = pcmmaster; in hfcmulti_resync()
983 "with QUARTZ\n", hc->id, hc); in hfcmulti_resync()
984 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
990 hc->e1_resync |= 4; /* switch quartz */ in hfcmulti_resync()
995 "enabled by HFC-%dS\n", hc->ctype); in hfcmulti_resync()
997 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
1014 plxsd_checksync(struct hfc_multi *hc, int rm) in plxsd_checksync() argument
1016 if (hc->syncronized) { in plxsd_checksync()
1020 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
1021 hc->id); in plxsd_checksync()
1022 hfcmulti_resync(hc, hc, rm); in plxsd_checksync()
1025 if (syncmaster == hc) { in plxsd_checksync()
1028 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
1029 hc->id); in plxsd_checksync()
1030 hfcmulti_resync(hc, NULL, rm); in plxsd_checksync()
1040 release_io_hfcmulti(struct hfc_multi *hc) in release_io_hfcmulti() argument
1050 hc->hw.r_cirm |= V_SRES; in release_io_hfcmulti()
1051 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1053 hc->hw.r_cirm &= ~V_SRES; in release_io_hfcmulti()
1054 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1058 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { in release_io_hfcmulti()
1061 __func__, hc->id + 1); in release_io_hfcmulti()
1063 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in release_io_hfcmulti()
1082 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ in release_io_hfcmulti()
1083 if (hc->pci_dev) in release_io_hfcmulti()
1084 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); in release_io_hfcmulti()
1085 if (hc->pci_membase) in release_io_hfcmulti()
1086 iounmap(hc->pci_membase); in release_io_hfcmulti()
1087 if (hc->plx_membase) in release_io_hfcmulti()
1088 iounmap(hc->plx_membase); in release_io_hfcmulti()
1089 if (hc->pci_iobase) in release_io_hfcmulti()
1090 release_region(hc->pci_iobase, 8); in release_io_hfcmulti()
1091 if (hc->xhfc_membase) in release_io_hfcmulti()
1092 iounmap((void *)hc->xhfc_membase); in release_io_hfcmulti()
1094 if (hc->pci_dev) { in release_io_hfcmulti()
1095 pci_disable_device(hc->pci_dev); in release_io_hfcmulti()
1096 pci_set_drvdata(hc->pci_dev, NULL); in release_io_hfcmulti()
1108 init_chip(struct hfc_multi *hc) in init_chip() argument
1119 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1121 memset(&hc->hw, 0, sizeof(struct hfcm_hw)); in init_chip()
1126 val = HFC_inb(hc, R_CHIP_ID); in init_chip()
1133 rev = HFC_inb(hc, R_CHIP_RV); in init_chip()
1136 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? in init_chip()
1138 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { in init_chip()
1139 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); in init_chip()
1154 hc->Flen = 0x10; in init_chip()
1155 hc->Zmin = 0x80; in init_chip()
1156 hc->Zlen = 384; in init_chip()
1157 hc->DTMFbase = 0x1000; in init_chip()
1158 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { in init_chip()
1162 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1163 hc->hw.r_ram_sz = 1; in init_chip()
1164 hc->Flen = 0x20; in init_chip()
1165 hc->Zmin = 0xc0; in init_chip()
1166 hc->Zlen = 1856; in init_chip()
1167 hc->DTMFbase = 0x2000; in init_chip()
1169 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { in init_chip()
1173 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1174 hc->hw.r_ram_sz = 2; in init_chip()
1175 hc->Flen = 0x20; in init_chip()
1176 hc->Zmin = 0xc0; in init_chip()
1177 hc->Zlen = 8000; in init_chip()
1178 hc->DTMFbase = 0x2000; in init_chip()
1180 if (hc->ctype == HFC_TYPE_XHFC) { in init_chip()
1181 hc->Flen = 0x8; in init_chip()
1182 hc->Zmin = 0x0; in init_chip()
1183 hc->Zlen = 64; in init_chip()
1184 hc->DTMFbase = 0x0; in init_chip()
1186 hc->max_trans = poll << 1; in init_chip()
1187 if (hc->max_trans > hc->Zlen) in init_chip()
1188 hc->max_trans = hc->Zlen; in init_chip()
1191 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1194 __func__, hc->id + 1); in init_chip()
1196 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1222 if (pos != hc) in init_chip()
1243 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1246 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1247 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1250 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) in init_chip()
1251 hc->hw.r_ram_sz |= V_FZ_MD; in init_chip()
1254 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1259 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { in init_chip()
1263 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1271 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); in init_chip()
1272 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1273 HFC_outb(hc, 0x0C /* R_FIFO_THRES */, in init_chip()
1276 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1277 HFC_outb(hc, R_FIFO_MD, 0); in init_chip()
1278 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1279 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES; in init_chip()
1281 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES in init_chip()
1283 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1285 hc->hw.r_cirm = 0; in init_chip()
1286 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1288 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1289 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1292 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1294 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1297 if (hc->hw.r_pcm_md0 & V_PCM_MD) { in init_chip()
1315 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x90); in init_chip()
1316 if (hc->slots == 32) in init_chip()
1317 HFC_outb(hc, R_PCM_MD1, 0x00); in init_chip()
1318 if (hc->slots == 64) in init_chip()
1319 HFC_outb(hc, R_PCM_MD1, 0x10); in init_chip()
1320 if (hc->slots == 128) in init_chip()
1321 HFC_outb(hc, R_PCM_MD1, 0x20); in init_chip()
1322 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); in init_chip()
1323 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in init_chip()
1324 HFC_outb(hc, R_PCM_MD2, V_SYNC_SRC); /* sync via SYNC_I / O */ in init_chip()
1325 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1326 HFC_outb(hc, R_PCM_MD2, 0x10); /* V_C2O_EN */ in init_chip()
1328 HFC_outb(hc, R_PCM_MD2, 0x00); /* sync from interface */ in init_chip()
1329 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1331 HFC_outb_nodebug(hc, R_SLOT, i); in init_chip()
1332 HFC_outb_nodebug(hc, A_SL_CFG, 0); in init_chip()
1333 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1334 HFC_outb_nodebug(hc, A_CONF, 0); in init_chip()
1335 hc->slot_owner[i] = -1; in init_chip()
1339 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { in init_chip()
1343 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); in init_chip()
1346 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1347 HFC_outb(hc, 0x02 /* R_CLK_CFG */, 0x40 /* V_CLKO_OFF */); in init_chip()
1350 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in init_chip()
1352 HFC_outb(hc, R_GPIO_SEL, 0x30); in init_chip()
1353 HFC_outb(hc, R_GPIO_EN1, 0x3); in init_chip()
1356 vpm_init(hc); in init_chip()
1360 val = HFC_inb(hc, R_F0_CNTL); in init_chip()
1361 val += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1365 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1368 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1369 val2 = HFC_inb(hc, R_F0_CNTL); in init_chip()
1370 val2 += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1377 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1380 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) in init_chip()
1383 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in init_chip()
1389 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in init_chip()
1396 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1401 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in init_chip()
1410 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1412 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1422 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1423 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1424 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1427 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1428 val2 = HFC_inb(hc, R_F0_CNTL); in init_chip()
1429 val2 += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1435 &hc->chip); in init_chip()
1444 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1445 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1448 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1459 if (hc->pcm) in init_chip()
1461 hc->pcm); in init_chip()
1463 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) in init_chip()
1464 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1467 hc->pcm = PCM_cnt; in init_chip()
1469 "(auto selected)\n", hc->pcm); in init_chip()
1473 HFC_outb(hc, R_TI_WD, poll_timer); in init_chip()
1474 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; in init_chip()
1477 if (hc->ctype == HFC_TYPE_E1) in init_chip()
1478 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; in init_chip()
1481 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { in init_chip()
1485 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; in init_chip()
1486 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1487 hc->hw.r_dtmf |= V_ULAW_SEL; in init_chip()
1488 HFC_outb(hc, R_DTMF_N, 102 - 1); in init_chip()
1489 hc->hw.r_irqmsk_misc |= V_DTMF_IRQMSK; in init_chip()
1493 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1497 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1498 HFC_outb(hc, R_CONF_EN, r_conf_en); in init_chip()
1501 switch (hc->leds) { in init_chip()
1503 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in init_chip()
1504 HFC_outb(hc, R_GPIO_SEL, 0x32); in init_chip()
1506 HFC_outb(hc, R_GPIO_SEL, 0x30); in init_chip()
1508 HFC_outb(hc, R_GPIO_EN1, 0x0f); in init_chip()
1509 HFC_outb(hc, R_GPIO_OUT1, 0x00); in init_chip()
1511 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3); in init_chip()
1516 HFC_outb(hc, R_GPIO_SEL, 0xf0); in init_chip()
1517 HFC_outb(hc, R_GPIO_EN1, 0xff); in init_chip()
1518 HFC_outb(hc, R_GPIO_OUT1, 0x00); in init_chip()
1522 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) { in init_chip()
1523 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */ in init_chip()
1524 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1528 if (hc->masterclk >= 0) { in init_chip()
1532 __func__, hc->masterclk, hc->ports - 1); in init_chip()
1533 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); in init_chip()
1534 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1540 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); in init_chip()
1543 hc->hw.r_irqmsk_misc); in init_chip()
1546 HFC_outb(hc, R_RAM_ADDR0, 0); in init_chip()
1547 HFC_outb(hc, R_RAM_ADDR1, 0); in init_chip()
1548 HFC_outb(hc, R_RAM_ADDR2, 0); in init_chip()
1550 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); in init_chip()
1551 HFC_outb_nodebug(hc, R_RAM_DATA, ((i * 3) & 0xff)); in init_chip()
1554 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); in init_chip()
1555 HFC_inb_nodebug(hc, R_RAM_DATA); in init_chip()
1556 rval = HFC_inb_nodebug(hc, R_INT_DATA); in init_chip()
1573 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1582 hfcmulti_watchdog(struct hfc_multi *hc) in hfcmulti_watchdog() argument
1584 hc->wdcount++; in hfcmulti_watchdog()
1586 if (hc->wdcount > 10) { in hfcmulti_watchdog()
1587 hc->wdcount = 0; in hfcmulti_watchdog()
1588 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? in hfcmulti_watchdog()
1592 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3); in hfcmulti_watchdog()
1593 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); in hfcmulti_watchdog()
1603 hfcmulti_leds(struct hfc_multi *hc) in hfcmulti_leds() argument
1611 switch (hc->leds) { in hfcmulti_leds()
1623 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_leds()
1625 if (hc->chan[hc->dnum[0]].los) in hfcmulti_leds()
1627 if (hc->e1_state != 1) { in hfcmulti_leds()
1629 hc->flash[2] = 0; in hfcmulti_leds()
1630 hc->flash[3] = 0; in hfcmulti_leds()
1634 if (!hc->flash[2] && hc->activity_tx) in hfcmulti_leds()
1635 hc->flash[2] = poll; in hfcmulti_leds()
1636 if (!hc->flash[3] && hc->activity_rx) in hfcmulti_leds()
1637 hc->flash[3] = poll; in hfcmulti_leds()
1638 if (hc->flash[2] && hc->flash[2] < 1024) in hfcmulti_leds()
1640 if (hc->flash[3] && hc->flash[3] < 1024) in hfcmulti_leds()
1642 if (hc->flash[2] >= 2048) in hfcmulti_leds()
1643 hc->flash[2] = 0; in hfcmulti_leds()
1644 if (hc->flash[3] >= 2048) in hfcmulti_leds()
1645 hc->flash[3] = 0; in hfcmulti_leds()
1646 if (hc->flash[2]) in hfcmulti_leds()
1647 hc->flash[2] += poll; in hfcmulti_leds()
1648 if (hc->flash[3]) in hfcmulti_leds()
1649 hc->flash[3] += poll; in hfcmulti_leds()
1654 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1655 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds); in hfcmulti_leds()
1656 hc->ledstate = leds; in hfcmulti_leds()
1668 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1679 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1680 if (!hc->flash[i] && in hfcmulti_leds()
1681 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1682 hc->flash[i] = poll; in hfcmulti_leds()
1683 if (hc->flash[i] && hc->flash[i] < 1024) in hfcmulti_leds()
1685 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1686 hc->flash[i] = 0; in hfcmulti_leds()
1687 if (hc->flash[i]) in hfcmulti_leds()
1688 hc->flash[i] += poll; in hfcmulti_leds()
1691 hc->flash[i] = 0; in hfcmulti_leds()
1696 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in hfcmulti_leds()
1707 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1708 vpm_out(hc, 0, 0x1a8 + 3, leds); in hfcmulti_leds()
1709 hc->ledstate = leds; in hfcmulti_leds()
1716 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1717 HFC_outb_nodebug(hc, R_GPIO_EN1, leds & 0x0F); in hfcmulti_leds()
1718 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds >> 4); in hfcmulti_leds()
1719 hc->ledstate = leds; in hfcmulti_leds()
1732 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1743 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1744 if (!hc->flash[i] && in hfcmulti_leds()
1745 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1746 hc->flash[i] = poll; in hfcmulti_leds()
1747 if (hc->flash[i] < 1024) in hfcmulti_leds()
1749 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1750 hc->flash[i] = 0; in hfcmulti_leds()
1751 if (hc->flash[i]) in hfcmulti_leds()
1752 hc->flash[i] += poll; in hfcmulti_leds()
1755 hc->flash[i] = 0; in hfcmulti_leds()
1762 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1763 HFC_outb_nodebug(hc, R_GPIO_EN1, in hfcmulti_leds()
1765 HFC_outb_nodebug(hc, R_GPIO_OUT1, in hfcmulti_leds()
1767 hc->ledstate = leds; in hfcmulti_leds()
1779 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1790 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1791 if (!hc->flash[i] && in hfcmulti_leds()
1792 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1793 hc->flash[i] = poll; in hfcmulti_leds()
1794 if (hc->flash[i] < 1024) in hfcmulti_leds()
1796 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1797 hc->flash[i] = 0; in hfcmulti_leds()
1798 if (hc->flash[i]) in hfcmulti_leds()
1799 hc->flash[i] += poll; in hfcmulti_leds()
1801 hc->flash[i] = 0; in hfcmulti_leds()
1805 if (leddw != hc->ledstate) { in hfcmulti_leds()
1809 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK); in hfcmulti_leds()
1810 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_leds()
1811 outl(leddw, hc->pci_iobase); in hfcmulti_leds()
1812 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, V_PCM_CLK); in hfcmulti_leds()
1813 hc->ledstate = leddw; in hfcmulti_leds()
1817 hc->activity_tx = 0; in hfcmulti_leds()
1818 hc->activity_rx = 0; in hfcmulti_leds()
1825 hfcmulti_dtmf(struct hfc_multi *hc) in hfcmulti_dtmf() argument
1842 bch = hc->chan[ch].bch; in hfcmulti_dtmf()
1845 if (!hc->created[hc->chan[ch].port]) in hfcmulti_dtmf()
1852 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); in hfcmulti_dtmf()
1856 addr = hc->DTMFbase + ((co << 7) | (ch << 2)); in hfcmulti_dtmf()
1857 HFC_outb_nodebug(hc, R_RAM_ADDR0, addr); in hfcmulti_dtmf()
1858 HFC_outb_nodebug(hc, R_RAM_ADDR1, addr >> 8); in hfcmulti_dtmf()
1859 HFC_outb_nodebug(hc, R_RAM_ADDR2, (addr >> 16) in hfcmulti_dtmf()
1861 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); in hfcmulti_dtmf()
1862 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8); in hfcmulti_dtmf()
1880 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); in hfcmulti_dtmf()
1881 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8); in hfcmulti_dtmf()
1903 hc->chan[ch].coeff_count++; in hfcmulti_dtmf()
1904 if (hc->chan[ch].coeff_count == 8) { in hfcmulti_dtmf()
1905 hc->chan[ch].coeff_count = 0; in hfcmulti_dtmf()
1915 skb_put_data(skb, hc->chan[ch].coeff, 512); in hfcmulti_dtmf()
1921 hc->dtmf = dtmf; in hfcmulti_dtmf()
1923 HFC_outb_nodebug(hc, R_DTMF, hc->hw.r_dtmf | V_RST_DTMF); in hfcmulti_dtmf()
1932 hfcmulti_tx(struct hfc_multi *hc, int ch) in hfcmulti_tx() argument
1944 bch = hc->chan[ch].bch; in hfcmulti_tx()
1945 dch = hc->chan[ch].dch; in hfcmulti_tx()
1949 txpending = &hc->chan[ch].txpending; in hfcmulti_tx()
1950 slot_tx = hc->chan[ch].slot_tx; in hfcmulti_tx()
1968 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_tx()
1969 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_tx()
1970 (hc->chan[ch].slot_rx < 0) && in hfcmulti_tx()
1971 (hc->chan[ch].slot_tx < 0)) in hfcmulti_tx()
1972 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch << 1)); in hfcmulti_tx()
1974 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
1975 HFC_wait_nodebug(hc); in hfcmulti_tx()
1979 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in hfcmulti_tx()
1980 HFC_wait_nodebug(hc); in hfcmulti_tx()
1981 HFC_outb(hc, A_SUBCH_CFG, 0); in hfcmulti_tx()
1986 f1 = HFC_inb_nodebug(hc, A_F1); in hfcmulti_tx()
1987 f2 = HFC_inb_nodebug(hc, A_F2); in hfcmulti_tx()
1988 while (f2 != (temp = HFC_inb_nodebug(hc, A_F2))) { in hfcmulti_tx()
1992 __func__, hc->id + 1, temp, f2); in hfcmulti_tx()
1997 Fspace += hc->Flen; in hfcmulti_tx()
2004 if (test_bit(HFC_CHIP_REVISION0, &hc->chip)) { in hfcmulti_tx()
2011 if (hc->ctype != HFC_TYPE_E1 && dch) { in hfcmulti_tx()
2019 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_tx()
2020 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_tx()
2021 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { in hfcmulti_tx()
2024 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_tx()
2027 hc->chan[ch].Zfill = z1 - z2; in hfcmulti_tx()
2028 if (hc->chan[ch].Zfill < 0) in hfcmulti_tx()
2029 hc->chan[ch].Zfill += hc->Zlen; in hfcmulti_tx()
2032 Zspace += hc->Zlen; in hfcmulti_tx()
2036 Zspace = Zspace - hc->Zlen + hc->max_trans; in hfcmulti_tx()
2053 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2054 HFC_outb(hc, A_CON_HDLC, 0xc0 in hfcmulti_tx()
2058 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | in hfcmulti_tx()
2060 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1); in hfcmulti_tx()
2061 HFC_wait_nodebug(hc); in hfcmulti_tx()
2062 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2063 HFC_outb(hc, A_CON_HDLC, 0xc0 in hfcmulti_tx()
2067 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | in hfcmulti_tx()
2069 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
2070 HFC_wait_nodebug(hc); in hfcmulti_tx()
2084 hc->write_fifo(hc, hc->silence_data, poll >> 1); in hfcmulti_tx()
2096 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2097 HFC_outb(hc, A_CON_HDLC, 0x80 in hfcmulti_tx()
2101 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | in hfcmulti_tx()
2103 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1); in hfcmulti_tx()
2104 HFC_wait_nodebug(hc); in hfcmulti_tx()
2105 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2106 HFC_outb(hc, A_CON_HDLC, 0x80 in hfcmulti_tx()
2110 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | in hfcmulti_tx()
2112 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
2113 HFC_wait_nodebug(hc); in hfcmulti_tx()
2119 hc->activity_tx |= 1 << hc->chan[ch].port; in hfcmulti_tx()
2134 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, in hfcmulti_tx()
2138 hc->write_fifo(hc, d, ii - i); in hfcmulti_tx()
2139 hc->chan[ch].Zfill += ii - i; in hfcmulti_tx()
2151 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_INC_F); in hfcmulti_tx()
2152 HFC_wait_nodebug(hc); in hfcmulti_tx()
2172 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in hfcmulti_tx()
2178 hfcmulti_rx(struct hfc_multi *hc, int ch) in hfcmulti_rx() argument
2189 bch = hc->chan[ch].bch; in hfcmulti_rx()
2193 } else if (hc->chan[ch].dch) { in hfcmulti_rx()
2194 dch = hc->chan[ch].dch; in hfcmulti_rx()
2203 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_rx()
2204 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_rx()
2205 (hc->chan[ch].slot_rx < 0) && in hfcmulti_rx()
2206 (hc->chan[ch].slot_tx < 0)) in hfcmulti_rx()
2207 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch << 1) | 1); in hfcmulti_rx()
2209 HFC_outb_nodebug(hc, R_FIFO, (ch << 1) | 1); in hfcmulti_rx()
2210 HFC_wait_nodebug(hc); in hfcmulti_rx()
2213 if (hc->chan[ch].rx_off) { in hfcmulti_rx()
2220 f1 = HFC_inb_nodebug(hc, A_F1); in hfcmulti_rx()
2221 while (f1 != (temp = HFC_inb_nodebug(hc, A_F1))) { in hfcmulti_rx()
2225 __func__, hc->id + 1, temp, f1); in hfcmulti_rx()
2228 f2 = HFC_inb_nodebug(hc, A_F2); in hfcmulti_rx()
2230 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_rx()
2231 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { in hfcmulti_rx()
2234 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_rx()
2237 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_rx()
2243 Zsize += hc->Zlen; in hfcmulti_rx()
2252 hc->id + 1, bch->nr, Zsize); in hfcmulti_rx()
2264 hc->id + 1); in hfcmulti_rx()
2271 hc->activity_rx |= 1 << hc->chan[ch].port; in hfcmulti_rx()
2278 "got=%d (again %d)\n", __func__, hc->id + 1, ch, in hfcmulti_rx()
2286 __func__, hc->id + 1); in hfcmulti_rx()
2288 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in hfcmulti_rx()
2289 HFC_wait_nodebug(hc); in hfcmulti_rx()
2293 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2297 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_INC_F); in hfcmulti_rx()
2298 HFC_wait_nodebug(hc); in hfcmulti_rx()
2304 "size\n", __func__, hc->id + 1); in hfcmulti_rx()
2334 __func__, hc->id + 1); in hfcmulti_rx()
2351 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2356 __func__, hc->id + 1, ch, Zsize, z1, z2); in hfcmulti_rx()
2358 recv_Bchannel(bch, hc->chan[ch].Zfill, false); in hfcmulti_rx()
2385 handle_timer_irq(struct hfc_multi *hc) in handle_timer_irq() argument
2392 if (hc->e1_resync) { in handle_timer_irq()
2395 if (hc->e1_resync & 1) { in handle_timer_irq()
2398 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC); in handle_timer_irq()
2400 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in handle_timer_irq()
2401 HFC_outb(hc, R_SYNC_OUT, V_SYNC_E1_RX); in handle_timer_irq()
2403 if (hc->e1_resync & 2) { in handle_timer_irq()
2406 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS); in handle_timer_irq()
2408 if (hc->e1_resync & 4) { in handle_timer_irq()
2413 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC in handle_timer_irq()
2416 HFC_outb(hc, R_SYNC_OUT, 0); in handle_timer_irq()
2418 hc->e1_resync = 0; in handle_timer_irq()
2422 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1) in handle_timer_irq()
2424 if (hc->created[hc->chan[ch].port]) { in handle_timer_irq()
2425 hfcmulti_tx(hc, ch); in handle_timer_irq()
2427 hfcmulti_rx(hc, ch); in handle_timer_irq()
2428 if (hc->chan[ch].dch && in handle_timer_irq()
2429 hc->chan[ch].nt_timer > -1) { in handle_timer_irq()
2430 dch = hc->chan[ch].dch; in handle_timer_irq()
2431 if (!(--hc->chan[ch].nt_timer)) { in handle_timer_irq()
2445 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) { in handle_timer_irq()
2446 dch = hc->chan[hc->dnum[0]].dch; in handle_timer_irq()
2448 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_SIG_LOS; in handle_timer_irq()
2449 hc->chan[hc->dnum[0]].los = temp; in handle_timer_irq()
2450 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2451 if (!temp && hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2454 if (temp && !hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2458 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2460 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_AIS; in handle_timer_irq()
2461 if (!temp && hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2464 if (temp && !hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2467 hc->chan[hc->dnum[0]].ais = temp; in handle_timer_irq()
2469 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2471 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_RX; in handle_timer_irq()
2472 if (!temp && hc->chan[hc->dnum[0]].slip_rx) in handle_timer_irq()
2475 hc->chan[hc->dnum[0]].slip_rx = temp; in handle_timer_irq()
2476 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_TX; in handle_timer_irq()
2477 if (!temp && hc->chan[hc->dnum[0]].slip_tx) in handle_timer_irq()
2480 hc->chan[hc->dnum[0]].slip_tx = temp; in handle_timer_irq()
2482 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2484 temp = HFC_inb_nodebug(hc, R_RX_SL0_0) & V_A; in handle_timer_irq()
2485 if (!temp && hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2488 if (temp && !hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2491 hc->chan[hc->dnum[0]].rdi = temp; in handle_timer_irq()
2493 temp = HFC_inb_nodebug(hc, R_JATT_DIR); in handle_timer_irq()
2494 switch (hc->chan[hc->dnum[0]].sync) { in handle_timer_irq()
2501 __func__, hc->id); in handle_timer_irq()
2502 HFC_outb(hc, R_RX_OFF, in handle_timer_irq()
2503 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2504 HFC_outb(hc, R_TX_OFF, in handle_timer_irq()
2505 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2506 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2516 __func__, hc->id); in handle_timer_irq()
2517 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2521 temp = HFC_inb_nodebug(hc, R_SYNC_STA); in handle_timer_irq()
2527 __func__, hc->id); in handle_timer_irq()
2528 hc->chan[hc->dnum[0]].sync = 2; in handle_timer_irq()
2537 __func__, hc->id); in handle_timer_irq()
2538 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2541 temp = HFC_inb_nodebug(hc, R_SYNC_STA); in handle_timer_irq()
2547 __func__, hc->id); in handle_timer_irq()
2548 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2554 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in handle_timer_irq()
2555 hfcmulti_watchdog(hc); in handle_timer_irq()
2557 if (hc->leds) in handle_timer_irq()
2558 hfcmulti_leds(hc); in handle_timer_irq()
2562 ph_state_irq(struct hfc_multi *hc, u_char r_irq_statech) in ph_state_irq() argument
2571 if (hc->chan[ch].dch) { in ph_state_irq()
2572 dch = hc->chan[ch].dch; in ph_state_irq()
2574 HFC_outb_nodebug(hc, R_ST_SEL, in ph_state_irq()
2575 hc->chan[ch].port); in ph_state_irq()
2579 st_status = HFC_inb_nodebug(hc, A_ST_RD_STATE); in ph_state_irq()
2581 HFC_inb_nodebug(hc, A_ST_RD_STATE))) { in ph_state_irq()
2591 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && in ph_state_irq()
2594 hc->syncronized |= in ph_state_irq()
2595 (1 << hc->chan[ch].port); in ph_state_irq()
2597 hc->syncronized &= in ph_state_irq()
2598 ~(1 << hc->chan[ch].port); in ph_state_irq()
2606 HFC_outb_nodebug(hc, R_FIFO, in ph_state_irq()
2608 HFC_wait_nodebug(hc); in ph_state_irq()
2609 HFC_outb_nodebug(hc, in ph_state_irq()
2611 HFC_wait_nodebug(hc); in ph_state_irq()
2619 hc->chan[ch].port); in ph_state_irq()
2624 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in ph_state_irq()
2625 plxsd_checksync(hc, 0); in ph_state_irq()
2629 fifo_irq(struct hfc_multi *hc, int block) in fifo_irq() argument
2636 r_irq_fifo_bl = HFC_inb_nodebug(hc, R_IRQ_FIFO_BL0 + block); in fifo_irq()
2640 dch = hc->chan[ch].dch; in fifo_irq()
2641 bch = hc->chan[ch].bch; in fifo_irq()
2642 if (((!dch) && (!bch)) || (!hc->created[hc->chan[ch].port])) { in fifo_irq()
2648 hfcmulti_tx(hc, ch); in fifo_irq()
2650 HFC_outb_nodebug(hc, R_FIFO, 0); in fifo_irq()
2651 HFC_wait_nodebug(hc); in fifo_irq()
2655 hfcmulti_tx(hc, ch); in fifo_irq()
2657 HFC_outb_nodebug(hc, R_FIFO, 0); in fifo_irq()
2658 HFC_wait_nodebug(hc); in fifo_irq()
2663 hfcmulti_rx(hc, ch); in fifo_irq()
2667 hfcmulti_rx(hc, ch); in fifo_irq()
2683 struct hfc_multi *hc = dev_id; in hfcmulti_interrupt() local
2692 if (!hc) { in hfcmulti_interrupt()
2697 spin_lock(&hc->lock); in hfcmulti_interrupt()
2702 "card %d, this is no bug.\n", hc->id + 1, irqsem); in hfcmulti_interrupt()
2703 irqsem = hc->id + 1; in hfcmulti_interrupt()
2706 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk) in hfcmulti_interrupt()
2709 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_interrupt()
2711 plx_acc = hc->plx_membase + PLX_INTCSR; in hfcmulti_interrupt()
2718 status = HFC_inb_nodebug(hc, R_STATUS); in hfcmulti_interrupt()
2719 r_irq_statech = HFC_inb_nodebug(hc, R_IRQ_STATECH); in hfcmulti_interrupt()
2746 hc->irqcnt++; in hfcmulti_interrupt()
2748 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_interrupt()
2749 ph_state_irq(hc, r_irq_statech); in hfcmulti_interrupt()
2753 HFC_outb(hc, R_INC_RES_FIFO, V_RES_LOST); /* clear irq! */ in hfcmulti_interrupt()
2757 r_irq_misc = HFC_inb_nodebug(hc, R_IRQ_MISC); in hfcmulti_interrupt()
2758 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ in hfcmulti_interrupt()
2760 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_interrupt()
2762 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_interrupt()
2763 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA); in hfcmulti_interrupt()
2764 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in hfcmulti_interrupt()
2765 && hc->e1_getclock) { in hfcmulti_interrupt()
2767 hc->syncronized = 1; in hfcmulti_interrupt()
2769 hc->syncronized = 0; in hfcmulti_interrupt()
2772 temp = HFC_inb_nodebug(hc, R_E1_RD_STA); in hfcmulti_interrupt()
2774 HFC_inb_nodebug(hc, R_E1_RD_STA))) { in hfcmulti_interrupt()
2785 __func__, hc->id, temp & 0x7); in hfcmulti_interrupt()
2786 for (i = 0; i < hc->ports; i++) { in hfcmulti_interrupt()
2787 dch = hc->chan[hc->dnum[i]].dch; in hfcmulti_interrupt()
2792 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in hfcmulti_interrupt()
2793 plxsd_checksync(hc, 0); in hfcmulti_interrupt()
2797 if (hc->iclock_on) in hfcmulti_interrupt()
2798 mISDN_clock_update(hc->iclock, poll, NULL); in hfcmulti_interrupt()
2799 handle_timer_irq(hc); in hfcmulti_interrupt()
2803 hfcmulti_dtmf(hc); in hfcmulti_interrupt()
2815 r_irq_oview = HFC_inb_nodebug(hc, R_IRQ_OVIEW); in hfcmulti_interrupt()
2818 fifo_irq(hc, i); in hfcmulti_interrupt()
2825 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2832 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2857 mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx, in mode_hfcmulti() argument
2866 oslot_tx = hc->chan[ch].slot_tx; in mode_hfcmulti()
2867 oslot_rx = hc->chan[ch].slot_rx; in mode_hfcmulti()
2868 conf = hc->chan[ch].conf; in mode_hfcmulti()
2874 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, in mode_hfcmulti()
2882 if (hc->slot_owner[oslot_tx << 1] == ch) { in mode_hfcmulti()
2883 HFC_outb(hc, R_SLOT, oslot_tx << 1); in mode_hfcmulti()
2884 HFC_outb(hc, A_SL_CFG, 0); in mode_hfcmulti()
2885 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2886 HFC_outb(hc, A_CONF, 0); in mode_hfcmulti()
2887 hc->slot_owner[oslot_tx << 1] = -1; in mode_hfcmulti()
2893 __func__, hc->slot_owner[oslot_tx << 1]); in mode_hfcmulti()
2903 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { in mode_hfcmulti()
2904 HFC_outb(hc, R_SLOT, (oslot_rx << 1) | V_SL_DIR); in mode_hfcmulti()
2905 HFC_outb(hc, A_SL_CFG, 0); in mode_hfcmulti()
2906 hc->slot_owner[(oslot_rx << 1) | 1] = -1; in mode_hfcmulti()
2913 hc->slot_owner[(oslot_rx << 1) | 1]); in mode_hfcmulti()
2920 hc->chan[ch].slot_tx = -1; in mode_hfcmulti()
2921 hc->chan[ch].bank_tx = 0; in mode_hfcmulti()
2924 if (hc->chan[ch].txpending) in mode_hfcmulti()
2937 HFC_outb(hc, R_SLOT, slot_tx << 1); in mode_hfcmulti()
2938 HFC_outb(hc, A_SL_CFG, (ch << 1) | routing); in mode_hfcmulti()
2939 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2940 HFC_outb(hc, A_CONF, in mode_hfcmulti()
2942 hc->slot_owner[slot_tx << 1] = ch; in mode_hfcmulti()
2943 hc->chan[ch].slot_tx = slot_tx; in mode_hfcmulti()
2944 hc->chan[ch].bank_tx = bank_tx; in mode_hfcmulti()
2949 hc->chan[ch].slot_rx = -1; in mode_hfcmulti()
2950 hc->chan[ch].bank_rx = 0; in mode_hfcmulti()
2953 if (hc->chan[ch].txpending) in mode_hfcmulti()
2966 HFC_outb(hc, R_SLOT, (slot_rx << 1) | V_SL_DIR); in mode_hfcmulti()
2967 HFC_outb(hc, A_SL_CFG, (ch << 1) | V_CH_DIR | routing); in mode_hfcmulti()
2968 hc->slot_owner[(slot_rx << 1) | 1] = ch; in mode_hfcmulti()
2969 hc->chan[ch].slot_rx = slot_rx; in mode_hfcmulti()
2970 hc->chan[ch].bank_rx = bank_rx; in mode_hfcmulti()
2976 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
2977 HFC_wait(hc); in mode_hfcmulti()
2978 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | V_IFF); in mode_hfcmulti()
2979 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
2980 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
2981 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
2982 HFC_wait(hc); in mode_hfcmulti()
2984 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
2985 HFC_wait(hc); in mode_hfcmulti()
2986 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00); in mode_hfcmulti()
2987 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
2988 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
2989 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
2990 HFC_wait(hc); in mode_hfcmulti()
2991 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
2992 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= in mode_hfcmulti()
2994 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
2997 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
2998 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3000 if (hc->chan[ch].bch) { in mode_hfcmulti()
3001 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3003 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3008 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in mode_hfcmulti()
3009 (hc->chan[ch].slot_rx < 0) && in mode_hfcmulti()
3010 (hc->chan[ch].slot_tx < 0)) { in mode_hfcmulti()
3018 vpm_out(hc, ch, ((ch / 4) * 8) + in mode_hfcmulti()
3022 HFC_outb(hc, R_FIFO, (ch << 1)); in mode_hfcmulti()
3023 HFC_wait(hc); in mode_hfcmulti()
3024 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3025 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + in mode_hfcmulti()
3027 HFC_outb(hc, A_SL_CFG, 0x80 | (ch << 1)); in mode_hfcmulti()
3030 HFC_outb(hc, R_FIFO, 0x20 | (ch << 1) | 1); in mode_hfcmulti()
3031 HFC_wait(hc); in mode_hfcmulti()
3032 HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3033 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3034 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3035 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3036 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3037 HFC_wait(hc); in mode_hfcmulti()
3039 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + in mode_hfcmulti()
3041 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1) | 1); in mode_hfcmulti()
3045 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3046 HFC_wait(hc); in mode_hfcmulti()
3047 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3048 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + in mode_hfcmulti()
3050 HFC_outb(hc, A_SL_CFG, 0x80 | 0x40 | (ch << 1) | 1); in mode_hfcmulti()
3053 HFC_outb(hc, R_FIFO, 0x20 | (ch << 1)); in mode_hfcmulti()
3054 HFC_wait(hc); in mode_hfcmulti()
3055 HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3056 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3057 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3058 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3059 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3060 HFC_wait(hc); in mode_hfcmulti()
3063 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3064 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + in mode_hfcmulti()
3066 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1)); in mode_hfcmulti()
3069 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
3070 HFC_wait(hc); in mode_hfcmulti()
3071 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3072 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x07 << 2 | in mode_hfcmulti()
3076 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | in mode_hfcmulti()
3078 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3079 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3080 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3081 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3082 HFC_wait(hc); in mode_hfcmulti()
3085 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3087 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3088 HFC_wait(hc); in mode_hfcmulti()
3089 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3090 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x07 << 2 | in mode_hfcmulti()
3094 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 | in mode_hfcmulti()
3096 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3097 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3098 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3099 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3100 HFC_wait(hc); in mode_hfcmulti()
3103 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3104 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3106 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3109 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
3110 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3112 if (hc->chan[ch].bch) in mode_hfcmulti()
3114 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3122 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
3123 HFC_wait(hc); in mode_hfcmulti()
3124 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { in mode_hfcmulti()
3126 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04); in mode_hfcmulti()
3127 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3130 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04 | V_IFF); in mode_hfcmulti()
3131 HFC_outb(hc, A_SUBCH_CFG, 2); in mode_hfcmulti()
3133 HFC_outb(hc, A_IRQ_MSK, V_IRQ); in mode_hfcmulti()
3134 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3135 HFC_wait(hc); in mode_hfcmulti()
3137 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3138 HFC_wait(hc); in mode_hfcmulti()
3139 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04); in mode_hfcmulti()
3140 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) in mode_hfcmulti()
3141 HFC_outb(hc, A_SUBCH_CFG, 0); /* full 8 bits */ in mode_hfcmulti()
3143 HFC_outb(hc, A_SUBCH_CFG, 2); /* 2 bits dchannel */ in mode_hfcmulti()
3144 HFC_outb(hc, A_IRQ_MSK, V_IRQ); in mode_hfcmulti()
3145 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3146 HFC_wait(hc); in mode_hfcmulti()
3147 if (hc->chan[ch].bch) { in mode_hfcmulti()
3148 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3149 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3150 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3152 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3155 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
3156 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3163 hc->chan[ch].protocol = ISDN_P_NONE; in mode_hfcmulti()
3166 hc->chan[ch].protocol = protocol; in mode_hfcmulti()
3176 hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx, in hfcmulti_pcm() argument
3181 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); in hfcmulti_pcm()
3186 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, in hfcmulti_pcm()
3195 hfcmulti_conf(struct hfc_multi *hc, int ch, int num) in hfcmulti_conf() argument
3198 hc->chan[ch].conf = num; in hfcmulti_conf()
3200 hc->chan[ch].conf = -1; in hfcmulti_conf()
3201 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, in hfcmulti_conf()
3202 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, in hfcmulti_conf()
3203 hc->chan[ch].bank_rx); in hfcmulti_conf()
3219 struct hfc_multi *hc = dch->hw; in hfcm_l1callback() local
3228 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3229 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3235 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3238 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 3); /* F3 */ in hfcm_l1callback()
3240 HFC_outb(hc, A_ST_WR_STATE, 3); in hfcm_l1callback()
3241 HFC_outb(hc, A_ST_WR_STATE, 3 | (V_ST_ACT * 3)); in hfcm_l1callback()
3244 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3249 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3250 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3256 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3259 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2); in hfcm_l1callback()
3261 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcm_l1callback()
3262 hc->syncronized &= in hfcm_l1callback()
3263 ~(1 << hc->chan[dch->slot].port); in hfcm_l1callback()
3264 plxsd_checksync(hc, 0); in hfcm_l1callback()
3280 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3283 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3284 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3290 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3293 HFC_outb(hc, A_ST_WR_STATE, 3 | 0x10); /* activate */ in hfcm_l1callback()
3295 HFC_outb(hc, A_ST_WR_STATE, 3); /* activate */ in hfcm_l1callback()
3297 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3327 struct hfc_multi *hc = dch->hw; in handle_dmsg() local
3337 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3341 hfcmulti_tx(hc, dch->slot); in handle_dmsg()
3344 HFC_outb(hc, R_FIFO, 0); in handle_dmsg()
3345 HFC_wait(hc); in handle_dmsg()
3346 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3349 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3353 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3358 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3359 hc->ports - 1); in handle_dmsg()
3361 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3368 HFC_outb(hc, R_ST_SEL, in handle_dmsg()
3369 hc->chan[dch->slot].port); in handle_dmsg()
3372 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 1); in handle_dmsg()
3375 HFC_outb(hc, A_ST_WR_STATE, 1); in handle_dmsg()
3376 HFC_outb(hc, A_ST_WR_STATE, 1 | in handle_dmsg()
3380 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3387 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3391 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3392 hc->ports - 1); in handle_dmsg()
3394 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3400 HFC_outb(hc, R_ST_SEL, in handle_dmsg()
3401 hc->chan[dch->slot].port); in handle_dmsg()
3404 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2); in handle_dmsg()
3423 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in handle_dmsg()
3426 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3439 struct hfc_multi *hc = bch->hw; in deactivate_bchannel() local
3442 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
3444 hc->chan[bch->slot].coeff_count = 0; in deactivate_bchannel()
3445 hc->chan[bch->slot].rx_off = 0; in deactivate_bchannel()
3446 hc->chan[bch->slot].conf = -1; in deactivate_bchannel()
3447 mode_hfcmulti(hc, bch->slot, ISDN_P_NONE, -1, 0, -1, 0); in deactivate_bchannel()
3448 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
3455 struct hfc_multi *hc = bch->hw; in handle_bmsg() local
3464 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3467 hfcmulti_tx(hc, bch->slot); in handle_bmsg()
3470 HFC_outb_nodebug(hc, R_FIFO, 0); in handle_bmsg()
3471 HFC_wait_nodebug(hc); in handle_bmsg()
3473 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3479 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3482 hc->chan[bch->slot].txpending = 0; in handle_bmsg()
3483 ret = mode_hfcmulti(hc, bch->slot, in handle_bmsg()
3485 hc->chan[bch->slot].slot_tx, in handle_bmsg()
3486 hc->chan[bch->slot].bank_tx, in handle_bmsg()
3487 hc->chan[bch->slot].slot_rx, in handle_bmsg()
3488 hc->chan[bch->slot].bank_rx); in handle_bmsg()
3490 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf in handle_bmsg()
3491 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { in handle_bmsg()
3493 hc->dtmf = 1; in handle_bmsg()
3498 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | in handle_bmsg()
3504 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3510 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3531 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3554 struct hfc_multi *hc = bch->hw; in channel_bctrl() local
3568 hc->chan[bch->slot].rx_off = !!cq->p1; in channel_bctrl()
3569 if (!hc->chan[bch->slot].rx_off) { in channel_bctrl()
3571 HFC_outb_nodebug(hc, R_FIFO, (bch->slot << 1) | 1); in channel_bctrl()
3572 HFC_wait_nodebug(hc); in channel_bctrl()
3573 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in channel_bctrl()
3574 HFC_wait_nodebug(hc); in channel_bctrl()
3578 __func__, bch->nr, hc->chan[bch->slot].rx_off); in channel_bctrl()
3582 hc->silence = bch->fill[0]; in channel_bctrl()
3583 memset(hc->silence_data, hc->silence, sizeof(hc->silence_data)); in channel_bctrl()
3590 features->hfc_id = hc->id; in channel_bctrl()
3591 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) in channel_bctrl()
3593 if (test_bit(HFC_CHIP_CONF, &hc->chip)) in channel_bctrl()
3596 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in channel_bctrl()
3599 features->pcm_id = hc->pcm; in channel_bctrl()
3600 features->pcm_slots = hc->slots; in channel_bctrl()
3615 if (slot_tx < hc->slots && bank_tx <= 2 && in channel_bctrl()
3616 slot_rx < hc->slots && bank_rx <= 2) in channel_bctrl()
3617 hfcmulti_pcm(hc, bch->slot, in channel_bctrl()
3632 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); in channel_bctrl()
3640 hfcmulti_conf(hc, bch->slot, num); in channel_bctrl()
3651 hfcmulti_conf(hc, bch->slot, -1); in channel_bctrl()
3656 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3657 vpm_echocan_on(hc, bch->slot, cq->p1); in channel_bctrl()
3666 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3667 vpm_echocan_off(hc, bch->slot); in channel_bctrl()
3682 struct hfc_multi *hc = bch->hw; in hfcm_bctrl() local
3699 spin_lock_irqsave(&hc->lock, flags); in hfcm_bctrl()
3701 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_bctrl()
3718 struct hfc_multi *hc; in ph_state_change() local
3725 hc = dch->hw; in ph_state_change()
3728 if (hc->ctype == HFC_TYPE_E1) { in ph_state_change()
3733 __func__, hc->id, dch->state); in ph_state_change()
3738 __func__, hc->id, dch->state); in ph_state_change()
3742 if (hc->e1_state != 1) { in ph_state_change()
3745 HFC_outb_nodebug(hc, R_FIFO, in ph_state_change()
3747 HFC_wait_nodebug(hc); in ph_state_change()
3748 HFC_outb_nodebug(hc, R_INC_RES_FIFO, in ph_state_change()
3750 HFC_wait_nodebug(hc); in ph_state_change()
3759 if (hc->e1_state != 1) in ph_state_change()
3765 hc->e1_state = dch->state; in ph_state_change()
3796 if (hc->chan[ch].nt_timer == 0) { in ph_state_change()
3797 hc->chan[ch].nt_timer = -1; in ph_state_change()
3798 HFC_outb(hc, R_ST_SEL, in ph_state_change()
3799 hc->chan[ch].port); in ph_state_change()
3802 HFC_outb(hc, A_ST_WR_STATE, 4 | in ph_state_change()
3805 HFC_outb(hc, A_ST_WR_STATE, 4); in ph_state_change()
3809 hc->chan[ch].nt_timer = in ph_state_change()
3811 HFC_outb(hc, R_ST_SEL, in ph_state_change()
3812 hc->chan[ch].port); in ph_state_change()
3816 HFC_outb(hc, A_ST_WR_STATE, 2 | in ph_state_change()
3821 hc->chan[ch].nt_timer = -1; in ph_state_change()
3827 hc->chan[ch].nt_timer = -1; in ph_state_change()
3830 hc->chan[ch].nt_timer = -1; in ph_state_change()
3847 struct hfc_multi *hc = dch->hw; in hfcmulti_initmode() local
3855 pt = hc->chan[i].port; in hfcmulti_initmode()
3856 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_initmode()
3858 hc->chan[hc->dnum[pt]].slot_tx = -1; in hfcmulti_initmode()
3859 hc->chan[hc->dnum[pt]].slot_rx = -1; in hfcmulti_initmode()
3860 hc->chan[hc->dnum[pt]].conf = -1; in hfcmulti_initmode()
3861 if (hc->dnum[pt]) { in hfcmulti_initmode()
3862 mode_hfcmulti(hc, dch->slot, dch->dev.D.protocol, in hfcmulti_initmode()
3867 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in hfcmulti_initmode()
3869 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3870 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3871 hc->chan[i].conf = -1; in hfcmulti_initmode()
3872 mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3875 if (hc->ctype == HFC_TYPE_E1 && pt == 0) { in hfcmulti_initmode()
3877 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_initmode()
3878 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3879 HFC_outb(hc, R_LOS0, 255); /* 2 ms */ in hfcmulti_initmode()
3880 HFC_outb(hc, R_LOS1, 255); /* 512 ms */ in hfcmulti_initmode()
3882 if (test_bit(HFC_CFG_OPTICAL, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3883 HFC_outb(hc, R_RX0, 0); in hfcmulti_initmode()
3884 hc->hw.r_tx0 = 0 | V_OUT_EN; in hfcmulti_initmode()
3886 HFC_outb(hc, R_RX0, 1); in hfcmulti_initmode()
3887 hc->hw.r_tx0 = 1 | V_OUT_EN; in hfcmulti_initmode()
3889 hc->hw.r_tx1 = V_ATX | V_NTRI; in hfcmulti_initmode()
3890 HFC_outb(hc, R_TX0, hc->hw.r_tx0); in hfcmulti_initmode()
3891 HFC_outb(hc, R_TX1, hc->hw.r_tx1); in hfcmulti_initmode()
3892 HFC_outb(hc, R_TX_FR0, 0x00); in hfcmulti_initmode()
3893 HFC_outb(hc, R_TX_FR1, 0xf8); in hfcmulti_initmode()
3895 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3896 HFC_outb(hc, R_TX_FR2, V_TX_MF | V_TX_E | V_NEG_E); in hfcmulti_initmode()
3898 HFC_outb(hc, R_RX_FR0, V_AUTO_RESYNC | V_AUTO_RECO | 0); in hfcmulti_initmode()
3900 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3901 HFC_outb(hc, R_RX_FR1, V_RX_MF | V_RX_MF_SYNC); in hfcmulti_initmode()
3908 hc->e1_getclock = 0; in hfcmulti_initmode()
3914 hc->e1_getclock = 1; in hfcmulti_initmode()
3916 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in hfcmulti_initmode()
3917 HFC_outb(hc, R_SYNC_OUT, V_SYNC_E1_RX); in hfcmulti_initmode()
3919 HFC_outb(hc, R_SYNC_OUT, 0); in hfcmulti_initmode()
3920 if (test_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip)) in hfcmulti_initmode()
3921 hc->e1_getclock = 1; in hfcmulti_initmode()
3922 if (test_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip)) in hfcmulti_initmode()
3923 hc->e1_getclock = 0; in hfcmulti_initmode()
3924 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in hfcmulti_initmode()
3930 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | V_PCM_SYNC); in hfcmulti_initmode()
3932 if (hc->e1_getclock) { in hfcmulti_initmode()
3938 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS); in hfcmulti_initmode()
3946 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | in hfcmulti_initmode()
3948 HFC_outb(hc, R_SYNC_OUT, 0); in hfcmulti_initmode()
3951 HFC_outb(hc, R_JATT_ATT, 0x9c); /* undoc register */ in hfcmulti_initmode()
3952 HFC_outb(hc, R_PWM_MD, V_PWM0_MD); in hfcmulti_initmode()
3953 HFC_outb(hc, R_PWM0, 0x50); in hfcmulti_initmode()
3954 HFC_outb(hc, R_PWM1, 0xff); in hfcmulti_initmode()
3956 HFC_outb(hc, R_E1_WR_STA, r_e1_wr_sta | V_E1_LD_STA); in hfcmulti_initmode()
3958 HFC_outb(hc, R_E1_WR_STA, r_e1_wr_sta); in hfcmulti_initmode()
3959 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
3960 hc->syncronized = 0; in hfcmulti_initmode()
3961 plxsd_checksync(hc, 0); in hfcmulti_initmode()
3964 if (hc->ctype != HFC_TYPE_E1) { in hfcmulti_initmode()
3966 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3967 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3968 hc->chan[i].conf = -1; in hfcmulti_initmode()
3969 mode_hfcmulti(hc, i, dch->dev.D.protocol, -1, 0, -1, 0); in hfcmulti_initmode()
3971 hc->chan[i - 2].slot_tx = -1; in hfcmulti_initmode()
3972 hc->chan[i - 2].slot_rx = -1; in hfcmulti_initmode()
3973 hc->chan[i - 2].conf = -1; in hfcmulti_initmode()
3974 mode_hfcmulti(hc, i - 2, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3975 hc->chan[i - 1].slot_tx = -1; in hfcmulti_initmode()
3976 hc->chan[i - 1].slot_rx = -1; in hfcmulti_initmode()
3977 hc->chan[i - 1].conf = -1; in hfcmulti_initmode()
3978 mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3980 HFC_outb(hc, R_ST_SEL, pt); in hfcmulti_initmode()
3989 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt); in hfcmulti_initmode()
3991 hc->hw.a_st_ctrl0[pt] = V_ST_MD; in hfcmulti_initmode()
3998 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te); in hfcmulti_initmode()
4000 hc->hw.a_st_ctrl0[pt] = 0; in hfcmulti_initmode()
4002 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) in hfcmulti_initmode()
4003 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; in hfcmulti_initmode()
4004 if (hc->ctype == HFC_TYPE_XHFC) { in hfcmulti_initmode()
4005 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; in hfcmulti_initmode()
4006 HFC_outb(hc, 0x35 /* A_ST_CTRL3 */, in hfcmulti_initmode()
4010 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); in hfcmulti_initmode()
4013 test_bit(HFC_CFG_DIS_ECHANNEL, &hc->chan[i].cfg)) in hfcmulti_initmode()
4014 HFC_outb(hc, A_ST_CTRL1, V_E_IGNO); in hfcmulti_initmode()
4016 HFC_outb(hc, A_ST_CTRL1, 0); in hfcmulti_initmode()
4018 HFC_outb(hc, A_ST_CTRL2, V_B1_RX_EN | V_B2_RX_EN); in hfcmulti_initmode()
4020 HFC_outb(hc, A_ST_WR_STATE, a_st_wr_state | V_ST_LD_STA); in hfcmulti_initmode()
4022 HFC_outb(hc, A_ST_WR_STATE, a_st_wr_state); in hfcmulti_initmode()
4023 hc->hw.r_sci_msk |= 1 << pt; in hfcmulti_initmode()
4025 HFC_outb(hc, R_SCI_MSK, hc->hw.r_sci_msk); in hfcmulti_initmode()
4027 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
4028 hc->syncronized &= in hfcmulti_initmode()
4029 ~(1 << hc->chan[dch->slot].port); in hfcmulti_initmode()
4030 plxsd_checksync(hc, 0); in hfcmulti_initmode()
4039 open_dchannel(struct hfc_multi *hc, struct dchannel *dch, in open_dchannel() argument
4066 spin_lock_irqsave(&hc->lock, flags); in open_dchannel()
4068 spin_unlock_irqrestore(&hc->lock, flags); in open_dchannel()
4080 open_bchannel(struct hfc_multi *hc, struct dchannel *dch, in open_bchannel() argument
4090 if (hc->ctype == HFC_TYPE_E1) in open_bchannel()
4094 bch = hc->chan[ch].bch; in open_bchannel()
4103 hc->chan[ch].rx_off = 0; in open_bchannel()
4116 struct hfc_multi *hc = dch->hw; in channel_dctrl() local
4132 HFC_outb(hc, R_TI_WD, poll_timer | (wd_cnt << 4)); in channel_dctrl()
4133 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); in channel_dctrl()
4134 if (hc->ctype == HFC_TYPE_XHFC) in channel_dctrl()
4135 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */; in channel_dctrl()
4137 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4138 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in channel_dctrl()
4140 HFC_outb(hc, R_GPIO_SEL, V_GPIO_SEL7); in channel_dctrl()
4141 HFC_outb(hc, R_GPIO_EN1, V_GPIO_EN15); in channel_dctrl()
4142 HFC_outb(hc, R_GPIO_OUT1, 0); in channel_dctrl()
4143 HFC_outb(hc, R_GPIO_OUT1, V_GPIO_OUT15); in channel_dctrl()
4150 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4169 struct hfc_multi *hc = dch->hw; in hfcm_dctrl() local
4183 if (hc->ctype == HFC_TYPE_E1) { in hfcm_dctrl()
4187 err = open_dchannel(hc, dch, rq); /* locked there */ in hfcm_dctrl()
4191 if (hc->ctype != HFC_TYPE_E1) { in hfcm_dctrl()
4195 err = open_dchannel(hc, dch, rq); /* locked there */ in hfcm_dctrl()
4198 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4199 err = open_bchannel(hc, dch, rq); in hfcm_dctrl()
4200 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4211 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4213 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4227 struct hfc_multi *hc = priv; in clockctl() local
4229 hc->iclock_on = enable; in clockctl()
4242 init_card(struct hfc_multi *hc) in init_card() argument
4252 spin_lock_irqsave(&hc->lock, flags); in init_card()
4254 hc->hw.r_irq_ctrl = V_FIFO_IRQ; in init_card()
4255 disable_hwirq(hc); in init_card()
4256 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4258 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, in init_card()
4259 "HFC-multi", hc)) { in init_card()
4261 hc->irq); in init_card()
4262 hc->irq = 0; in init_card()
4266 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4268 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4276 __func__, hc->irq, hc->irqcnt); in init_card()
4277 err = init_chip(hc); in init_card()
4285 spin_lock_irqsave(&hc->lock, flags); in init_card()
4286 enable_hwirq(hc); in init_card()
4287 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4292 spin_lock_irqsave(&hc->lock, flags); in init_card()
4293 disable_hwirq(hc); in init_card()
4294 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4297 __func__, hc->irq, hc->irqcnt); in init_card()
4298 if (hc->irqcnt) { in init_card()
4304 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_card()
4310 hc->irq); in init_card()
4315 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4317 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4323 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq); in init_card()
4324 if (hc->irq) { in init_card()
4325 free_irq(hc->irq, hc); in init_card()
4326 hc->irq = 0; in init_card()
4339 setup_pci(struct hfc_multi *hc, struct pci_dev *pdev, in setup_pci() argument
4348 hc->pci_dev = pdev; in setup_pci()
4350 test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); in setup_pci()
4354 test_and_set_bit(HFC_CHIP_B410P, &hc->chip); in setup_pci()
4355 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in setup_pci()
4356 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in setup_pci()
4357 hc->slots = 32; in setup_pci()
4360 if (hc->pci_dev->irq <= 0) { in setup_pci()
4364 if (pci_enable_device(hc->pci_dev)) { in setup_pci()
4368 hc->leds = m->leds; in setup_pci()
4369 hc->ledstate = 0xAFFEAFFE; in setup_pci()
4370 hc->opticalsupport = m->opticalsupport; in setup_pci()
4372 hc->pci_iobase = 0; in setup_pci()
4373 hc->pci_membase = NULL; in setup_pci()
4374 hc->plx_membase = NULL; in setup_pci()
4378 hc->io_mode = m->io_mode; in setup_pci()
4379 switch (hc->io_mode) { in setup_pci()
4381 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); in setup_pci()
4382 hc->slots = 128; /* required */ in setup_pci()
4383 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4384 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4385 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4386 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4387 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4388 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4389 hc->plx_origmembase = hc->pci_dev->resource[0].start; in setup_pci()
4392 if (!hc->plx_origmembase) { in setup_pci()
4395 pci_disable_device(hc->pci_dev); in setup_pci()
4399 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); in setup_pci()
4400 if (!hc->plx_membase) { in setup_pci()
4404 pci_disable_device(hc->pci_dev); in setup_pci()
4409 (u_long)hc->plx_membase, hc->plx_origmembase); in setup_pci()
4411 hc->pci_origmembase = hc->pci_dev->resource[2].start; in setup_pci()
4413 if (!hc->pci_origmembase) { in setup_pci()
4416 pci_disable_device(hc->pci_dev); in setup_pci()
4420 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); in setup_pci()
4421 if (!hc->pci_membase) { in setup_pci()
4424 pci_disable_device(hc->pci_dev); in setup_pci()
4431 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, in setup_pci()
4432 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4433 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4436 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4437 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4438 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4439 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4440 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4441 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4442 hc->pci_origmembase = hc->pci_dev->resource[1].start; in setup_pci()
4443 if (!hc->pci_origmembase) { in setup_pci()
4446 pci_disable_device(hc->pci_dev); in setup_pci()
4450 hc->pci_membase = ioremap(hc->pci_origmembase, 256); in setup_pci()
4451 if (!hc->pci_membase) { in setup_pci()
4455 pci_disable_device(hc->pci_dev); in setup_pci()
4459 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, in setup_pci()
4460 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4461 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4464 hc->HFC_outb = HFC_outb_regio; in setup_pci()
4465 hc->HFC_inb = HFC_inb_regio; in setup_pci()
4466 hc->HFC_inw = HFC_inw_regio; in setup_pci()
4467 hc->HFC_wait = HFC_wait_regio; in setup_pci()
4468 hc->read_fifo = read_fifo_regio; in setup_pci()
4469 hc->write_fifo = write_fifo_regio; in setup_pci()
4470 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; in setup_pci()
4471 if (!hc->pci_iobase) { in setup_pci()
4474 pci_disable_device(hc->pci_dev); in setup_pci()
4478 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { in setup_pci()
4481 hc->pci_iobase); in setup_pci()
4482 pci_disable_device(hc->pci_dev); in setup_pci()
4488 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, in setup_pci()
4489 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4490 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); in setup_pci()
4494 pci_disable_device(hc->pci_dev); in setup_pci()
4498 pci_set_drvdata(hc->pci_dev, hc); in setup_pci()
4511 release_port(struct hfc_multi *hc, struct dchannel *dch) in release_port() argument
4518 pt = hc->chan[ci].port; in release_port()
4524 if (pt >= hc->ports) { in release_port()
4537 hc->chan[ci].dch = NULL; in release_port()
4539 if (hc->created[pt]) { in release_port()
4540 hc->created[pt] = 0; in release_port()
4544 spin_lock_irqsave(&hc->lock, flags); in release_port()
4551 if (hc->ctype == HFC_TYPE_E1) { /* E1 */ in release_port()
4553 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4554 hc->syncronized = 0; in release_port()
4555 plxsd_checksync(hc, 1); in release_port()
4559 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in release_port()
4561 if (hc->chan[i].bch) { in release_port()
4565 __func__, hc->chan[i].port + 1, i); in release_port()
4566 pb = hc->chan[i].bch; in release_port()
4567 hc->chan[i].bch = NULL; in release_port()
4568 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4571 kfree(hc->chan[i].coeff); in release_port()
4572 spin_lock_irqsave(&hc->lock, flags); in release_port()
4577 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4578 hc->syncronized &= in release_port()
4579 ~(1 << hc->chan[ci].port); in release_port()
4580 plxsd_checksync(hc, 1); in release_port()
4583 if (hc->chan[ci - 2].bch) { in release_port()
4587 __func__, hc->chan[ci - 2].port + 1, in release_port()
4589 pb = hc->chan[ci - 2].bch; in release_port()
4590 hc->chan[ci - 2].bch = NULL; in release_port()
4591 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4594 kfree(hc->chan[ci - 2].coeff); in release_port()
4595 spin_lock_irqsave(&hc->lock, flags); in release_port()
4597 if (hc->chan[ci - 1].bch) { in release_port()
4601 __func__, hc->chan[ci - 1].port + 1, in release_port()
4603 pb = hc->chan[ci - 1].bch; in release_port()
4604 hc->chan[ci - 1].bch = NULL; in release_port()
4605 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4608 kfree(hc->chan[ci - 1].coeff); in release_port()
4609 spin_lock_irqsave(&hc->lock, flags); in release_port()
4613 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4626 release_card(struct hfc_multi *hc) in release_card() argument
4633 __func__, hc->id); in release_card()
4636 if (hc->iclock) in release_card()
4637 mISDN_unregister_clock(hc->iclock); in release_card()
4640 spin_lock_irqsave(&hc->lock, flags); in release_card()
4641 disable_hwirq(hc); in release_card()
4642 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
4644 if (hc->irq) { in release_card()
4647 __func__, hc->irq, hc); in release_card()
4648 free_irq(hc->irq, hc); in release_card()
4649 hc->irq = 0; in release_card()
4658 if (hc->chan[ch].dch) in release_card()
4659 release_port(hc, hc->chan[ch].dch); in release_card()
4663 if (hc->leds) in release_card()
4664 hfcmulti_leds(hc); in release_card()
4667 release_io_hfcmulti(hc); in release_card()
4672 list_del(&hc->list); in release_card()
4676 if (hc == syncmaster) in release_card()
4678 kfree(hc); in release_card()
4685 init_e1_port_hw(struct hfc_multi *hc, struct hm_map *m) in init_e1_port_hw() argument
4702 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4712 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4721 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4731 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4741 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4750 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4763 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); in init_e1_port_hw()
4770 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); in init_e1_port_hw()
4778 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); in init_e1_port_hw()
4782 hc->chan[hc->dnum[0]].jitter = (port[Port_cnt]>>12) & 0x3; in init_e1_port_hw()
4787 __func__, hc->chan[hc->dnum[0]].jitter, in init_e1_port_hw()
4790 hc->chan[hc->dnum[0]].jitter = 2; /* default */ in init_e1_port_hw()
4794 init_e1_port(struct hfc_multi *hc, struct hm_map *m, int pt) in init_e1_port() argument
4807 dch->hw = hc; in init_e1_port()
4813 dch->slot = hc->dnum[pt]; in init_e1_port()
4814 hc->chan[hc->dnum[pt]].dch = dch; in init_e1_port()
4815 hc->chan[hc->dnum[pt]].port = pt; in init_e1_port()
4816 hc->chan[hc->dnum[pt]].nt_timer = -1; in init_e1_port()
4818 if (!((1 << ch) & hc->bmask[pt])) /* skip unused channel */ in init_e1_port()
4827 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); in init_e1_port()
4828 if (!hc->chan[ch].coeff) { in init_e1_port()
4839 bch->hw = hc; in init_e1_port()
4844 hc->chan[ch].bch = bch; in init_e1_port()
4845 hc->chan[ch].port = pt; in init_e1_port()
4851 init_e1_port_hw(hc, m); in init_e1_port()
4852 if (hc->ports > 1) in init_e1_port()
4857 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_e1_port()
4860 hc->created[pt] = 1; in init_e1_port()
4863 release_port(hc, dch); in init_e1_port()
4868 init_multi_port(struct hfc_multi *hc, int pt) in init_multi_port() argument
4880 dch->hw = hc; in init_multi_port()
4889 hc->chan[i + 2].dch = dch; in init_multi_port()
4890 hc->chan[i + 2].port = pt; in init_multi_port()
4891 hc->chan[i + 2].nt_timer = -1; in init_multi_port()
4900 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); in init_multi_port()
4901 if (!hc->chan[i + ch].coeff) { in init_multi_port()
4912 bch->hw = hc; in init_multi_port()
4917 hc->chan[i + ch].bch = bch; in init_multi_port()
4918 hc->chan[i + ch].port = pt; in init_multi_port()
4936 if (hc->masterclk >= 0) { in init_multi_port()
4940 pt + 1, HFC_cnt + 1, hc->masterclk + 1); in init_multi_port()
4944 hc->masterclk = pt; in init_multi_port()
4954 &hc->chan[i + 2].cfg); in init_multi_port()
4964 &hc->chan[i + 2].cfg); in init_multi_port()
4966 if (hc->ctype == HFC_TYPE_XHFC) { in init_multi_port()
4972 hc->ctype, HFC_cnt + 1, pt + 1); in init_multi_port()
4973 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_multi_port()
4977 hc->created[pt] = 1; in init_multi_port()
4980 release_port(hc, dch); in init_multi_port()
4990 struct hfc_multi *hc; in hfcmulti_init() local
5016 hc = kzalloc(sizeof(struct hfc_multi), GFP_KERNEL); in hfcmulti_init()
5017 if (!hc) { in hfcmulti_init()
5021 spin_lock_init(&hc->lock); in hfcmulti_init()
5022 hc->mtyp = m; in hfcmulti_init()
5023 hc->ctype = m->type; in hfcmulti_init()
5024 hc->ports = m->ports; in hfcmulti_init()
5025 hc->id = HFC_cnt; in hfcmulti_init()
5026 hc->pcm = pcm[HFC_cnt]; in hfcmulti_init()
5027 hc->io_mode = iomode[HFC_cnt]; in hfcmulti_init()
5028 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5035 hc->dnum[pt] = ch; in hfcmulti_init()
5036 hc->bmask[pt] = bmask[bmask_cnt++]; in hfcmulti_init()
5037 if ((maskcheck & hc->bmask[pt]) in hfcmulti_init()
5038 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5042 kfree(hc); in hfcmulti_init()
5045 maskcheck |= hc->bmask[pt]; in hfcmulti_init()
5048 E1_cnt + 1, ch, hc->bmask[pt]); in hfcmulti_init()
5051 hc->ports = pt; in hfcmulti_init()
5053 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
5055 hc->dnum[0] = 16; in hfcmulti_init()
5056 hc->bmask[0] = 0xfffefffe; in hfcmulti_init()
5057 hc->ports = 1; in hfcmulti_init()
5061 hc->masterclk = -1; in hfcmulti_init()
5063 test_and_set_bit(HFC_CHIP_ULAW, &hc->chip); in hfcmulti_init()
5064 hc->silence = 0xff; /* ulaw silence */ in hfcmulti_init()
5066 hc->silence = 0x2a; /* alaw silence */ in hfcmulti_init()
5067 if ((poll >> 1) > sizeof(hc->silence_data)) { in hfcmulti_init()
5070 kfree(hc); in hfcmulti_init()
5074 hc->silence_data[i] = hc->silence; in hfcmulti_init()
5076 if (hc->ctype != HFC_TYPE_XHFC) { in hfcmulti_init()
5078 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); in hfcmulti_init()
5079 test_and_set_bit(HFC_CHIP_CONF, &hc->chip); in hfcmulti_init()
5083 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5085 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in hfcmulti_init()
5086 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5089 test_and_set_bit(HFC_CHIP_EXRAM_128, &hc->chip); in hfcmulti_init()
5091 test_and_set_bit(HFC_CHIP_EXRAM_512, &hc->chip); in hfcmulti_init()
5092 hc->slots = 32; in hfcmulti_init()
5094 hc->slots = 64; in hfcmulti_init()
5096 hc->slots = 128; in hfcmulti_init()
5098 test_and_set_bit(HFC_CHIP_WATCHDOG, &hc->chip); in hfcmulti_init()
5099 hc->wdcount = 0; in hfcmulti_init()
5100 hc->wdbyte = V_GPIO_OUT2; in hfcmulti_init()
5106 ret_err = setup_pci(hc, pdev, ent); in hfcmulti_init()
5109 ret_err = setup_embedded(hc, m); in hfcmulti_init()
5117 if (hc == syncmaster) in hfcmulti_init()
5119 kfree(hc); in hfcmulti_init()
5123 hc->HFC_outb_nodebug = hc->HFC_outb; in hfcmulti_init()
5124 hc->HFC_inb_nodebug = hc->HFC_inb; in hfcmulti_init()
5125 hc->HFC_inw_nodebug = hc->HFC_inw; in hfcmulti_init()
5126 hc->HFC_wait_nodebug = hc->HFC_wait; in hfcmulti_init()
5128 hc->HFC_outb = HFC_outb_debug; in hfcmulti_init()
5129 hc->HFC_inb = HFC_inb_debug; in hfcmulti_init()
5130 hc->HFC_inw = HFC_inw_debug; in hfcmulti_init()
5131 hc->HFC_wait = HFC_wait_debug; in hfcmulti_init()
5134 for (pt = 0; pt < hc->ports; pt++) { in hfcmulti_init()
5141 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5142 ret_err = init_e1_port(hc, m, pt); in hfcmulti_init()
5144 ret_err = init_multi_port(hc, pt); in hfcmulti_init()
5154 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5155 release_port(hc, in hfcmulti_init()
5156 hc->chan[hc->dnum[pt]].dch); in hfcmulti_init()
5158 release_port(hc, in hfcmulti_init()
5159 hc->chan[(pt << 2) + 2].dch); in hfcmulti_init()
5163 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_init()
5166 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_init()
5179 dips = ((~HFC_inb(hc, R_GPIO_IN1) & 0xE0) >> 5) | in hfcmulti_init()
5180 ((~HFC_inb(hc, R_GPI_IN2) & 0x80) >> 3) | in hfcmulti_init()
5181 (~HFC_inb(hc, R_GPI_IN2) & 0x08); in hfcmulti_init()
5184 pmj = ((HFC_inb(hc, R_GPI_IN3) >> 4) & 0xf); in hfcmulti_init()
5186 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in hfcmulti_init()
5197 HFC_outb(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK); in hfcmulti_init()
5199 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_init()
5204 dips = inb(hc->pci_iobase); in hfcmulti_init()
5205 dips = inb(hc->pci_iobase); in hfcmulti_init()
5206 dips = inb(hc->pci_iobase); in hfcmulti_init()
5207 dips = ~inb(hc->pci_iobase) & 0x3F; in hfcmulti_init()
5208 outw(0x0, hc->pci_iobase + 4); in hfcmulti_init()
5210 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); in hfcmulti_init()
5219 dips = (~HFC_inb(hc, R_GPI_IN0) & 0xF0) >> 4; in hfcmulti_init()
5227 list_add_tail(&hc->list, &HFClist); in hfcmulti_init()
5232 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); in hfcmulti_init()
5235 hc->irq = (m->irq) ? : hc->pci_dev->irq; in hfcmulti_init()
5236 ret_err = init_card(hc); in hfcmulti_init()
5239 release_card(hc); in hfcmulti_init()
5244 spin_lock_irqsave(&hc->lock, flags); in hfcmulti_init()
5245 enable_hwirq(hc); in hfcmulti_init()
5246 spin_unlock_irqrestore(&hc->lock, flags); in hfcmulti_init()
5250 release_io_hfcmulti(hc); in hfcmulti_init()
5251 if (hc == syncmaster) in hfcmulti_init()
5253 kfree(hc); in hfcmulti_init()