1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
58 	int pin_out = d->hwirq;  in pdc_enable_intr()
85  * GIC does not handle falling edge or active low. To allow falling edge and
87  * falling edge into a rising edge and active low into an active high.
91  * Rising edge sensitive         NOT USED
92  * Falling edge sensitive        LOW
93  * Dual Edge sensitive           NOT USED
94  * Level sensitive active High   HIGH
95  * Falling Edge sensitive        NOT USED
96  * Rising edge sensitive         HIGH
97  * Dual Edge sensitive           HIGH
113  * If @type is edge triggered, forward that as Rising edge as PDC
114  * takes care of converting falling edge to rising edge signal
115  * If @type is level, then forward that as level high as PDC
116  * takes care of converting falling edge to rising edge signal
145 		return -EINVAL;  in qcom_pdc_gic_set_type()
148 	old_pdc_type = pdc_reg_read(IRQ_i_CFG, d->hwirq);  in qcom_pdc_gic_set_type()
149 	pdc_reg_write(IRQ_i_CFG, d->hwirq, pdc_type);  in qcom_pdc_gic_set_type()
196 		if (pin >= region->pin_base &&  in get_parent_hwirq()
197 		    pin < region->pin_base + region->cnt)  in get_parent_hwirq()
198 			return (region->parent_base + pin - region->pin_base);  in get_parent_hwirq()
207 	if (is_of_node(fwspec->fwnode)) {  in qcom_pdc_translate()
208 		if (fwspec->param_count != 2)  in qcom_pdc_translate()
209 			return -EINVAL;  in qcom_pdc_translate()
211 		*hwirq = fwspec->param[0];  in qcom_pdc_translate()
212 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in qcom_pdc_translate()
216 	return -EINVAL;  in qcom_pdc_translate()
239 		return irq_domain_disconnect_hierarchy(domain->parent, virq);  in qcom_pdc_alloc()
247 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_alloc()
286 		return irq_domain_disconnect_hierarchy(domain->parent, virq);  in qcom_pdc_gpio_alloc()
294 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_gpio_alloc()
322 	n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32));  in pdc_setup_pin_mapping()
324 		return -EINVAL;  in pdc_setup_pin_mapping()
330 		return -ENOMEM;  in pdc_setup_pin_mapping()
334 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
339 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
344 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
370 		return -ENXIO;  in qcom_pdc_init()
376 		ret = -ENXIO;  in qcom_pdc_init()
382 		pr_err("%pOF: failed to init PDC pin-hwirq mapping\n", node);  in qcom_pdc_init()
391 		ret = -ENOMEM;  in qcom_pdc_init()
402 		ret = -ENOMEM;  in qcom_pdc_init()