Lines Matching full:62
383 #define IRDMA_CQPSQ_QHASH_MANAGE GENMASK_ULL(62, 61)
388 #define IRDMA_CQPSQ_STATS_ALLOC_INST BIT_ULL(62)
397 #define IRDMA_CQPSQ_WS_ENABLENODE BIT_ULL(62)
410 #define IRDMA_CQPSQ_UP_USEVLAN BIT_ULL(62)
467 #define IRDMA_CQ_SQ BIT_ULL(62)
470 #define IRDMA_CQ_IMMVALID BIT_ULL(62)
492 #define IRDMA_CEQE_CQCTX GENMASK_ULL(62, 0)
505 #define IRDMA_AEQE_Q2DATA GENMASK_ULL(62, 61)
514 #define IRDMA_UDA_QPSQ_SIGCOMPL BIT_ULL(62)
515 #define IRDMA_UDA_QPSQ_MACLEN GENMASK_ULL(62, 56)
562 #define IRDMA_CQPSQ_QP_NEXTIWSTATE GENMASK_ULL(62, 60)
567 #define IRDMA_CQPSQ_CQ_CQCTX GENMASK_ULL(62, 0)
605 #define IRDMA_CQPSQ_MLM_FREEENTRY BIT_ULL(62)
622 #define IRDMA_CQPSQ_MVPBP_INV_PD_ENT BIT_ULL(62)
633 #define IRDMA_CQPSQ_MPP_FREE_PAGE BIT_ULL(62)
641 #define IRDMA_CQPSQ_UCTX_FREEZEQP BIT_ULL(62)
644 #define IRDMA_CQPSQ_MHMC_FREEPMFN BIT_ULL(62)
674 #define IRDMA_CQPSQ_FWQE_FLUSHRQ BIT_ULL(62)
676 #define IRDMA_CQPSQ_MAPT_ADDPORT BIT_ULL(62)
724 #define IRDMAQPC_RDMAP_VER GENMASK_ULL(63, 62)
844 #define IRDMAQPSQ_SIGCOMPL BIT_ULL(62)
849 #define IRDMAQPSQ_FRAG_LEN GENMASK_ULL(62, 32)