1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright 2012-2013 Analog Devices Inc.
77 	for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) {  in adf4350_sync_config()
78 		if ((st->regs_hw[i] != st->regs[i]) ||  in adf4350_sync_config()
87 			st->val  = cpu_to_be32(st->regs[i] | i);  in adf4350_sync_config()
88 			ret = spi_write(st->spi, &st->val, 4);  in adf4350_sync_config()
91 			st->regs_hw[i] = st->regs[i];  in adf4350_sync_config()
92 			dev_dbg(&st->spi->dev, "[%d] 0x%X\n",  in adf4350_sync_config()
93 				i, (u32)st->regs[i] | i);  in adf4350_sync_config()
107 		return -EINVAL;  in adf4350_reg_access()
109 	mutex_lock(&st->lock);  in adf4350_reg_access()
111 		st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2));  in adf4350_reg_access()
114 		*readval =  st->regs_hw[reg];  in adf4350_reg_access()
117 	mutex_unlock(&st->lock);  in adf4350_reg_access()
124 	struct adf4350_platform_data *pdata = st->pdata;  in adf4350_tune_r_cnt()
128 		st->fpfd = (st->clkin * (pdata->ref_doubler_en ? 2 : 1)) /  in adf4350_tune_r_cnt()
129 			   (r_cnt * (pdata->ref_div2_en ? 2 : 1));  in adf4350_tune_r_cnt()
130 	} while (st->fpfd > ADF4350_MAX_FREQ_PFD);  in adf4350_tune_r_cnt()
137 	struct adf4350_platform_data *pdata = st->pdata;  in adf4350_set_freq()
143 	if (freq > ADF4350_MAX_OUT_FREQ || freq < st->min_out_freq)  in adf4350_set_freq()
144 		return -EINVAL;  in adf4350_set_freq()
154 	st->r4_rf_div_sel = 0;  in adf4350_set_freq()
158 		st->r4_rf_div_sel++;  in adf4350_set_freq()
165 	if (pdata->ref_div_factor)  in adf4350_set_freq()
166 		r_cnt = pdata->ref_div_factor - 1;  in adf4350_set_freq()
168 	chspc = st->chspc;  in adf4350_set_freq()
174 				st->r1_mod = st->fpfd / chspc;  in adf4350_set_freq()
180 			} while ((st->r1_mod > ADF4350_MAX_MODULUS) && r_cnt);  in adf4350_set_freq()
183 		tmp = freq * (u64)st->r1_mod + (st->fpfd >> 1);  in adf4350_set_freq()
184 		do_div(tmp, st->fpfd); /* Div round closest (n + d/2)/d */  in adf4350_set_freq()
185 		st->r0_fract = do_div(tmp, st->r1_mod);  in adf4350_set_freq()
186 		st->r0_int = tmp;  in adf4350_set_freq()
187 	} while (mdiv > st->r0_int);  in adf4350_set_freq()
189 	band_sel_div = DIV_ROUND_UP(st->fpfd, ADF4350_MAX_BANDSEL_CLK);  in adf4350_set_freq()
191 	if (st->r0_fract && st->r1_mod) {  in adf4350_set_freq()
192 		div_gcd = gcd(st->r1_mod, st->r0_fract);  in adf4350_set_freq()
193 		st->r1_mod /= div_gcd;  in adf4350_set_freq()
194 		st->r0_fract /= div_gcd;  in adf4350_set_freq()
196 		st->r0_fract = 0;  in adf4350_set_freq()
197 		st->r1_mod = 1;  in adf4350_set_freq()
200 	dev_dbg(&st->spi->dev, "VCO: %llu Hz, PFD %lu Hz\n"  in adf4350_set_freq()
203 		freq, st->fpfd, r_cnt, st->r0_int, st->r0_fract, st->r1_mod,  in adf4350_set_freq()
204 		1 << st->r4_rf_div_sel, prescaler ? "8/9" : "4/5",  in adf4350_set_freq()
207 	st->regs[ADF4350_REG0] = ADF4350_REG0_INT(st->r0_int) |  in adf4350_set_freq()
208 				 ADF4350_REG0_FRACT(st->r0_fract);  in adf4350_set_freq()
210 	st->regs[ADF4350_REG1] = ADF4350_REG1_PHASE(1) |  in adf4350_set_freq()
211 				 ADF4350_REG1_MOD(st->r1_mod) |  in adf4350_set_freq()
214 	st->regs[ADF4350_REG2] =  in adf4350_set_freq()
217 		(pdata->ref_doubler_en ? ADF4350_REG2_RMULT2_EN : 0) |  in adf4350_set_freq()
218 		(pdata->ref_div2_en ? ADF4350_REG2_RDIV2_EN : 0) |  in adf4350_set_freq()
219 		(pdata->r2_user_settings & (ADF4350_REG2_PD_POLARITY_POS |  in adf4350_set_freq()
224 	st->regs[ADF4350_REG3] = pdata->r3_user_settings &  in adf4350_set_freq()
232 	st->regs[ADF4350_REG4] =  in adf4350_set_freq()
234 		ADF4350_REG4_RF_DIV_SEL(st->r4_rf_div_sel) |  in adf4350_set_freq()
237 		(pdata->r4_user_settings &  in adf4350_set_freq()
244 	st->regs[ADF4350_REG5] = ADF4350_REG5_LD_PIN_MODE_DIGITAL;  in adf4350_set_freq()
245 	st->freq_req = freq;  in adf4350_set_freq()
264 	mutex_lock(&st->lock);  in adf4350_write()
271 			ret = -EINVAL;  in adf4350_write()
275 		if (st->clk) {  in adf4350_write()
276 			tmp = clk_round_rate(st->clk, readin);  in adf4350_write()
278 				ret = -EINVAL;  in adf4350_write()
281 			ret = clk_set_rate(st->clk, tmp);  in adf4350_write()
285 		st->clkin = readin;  in adf4350_write()
286 		ret = adf4350_set_freq(st, st->freq_req);  in adf4350_write()
290 			ret = -EINVAL;  in adf4350_write()
292 			st->chspc = readin;  in adf4350_write()
296 			st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN;  in adf4350_write()
298 			st->regs[ADF4350_REG2] &= ~ADF4350_REG2_POWER_DOWN_EN;  in adf4350_write()
303 		ret = -EINVAL;  in adf4350_write()
305 	mutex_unlock(&st->lock);  in adf4350_write()
319 	mutex_lock(&st->lock);  in adf4350_read()
322 		val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) *  in adf4350_read()
323 			(u64)st->fpfd;  in adf4350_read()
324 		do_div(val, st->r1_mod * (1 << st->r4_rf_div_sel));  in adf4350_read()
326 		if (st->lock_detect_gpiod)  in adf4350_read()
327 			if (!gpiod_get_value(st->lock_detect_gpiod)) {  in adf4350_read()
328 				dev_dbg(&st->spi->dev, "PLL un-locked\n");  in adf4350_read()
329 				ret = -EBUSY;  in adf4350_read()
333 		if (st->clk)  in adf4350_read()
334 			st->clkin = clk_get_rate(st->clk);  in adf4350_read()
336 		val = st->clkin;  in adf4350_read()
339 		val = st->chspc;  in adf4350_read()
342 		val = !!(st->regs[ADF4350_REG2] & ADF4350_REG2_POWER_DOWN_EN);  in adf4350_read()
345 		ret = -EINVAL;  in adf4350_read()
348 	mutex_unlock(&st->lock);  in adf4350_read()
364 	 * in Hz. Using scale is a bit ugly.
387 	struct device_node *np = dev->of_node;  in adf4350_parse_dt()
395 	snprintf(&pdata->name[0], SPI_NAME_SIZE - 1, "%pOFn", np);  in adf4350_parse_dt()
398 	of_property_read_u32(np, "adi,channel-spacing", &tmp);  in adf4350_parse_dt()
399 	pdata->channel_spacing = tmp;  in adf4350_parse_dt()
402 	of_property_read_u32(np, "adi,power-up-frequency", &tmp);  in adf4350_parse_dt()
403 	pdata->power_up_frequency = tmp;  in adf4350_parse_dt()
406 	of_property_read_u32(np, "adi,reference-div-factor", &tmp);  in adf4350_parse_dt()
407 	pdata->ref_div_factor = tmp;  in adf4350_parse_dt()
409 	pdata->ref_doubler_en = of_property_read_bool(np,  in adf4350_parse_dt()
410 			"adi,reference-doubler-enable");  in adf4350_parse_dt()
411 	pdata->ref_div2_en = of_property_read_bool(np,  in adf4350_parse_dt()
412 			"adi,reference-div2-enable");  in adf4350_parse_dt()
415 	pdata->r2_user_settings = of_property_read_bool(np,  in adf4350_parse_dt()
416 			"adi,phase-detector-polarity-positive-enable") ?  in adf4350_parse_dt()
418 	pdata->r2_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
419 			"adi,lock-detect-precision-6ns-enable") ?  in adf4350_parse_dt()
421 	pdata->r2_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
422 			"adi,lock-detect-function-integer-n-enable") ?  in adf4350_parse_dt()
426 	of_property_read_u32(np, "adi,charge-pump-current", &tmp);  in adf4350_parse_dt()
427 	pdata->r2_user_settings |= ADF4350_REG2_CHARGE_PUMP_CURR_uA(tmp);  in adf4350_parse_dt()
430 	of_property_read_u32(np, "adi,muxout-select", &tmp);  in adf4350_parse_dt()
431 	pdata->r2_user_settings |= ADF4350_REG2_MUXOUT(tmp);  in adf4350_parse_dt()
433 	pdata->r2_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
434 			"adi,low-spur-mode-enable") ?  in adf4350_parse_dt()
439 	pdata->r3_user_settings = of_property_read_bool(np,  in adf4350_parse_dt()
440 			"adi,cycle-slip-reduction-enable") ?  in adf4350_parse_dt()
442 	pdata->r3_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
443 			"adi,charge-cancellation-enable") ?  in adf4350_parse_dt()
446 	pdata->r3_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
447 			"adi,anti-backlash-3ns-enable") ?  in adf4350_parse_dt()
449 	pdata->r3_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
450 			"adi,band-select-clock-mode-high-enable") ?  in adf4350_parse_dt()
454 	of_property_read_u32(np, "adi,12bit-clk-divider", &tmp);  in adf4350_parse_dt()
455 	pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV(tmp);  in adf4350_parse_dt()
458 	of_property_read_u32(np, "adi,clk-divider-mode", &tmp);  in adf4350_parse_dt()
459 	pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV_MODE(tmp);  in adf4350_parse_dt()
463 	pdata->r4_user_settings = of_property_read_bool(np,  in adf4350_parse_dt()
464 			"adi,aux-output-enable") ?  in adf4350_parse_dt()
466 	pdata->r4_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
467 			"adi,aux-output-fundamental-enable") ?  in adf4350_parse_dt()
469 	pdata->r4_user_settings |= of_property_read_bool(np,  in adf4350_parse_dt()
470 			"adi,mute-till-lock-enable") ?  in adf4350_parse_dt()
474 	of_property_read_u32(np, "adi,output-power", &tmp);  in adf4350_parse_dt()
475 	pdata->r4_user_settings |= ADF4350_REG4_OUTPUT_PWR(tmp);  in adf4350_parse_dt()
478 	of_property_read_u32(np, "adi,aux-output-power", &tmp);  in adf4350_parse_dt()
479 	pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_PWR(tmp);  in adf4350_parse_dt()
499 	if (spi->dev.of_node) {  in adf4350_probe()
500 		pdata = adf4350_parse_dt(&spi->dev);  in adf4350_probe()
502 			return -EINVAL;  in adf4350_probe()
504 		pdata = spi->dev.platform_data;  in adf4350_probe()
508 		dev_warn(&spi->dev, "no platform data? using default\n");  in adf4350_probe()
512 	if (!pdata->clkin) {  in adf4350_probe()
513 		clk = devm_clk_get(&spi->dev, "clkin");  in adf4350_probe()
515 			return -EPROBE_DEFER;  in adf4350_probe()
522 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));  in adf4350_probe()
524 		ret =  -ENOMEM;  in adf4350_probe()
530 	st->reg = devm_regulator_get(&spi->dev, "vcc");  in adf4350_probe()
531 	if (!IS_ERR(st->reg)) {  in adf4350_probe()
532 		ret = regulator_enable(st->reg);  in adf4350_probe()
538 	st->spi = spi;  in adf4350_probe()
539 	st->pdata = pdata;  in adf4350_probe()
541 	indio_dev->name = (pdata->name[0] != 0) ? pdata->name :  in adf4350_probe()
542 		spi_get_device_id(spi)->name;  in adf4350_probe()
544 	indio_dev->info = &adf4350_info;  in adf4350_probe()
545 	indio_dev->modes = INDIO_DIRECT_MODE;  in adf4350_probe()
546 	indio_dev->channels = &adf4350_chan;  in adf4350_probe()
547 	indio_dev->num_channels = 1;  in adf4350_probe()
549 	mutex_init(&st->lock);  in adf4350_probe()
551 	st->chspc = pdata->channel_spacing;  in adf4350_probe()
553 		st->clk = clk;  in adf4350_probe()
554 		st->clkin = clk_get_rate(clk);  in adf4350_probe()
556 		st->clkin = pdata->clkin;  in adf4350_probe()
559 	st->min_out_freq = spi_get_device_id(spi)->driver_data == 4351 ?  in adf4350_probe()
562 	memset(st->regs_hw, 0xFF, sizeof(st->regs_hw));  in adf4350_probe()
564 	st->lock_detect_gpiod = devm_gpiod_get_optional(&spi->dev, NULL,  in adf4350_probe()
566 	if (IS_ERR(st->lock_detect_gpiod)) {  in adf4350_probe()
567 		ret = PTR_ERR(st->lock_detect_gpiod);  in adf4350_probe()
571 	if (pdata->power_up_frequency) {  in adf4350_probe()
572 		ret = adf4350_set_freq(st, pdata->power_up_frequency);  in adf4350_probe()
584 	if (!IS_ERR(st->reg))  in adf4350_probe()
585 		regulator_disable(st->reg);  in adf4350_probe()
596 	struct regulator *reg = st->reg;  in adf4350_remove()
598 	st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN;  in adf4350_remove()
603 	clk_disable_unprepare(st->clk);  in adf4350_remove()