Lines Matching +full:vdd +full:- +full:s
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
25 #include "stm32-adc-core.h"
41 * struct stm32_adc_common_regs - stm32 common registers
61 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
77 * struct stm32_adc_priv - stm32 ADC core private data
78 * @irq: irq(s) for ADC block
84 * @vdd: vdd supply reference
87 * @vdd_uv: vdd supply voltage (microvolts)
101 struct regulator *vdd; member
121 * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
134 if (!priv->aclk) { in stm32f4_adc_clk_sel()
135 dev_err(&pdev->dev, "No 'adc' clock found\n"); in stm32f4_adc_clk_sel()
136 return -ENOENT; in stm32f4_adc_clk_sel()
139 rate = clk_get_rate(priv->aclk); in stm32f4_adc_clk_sel()
141 dev_err(&pdev->dev, "Invalid clock rate: 0\n"); in stm32f4_adc_clk_sel()
142 return -EINVAL; in stm32f4_adc_clk_sel()
146 if ((rate / stm32f4_pclk_div[i]) <= priv->max_clk_rate) in stm32f4_adc_clk_sel()
150 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32f4_adc_clk_sel()
151 return -EINVAL; in stm32f4_adc_clk_sel()
154 priv->common.rate = rate / stm32f4_pclk_div[i]; in stm32f4_adc_clk_sel()
155 val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
158 writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
160 dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n", in stm32f4_adc_clk_sel()
161 priv->common.rate / 1000); in stm32f4_adc_clk_sel()
167 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
206 if (!priv->bclk) { in stm32h7_adc_clk_sel()
207 dev_err(&pdev->dev, "No 'bus' clock found\n"); in stm32h7_adc_clk_sel()
208 return -ENOENT; in stm32h7_adc_clk_sel()
216 if (priv->aclk) { in stm32h7_adc_clk_sel()
221 rate = clk_get_rate(priv->aclk); in stm32h7_adc_clk_sel()
223 dev_err(&pdev->dev, "Invalid adc clock rate: 0\n"); in stm32h7_adc_clk_sel()
224 return -EINVAL; in stm32h7_adc_clk_sel()
228 duty = clk_get_scaled_duty_cycle(priv->aclk, 100); in stm32h7_adc_clk_sel()
230 dev_warn(&pdev->dev, "adc clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
247 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
253 rate = clk_get_rate(priv->bclk); in stm32h7_adc_clk_sel()
255 dev_err(&pdev->dev, "Invalid bus clock rate: 0\n"); in stm32h7_adc_clk_sel()
256 return -EINVAL; in stm32h7_adc_clk_sel()
259 duty = clk_get_scaled_duty_cycle(priv->bclk, 100); in stm32h7_adc_clk_sel()
261 dev_warn(&pdev->dev, "bus clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
274 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
278 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32h7_adc_clk_sel()
279 return -EINVAL; in stm32h7_adc_clk_sel()
283 priv->common.rate = rate / div; in stm32h7_adc_clk_sel()
286 val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
290 writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
292 dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n", in stm32h7_adc_clk_sel()
293 ckmode ? "bus" : "adc", div, priv->common.rate / 1000); in stm32h7_adc_clk_sel()
327 ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier); in stm32_adc_eoc_enabled()
329 return ier & priv->cfg->regs->eocie_msk; in stm32_adc_eoc_enabled()
341 status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); in stm32_adc_irq_handler()
347 * - an ADC configured to use DMA (EOC triggers the DMA request, and in stm32_adc_irq_handler()
349 * - an ADC configured to use IRQs (EOCIE bit is set. The handler must in stm32_adc_irq_handler()
353 * IRQ-enabled ADCs). in stm32_adc_irq_handler()
355 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_handler()
356 if ((status & priv->cfg->regs->eoc_msk[i] && in stm32_adc_irq_handler()
358 (status & priv->cfg->regs->ovr_msk[i])) in stm32_adc_irq_handler()
359 generic_handle_irq(irq_find_mapping(priv->domain, i)); in stm32_adc_irq_handler()
368 irq_set_chip_data(irq, d->host_data); in stm32_adc_domain_map()
389 struct device_node *np = pdev->dev.of_node; in stm32_adc_irq_probe()
393 * Interrupt(s) must be provided, depending on the compatible: in stm32_adc_irq_probe()
394 * - stm32f4/h7 shares a common interrupt line. in stm32_adc_irq_probe()
395 * - stm32mp1, has one line per ADC in stm32_adc_irq_probe()
397 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
398 priv->irq[i] = platform_get_irq(pdev, i); in stm32_adc_irq_probe()
399 if (priv->irq[i] < 0) in stm32_adc_irq_probe()
400 return priv->irq[i]; in stm32_adc_irq_probe()
403 priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0, in stm32_adc_irq_probe()
406 if (!priv->domain) { in stm32_adc_irq_probe()
407 dev_err(&pdev->dev, "Failed to add irq domain\n"); in stm32_adc_irq_probe()
408 return -ENOMEM; in stm32_adc_irq_probe()
411 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
412 irq_set_chained_handler(priv->irq[i], stm32_adc_irq_handler); in stm32_adc_irq_probe()
413 irq_set_handler_data(priv->irq[i], priv); in stm32_adc_irq_probe()
426 irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq)); in stm32_adc_irq_remove()
427 irq_domain_remove(priv->domain); in stm32_adc_irq_remove()
429 for (i = 0; i < priv->cfg->num_irqs; i++) in stm32_adc_irq_remove()
430 irq_set_chained_handler(priv->irq[i], NULL); in stm32_adc_irq_remove()
442 * - Voltage booster can be used, to get full ADC performances in stm32_adc_core_switches_supply_en()
444 * - Vdd can be used to supply them, if above 2.7V (STM32MP1 only). in stm32_adc_core_switches_supply_en()
447 * - vdda < 2.7V but vdd > 2.7V: ANASWVDD = 1, EN_BOOSTER = 0 (stm32mp1) in stm32_adc_core_switches_supply_en()
448 * - vdda < 2.7V and vdd < 2.7V: ANASWVDD = 0, EN_BOOSTER = 1 in stm32_adc_core_switches_supply_en()
449 * - vdda >= 2.7V: ANASWVDD = 0, EN_BOOSTER = 0 (default) in stm32_adc_core_switches_supply_en()
451 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_en()
452 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
453 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_supply_en()
455 dev_err(dev, "vdd enable failed %d\n", ret); in stm32_adc_core_switches_supply_en()
459 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
463 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_en()
464 dev_err(dev, "vdd select failed, %d\n", ret); in stm32_adc_core_switches_supply_en()
467 dev_dbg(dev, "analog switches supplied by vdd\n"); in stm32_adc_core_switches_supply_en()
472 if (priv->booster) { in stm32_adc_core_switches_supply_en()
474 * This is optional, as this is a trade-off between in stm32_adc_core_switches_supply_en()
477 ret = regulator_enable(priv->booster); in stm32_adc_core_switches_supply_en()
490 priv->vdda_uv); in stm32_adc_core_switches_supply_en()
497 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_dis()
498 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
499 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
501 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_dis()
504 if (priv->booster) in stm32_adc_core_switches_supply_dis()
505 regulator_disable(priv->booster); in stm32_adc_core_switches_supply_dis()
515 ret = regulator_enable(priv->vdda); in stm32_adc_core_hw_start()
521 ret = regulator_get_voltage(priv->vdda); in stm32_adc_core_hw_start()
526 priv->vdda_uv = ret; in stm32_adc_core_hw_start()
532 ret = regulator_enable(priv->vref); in stm32_adc_core_hw_start()
538 ret = clk_prepare_enable(priv->bclk); in stm32_adc_core_hw_start()
544 ret = clk_prepare_enable(priv->aclk); in stm32_adc_core_hw_start()
550 writel_relaxed(priv->ccr_bak, priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_start()
555 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_start()
557 regulator_disable(priv->vref); in stm32_adc_core_hw_start()
561 regulator_disable(priv->vdda); in stm32_adc_core_hw_start()
572 priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_stop()
573 clk_disable_unprepare(priv->aclk); in stm32_adc_core_hw_stop()
574 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_stop()
575 regulator_disable(priv->vref); in stm32_adc_core_hw_stop()
577 regulator_disable(priv->vdda); in stm32_adc_core_hw_stop()
583 struct device_node *np = dev->of_node; in stm32_adc_core_switches_probe()
587 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
588 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
589 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
590 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
593 priv->syscfg = NULL; in stm32_adc_core_switches_probe()
597 if (priv->cfg->has_syscfg & HAS_VBOOSTER && in stm32_adc_core_switches_probe()
598 of_property_read_bool(np, "booster-supply")) { in stm32_adc_core_switches_probe()
599 priv->booster = devm_regulator_get_optional(dev, "booster"); in stm32_adc_core_switches_probe()
600 if (IS_ERR(priv->booster)) { in stm32_adc_core_switches_probe()
601 ret = PTR_ERR(priv->booster); in stm32_adc_core_switches_probe()
602 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
605 priv->booster = NULL; in stm32_adc_core_switches_probe()
609 /* Vdd can be used to supply analog switches (optional) */ in stm32_adc_core_switches_probe()
610 if (priv->cfg->has_syscfg & HAS_ANASWVDD && in stm32_adc_core_switches_probe()
611 of_property_read_bool(np, "vdd-supply")) { in stm32_adc_core_switches_probe()
612 priv->vdd = devm_regulator_get_optional(dev, "vdd"); in stm32_adc_core_switches_probe()
613 if (IS_ERR(priv->vdd)) { in stm32_adc_core_switches_probe()
614 ret = PTR_ERR(priv->vdd); in stm32_adc_core_switches_probe()
615 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
616 return dev_err_probe(dev, ret, "can't get vdd\n"); in stm32_adc_core_switches_probe()
618 priv->vdd = NULL; in stm32_adc_core_switches_probe()
622 if (priv->vdd) { in stm32_adc_core_switches_probe()
623 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_probe()
625 dev_err(dev, "vdd enable failed %d\n", ret); in stm32_adc_core_switches_probe()
629 ret = regulator_get_voltage(priv->vdd); in stm32_adc_core_switches_probe()
631 dev_err(dev, "vdd get voltage failed %d\n", ret); in stm32_adc_core_switches_probe()
632 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
635 priv->vdd_uv = ret; in stm32_adc_core_switches_probe()
637 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
646 struct device *dev = &pdev->dev; in stm32_adc_probe()
647 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe()
652 if (!pdev->dev.of_node) in stm32_adc_probe()
653 return -ENODEV; in stm32_adc_probe()
655 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in stm32_adc_probe()
657 return -ENOMEM; in stm32_adc_probe()
658 platform_set_drvdata(pdev, &priv->common); in stm32_adc_probe()
660 priv->cfg = (const struct stm32_adc_priv_cfg *) in stm32_adc_probe()
661 of_match_device(dev->driver->of_match_table, dev)->data; in stm32_adc_probe()
664 priv->common.base = devm_ioremap_resource(&pdev->dev, res); in stm32_adc_probe()
665 if (IS_ERR(priv->common.base)) in stm32_adc_probe()
666 return PTR_ERR(priv->common.base); in stm32_adc_probe()
667 priv->common.phys_base = res->start; in stm32_adc_probe()
669 priv->vdda = devm_regulator_get(&pdev->dev, "vdda"); in stm32_adc_probe()
670 if (IS_ERR(priv->vdda)) in stm32_adc_probe()
671 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vdda), in stm32_adc_probe()
674 priv->vref = devm_regulator_get(&pdev->dev, "vref"); in stm32_adc_probe()
675 if (IS_ERR(priv->vref)) in stm32_adc_probe()
676 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vref), in stm32_adc_probe()
679 priv->aclk = devm_clk_get_optional(&pdev->dev, "adc"); in stm32_adc_probe()
680 if (IS_ERR(priv->aclk)) in stm32_adc_probe()
681 return dev_err_probe(&pdev->dev, PTR_ERR(priv->aclk), in stm32_adc_probe()
684 priv->bclk = devm_clk_get_optional(&pdev->dev, "bus"); in stm32_adc_probe()
685 if (IS_ERR(priv->bclk)) in stm32_adc_probe()
686 return dev_err_probe(&pdev->dev, PTR_ERR(priv->bclk), in stm32_adc_probe()
703 ret = regulator_get_voltage(priv->vref); in stm32_adc_probe()
705 dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret); in stm32_adc_probe()
708 priv->common.vref_mv = ret / 1000; in stm32_adc_probe()
709 dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv); in stm32_adc_probe()
711 ret = of_property_read_u32(pdev->dev.of_node, "st,max-clk-rate-hz", in stm32_adc_probe()
714 priv->max_clk_rate = min(max_rate, priv->cfg->max_clk_rate_hz); in stm32_adc_probe()
716 priv->max_clk_rate = priv->cfg->max_clk_rate_hz; in stm32_adc_probe()
718 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
726 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in stm32_adc_probe()
728 dev_err(&pdev->dev, "failed to populate DT children\n"); in stm32_adc_probe()
754 pm_runtime_get_sync(&pdev->dev); in stm32_adc_remove()
755 of_platform_depopulate(&pdev->dev); in stm32_adc_remove()
757 stm32_adc_core_hw_stop(&pdev->dev); in stm32_adc_remove()
758 pm_runtime_disable(&pdev->dev); in stm32_adc_remove()
759 pm_runtime_set_suspended(&pdev->dev); in stm32_adc_remove()
760 pm_runtime_put_noidle(&pdev->dev); in stm32_adc_remove()
819 .compatible = "st,stm32f4-adc-core",
822 .compatible = "st,stm32h7-adc-core",
825 .compatible = "st,stm32mp1-adc-core",
836 .name = "stm32-adc-core",
846 MODULE_ALIAS("platform:stm32-adc-core");