Lines Matching +full:saradc +full:- +full:apb
1 // SPDX-License-Identifier: GPL-2.0-or-later
63 writel_relaxed(0, info->regs + SARADC_CTRL); in rockchip_saradc_power_down()
69 reinit_completion(&info->completion); in rockchip_saradc_conversion()
72 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); in rockchip_saradc_conversion()
74 info->last_chan = chan; in rockchip_saradc_conversion()
78 | (chan->channel & SARADC_CTRL_CHN_MASK) in rockchip_saradc_conversion()
80 info->regs + SARADC_CTRL); in rockchip_saradc_conversion()
82 if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) in rockchip_saradc_conversion()
83 return -ETIMEDOUT; in rockchip_saradc_conversion()
97 mutex_lock(&indio_dev->mlock); in rockchip_saradc_read_raw()
102 mutex_unlock(&indio_dev->mlock); in rockchip_saradc_read_raw()
106 *val = info->last_val; in rockchip_saradc_read_raw()
107 mutex_unlock(&indio_dev->mlock); in rockchip_saradc_read_raw()
110 *val = info->uv_vref / 1000; in rockchip_saradc_read_raw()
111 *val2 = chan->scan_type.realbits; in rockchip_saradc_read_raw()
114 return -EINVAL; in rockchip_saradc_read_raw()
123 info->last_val = readl_relaxed(info->regs + SARADC_DATA); in rockchip_saradc_isr()
124 info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0); in rockchip_saradc_isr()
128 complete(&info->completion); in rockchip_saradc_isr()
210 .compatible = "rockchip,saradc",
213 .compatible = "rockchip,rk3066-tsadc",
216 .compatible = "rockchip,rk3399-saradc",
219 .compatible = "rockchip,rk3568-saradc",
227 * Reset SARADC Controller.
240 clk_disable_unprepare(info->clk); in rockchip_saradc_clk_disable()
247 clk_disable_unprepare(info->pclk); in rockchip_saradc_pclk_disable()
254 regulator_disable(info->vref); in rockchip_saradc_regulator_disable()
260 struct iio_dev *i_dev = pf->indio_dev; in rockchip_saradc_trigger_handler()
264 * @timestamp: will be 8-byte aligned automatically in rockchip_saradc_trigger_handler()
273 mutex_lock(&i_dev->mlock); in rockchip_saradc_trigger_handler()
275 for_each_set_bit(i, i_dev->active_scan_mask, i_dev->masklength) { in rockchip_saradc_trigger_handler()
276 const struct iio_chan_spec *chan = &i_dev->channels[i]; in rockchip_saradc_trigger_handler()
284 data.values[j] = info->last_val; in rockchip_saradc_trigger_handler()
290 mutex_unlock(&i_dev->mlock); in rockchip_saradc_trigger_handler()
292 iio_trigger_notify_done(i_dev->trig); in rockchip_saradc_trigger_handler()
305 info->uv_vref = (unsigned long)data; in rockchip_saradc_volt_notify()
314 regulator_unregister_notifier(info->vref, &info->nb); in rockchip_saradc_regulator_unreg_notifier()
320 struct device_node *np = pdev->dev.of_node; in rockchip_saradc_probe()
328 return -ENODEV; in rockchip_saradc_probe()
330 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); in rockchip_saradc_probe()
332 dev_err(&pdev->dev, "failed allocating iio device\n"); in rockchip_saradc_probe()
333 return -ENOMEM; in rockchip_saradc_probe()
337 match = of_match_device(rockchip_saradc_match, &pdev->dev); in rockchip_saradc_probe()
339 dev_err(&pdev->dev, "failed to match device\n"); in rockchip_saradc_probe()
340 return -ENODEV; in rockchip_saradc_probe()
343 info->data = match->data; in rockchip_saradc_probe()
346 if (info->data->num_channels > SARADC_MAX_CHANNELS) { in rockchip_saradc_probe()
347 dev_err(&pdev->dev, "max channels exceeded"); in rockchip_saradc_probe()
348 return -EINVAL; in rockchip_saradc_probe()
352 info->regs = devm_ioremap_resource(&pdev->dev, mem); in rockchip_saradc_probe()
353 if (IS_ERR(info->regs)) in rockchip_saradc_probe()
354 return PTR_ERR(info->regs); in rockchip_saradc_probe()
360 info->reset = devm_reset_control_get_exclusive(&pdev->dev, in rockchip_saradc_probe()
361 "saradc-apb"); in rockchip_saradc_probe()
362 if (IS_ERR(info->reset)) { in rockchip_saradc_probe()
363 ret = PTR_ERR(info->reset); in rockchip_saradc_probe()
364 if (ret != -ENOENT) in rockchip_saradc_probe()
367 dev_dbg(&pdev->dev, "no reset control found\n"); in rockchip_saradc_probe()
368 info->reset = NULL; in rockchip_saradc_probe()
371 init_completion(&info->completion); in rockchip_saradc_probe()
377 ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr, in rockchip_saradc_probe()
378 0, dev_name(&pdev->dev), info); in rockchip_saradc_probe()
380 dev_err(&pdev->dev, "failed requesting irq %d\n", irq); in rockchip_saradc_probe()
384 info->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); in rockchip_saradc_probe()
385 if (IS_ERR(info->pclk)) { in rockchip_saradc_probe()
386 dev_err(&pdev->dev, "failed to get pclk\n"); in rockchip_saradc_probe()
387 return PTR_ERR(info->pclk); in rockchip_saradc_probe()
390 info->clk = devm_clk_get(&pdev->dev, "saradc"); in rockchip_saradc_probe()
391 if (IS_ERR(info->clk)) { in rockchip_saradc_probe()
392 dev_err(&pdev->dev, "failed to get adc clock\n"); in rockchip_saradc_probe()
393 return PTR_ERR(info->clk); in rockchip_saradc_probe()
396 info->vref = devm_regulator_get(&pdev->dev, "vref"); in rockchip_saradc_probe()
397 if (IS_ERR(info->vref)) { in rockchip_saradc_probe()
398 dev_err(&pdev->dev, "failed to get regulator, %ld\n", in rockchip_saradc_probe()
399 PTR_ERR(info->vref)); in rockchip_saradc_probe()
400 return PTR_ERR(info->vref); in rockchip_saradc_probe()
403 if (info->reset) in rockchip_saradc_probe()
404 rockchip_saradc_reset_controller(info->reset); in rockchip_saradc_probe()
408 * This may become user-configurable in the future. in rockchip_saradc_probe()
410 ret = clk_set_rate(info->clk, info->data->clk_rate); in rockchip_saradc_probe()
412 dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret); in rockchip_saradc_probe()
416 ret = regulator_enable(info->vref); in rockchip_saradc_probe()
418 dev_err(&pdev->dev, "failed to enable vref regulator\n"); in rockchip_saradc_probe()
421 ret = devm_add_action_or_reset(&pdev->dev, in rockchip_saradc_probe()
424 dev_err(&pdev->dev, "failed to register devm action, %d\n", in rockchip_saradc_probe()
429 ret = regulator_get_voltage(info->vref); in rockchip_saradc_probe()
433 info->uv_vref = ret; in rockchip_saradc_probe()
435 ret = clk_prepare_enable(info->pclk); in rockchip_saradc_probe()
437 dev_err(&pdev->dev, "failed to enable pclk\n"); in rockchip_saradc_probe()
440 ret = devm_add_action_or_reset(&pdev->dev, in rockchip_saradc_probe()
443 dev_err(&pdev->dev, "failed to register devm action, %d\n", in rockchip_saradc_probe()
448 ret = clk_prepare_enable(info->clk); in rockchip_saradc_probe()
450 dev_err(&pdev->dev, "failed to enable converter clock\n"); in rockchip_saradc_probe()
453 ret = devm_add_action_or_reset(&pdev->dev, in rockchip_saradc_probe()
456 dev_err(&pdev->dev, "failed to register devm action, %d\n", in rockchip_saradc_probe()
463 indio_dev->name = dev_name(&pdev->dev); in rockchip_saradc_probe()
464 indio_dev->info = &rockchip_saradc_iio_info; in rockchip_saradc_probe()
465 indio_dev->modes = INDIO_DIRECT_MODE; in rockchip_saradc_probe()
467 indio_dev->channels = info->data->channels; in rockchip_saradc_probe()
468 indio_dev->num_channels = info->data->num_channels; in rockchip_saradc_probe()
469 ret = devm_iio_triggered_buffer_setup(&indio_dev->dev, indio_dev, NULL, in rockchip_saradc_probe()
475 info->nb.notifier_call = rockchip_saradc_volt_notify; in rockchip_saradc_probe()
476 ret = regulator_register_notifier(info->vref, &info->nb); in rockchip_saradc_probe()
480 ret = devm_add_action_or_reset(&pdev->dev, in rockchip_saradc_probe()
486 return devm_iio_device_register(&pdev->dev, indio_dev); in rockchip_saradc_probe()
495 clk_disable_unprepare(info->clk); in rockchip_saradc_suspend()
496 clk_disable_unprepare(info->pclk); in rockchip_saradc_suspend()
497 regulator_disable(info->vref); in rockchip_saradc_suspend()
508 ret = regulator_enable(info->vref); in rockchip_saradc_resume()
512 ret = clk_prepare_enable(info->pclk); in rockchip_saradc_resume()
516 ret = clk_prepare_enable(info->clk); in rockchip_saradc_resume()
518 clk_disable_unprepare(info->pclk); in rockchip_saradc_resume()
530 .name = "rockchip-saradc",
539 MODULE_DESCRIPTION("Rockchip SARADC driver");