Lines Matching refs:i2c_dev
297 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, in dvc_writel() argument
300 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
303 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in dvc_readl() argument
305 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
312 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in tegra_i2c_reg_addr() argument
314 if (i2c_dev->is_dvc) in tegra_i2c_reg_addr()
316 else if (i2c_dev->is_vi) in tegra_i2c_reg_addr()
322 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg) in i2c_writel() argument
324 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
328 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
329 else if (i2c_dev->is_vi) in i2c_writel()
330 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS)); in i2c_writel()
333 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in i2c_readl() argument
335 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
338 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl() argument
341 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
344 static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl_vi() argument
356 i2c_writel(i2c_dev, *data32++, reg); in i2c_writesl_vi()
359 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_readsl() argument
362 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
365 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_mask_irq() argument
369 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
370 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
373 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_unmask_irq() argument
377 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
378 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
383 struct tegra_i2c_dev *i2c_dev = args; in tegra_i2c_dma_complete() local
385 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
388 static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) in tegra_i2c_dma_submit() argument
394 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
396 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
398 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
399 chan = i2c_dev->msg_read ? i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan; in tegra_i2c_dma_submit()
401 dma_desc = dmaengine_prep_slave_single(chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
405 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
406 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
411 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
419 static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_dma() argument
421 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
422 dma_free_coherent(i2c_dev->dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
423 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
424 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
427 if (i2c_dev->tx_dma_chan) { in tegra_i2c_release_dma()
428 dma_release_channel(i2c_dev->tx_dma_chan); in tegra_i2c_release_dma()
429 i2c_dev->tx_dma_chan = NULL; in tegra_i2c_release_dma()
432 if (i2c_dev->rx_dma_chan) { in tegra_i2c_release_dma()
433 dma_release_channel(i2c_dev->rx_dma_chan); in tegra_i2c_release_dma()
434 i2c_dev->rx_dma_chan = NULL; in tegra_i2c_release_dma()
438 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_dma() argument
445 if (!i2c_dev->hw->has_apb_dma || i2c_dev->is_vi) in tegra_i2c_init_dma()
449 dev_dbg(i2c_dev->dev, "DMA support not enabled\n"); in tegra_i2c_init_dma()
453 chan = dma_request_chan(i2c_dev->dev, "rx"); in tegra_i2c_init_dma()
459 i2c_dev->rx_dma_chan = chan; in tegra_i2c_init_dma()
461 chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
467 i2c_dev->tx_dma_chan = chan; in tegra_i2c_init_dma()
469 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
472 dma_buf = dma_alloc_coherent(i2c_dev->dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
475 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
480 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
481 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
486 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_init_dma()
488 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
489 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
503 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev) in tegra_dvc_init() argument
507 val = dvc_readl(i2c_dev, DVC_CTRL_REG3); in tegra_dvc_init()
510 dvc_writel(i2c_dev, val, DVC_CTRL_REG3); in tegra_dvc_init()
512 val = dvc_readl(i2c_dev, DVC_CTRL_REG1); in tegra_dvc_init()
514 dvc_writel(i2c_dev, val, DVC_CTRL_REG1); in tegra_dvc_init()
517 static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_vi_init() argument
523 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
529 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
533 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
538 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
541 i2c_writel(i2c_dev, value, I2C_BUS_CLEAR_CNFG); in tegra_i2c_vi_init()
543 i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT); in tegra_i2c_vi_init()
546 static int tegra_i2c_poll_register(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_register() argument
550 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
553 if (!i2c_dev->atomic_mode) in tegra_i2c_poll_register()
561 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_flush_fifos() argument
566 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
576 val = i2c_readl(i2c_dev, offset); in tegra_i2c_flush_fifos()
578 i2c_writel(i2c_dev, val, offset); in tegra_i2c_flush_fifos()
580 err = tegra_i2c_poll_register(i2c_dev, offset, mask, 1000, 1000000); in tegra_i2c_flush_fifos()
582 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
589 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_wait_for_config_load() argument
593 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
596 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); in tegra_i2c_wait_for_config_load()
598 err = tegra_i2c_poll_register(i2c_dev, I2C_CONFIG_LOAD, 0xffffffff, in tegra_i2c_wait_for_config_load()
601 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
608 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init() argument
621 err = reset_control_reset(i2c_dev->rst); in tegra_i2c_init()
624 if (i2c_dev->is_dvc) in tegra_i2c_init()
625 tegra_dvc_init(i2c_dev); in tegra_i2c_init()
630 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
633 i2c_writel(i2c_dev, val, I2C_CNFG); in tegra_i2c_init()
634 i2c_writel(i2c_dev, 0, I2C_INT_MASK); in tegra_i2c_init()
636 if (i2c_dev->is_vi) in tegra_i2c_init()
637 tegra_i2c_vi_init(i2c_dev); in tegra_i2c_init()
639 switch (i2c_dev->bus_clk_rate) { in tegra_i2c_init()
642 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
643 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
644 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
646 if (i2c_dev->bus_clk_rate > I2C_MAX_FAST_MODE_FREQ) in tegra_i2c_init()
647 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
649 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
653 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
654 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
655 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
656 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
662 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
664 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); in tegra_i2c_init()
666 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
669 i2c_writel(i2c_dev, val, I2C_INTERFACE_TIMING_0); in tegra_i2c_init()
676 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
677 i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1); in tegra_i2c_init()
681 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
682 i2c_dev->bus_clk_rate * clk_multiplier); in tegra_i2c_init()
684 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
688 if (!i2c_dev->is_dvc && !i2c_dev->is_vi) { in tegra_i2c_init()
689 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); in tegra_i2c_init()
692 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); in tegra_i2c_init()
693 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); in tegra_i2c_init()
694 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); in tegra_i2c_init()
697 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_init()
701 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
702 i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); in tegra_i2c_init()
704 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_init()
711 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_disable_packet_mode() argument
721 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); in tegra_i2c_disable_packet_mode()
723 cnfg = i2c_readl(i2c_dev, I2C_CNFG); in tegra_i2c_disable_packet_mode()
725 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); in tegra_i2c_disable_packet_mode()
727 return tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_disable_packet_mode()
730 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_empty_rx_fifo() argument
732 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
734 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
741 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
744 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
745 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
748 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
757 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer); in tegra_i2c_empty_rx_fifo()
773 val = i2c_readl(i2c_dev, I2C_RX_FIFO); in tegra_i2c_empty_rx_fifo()
784 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
785 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
790 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_fill_tx_fifo() argument
792 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
794 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
797 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
798 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
801 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
828 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
829 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
831 if (i2c_dev->is_vi) in tegra_i2c_fill_tx_fifo()
832 i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
834 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
853 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
854 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
856 i2c_writel(i2c_dev, val, I2C_TX_FIFO); in tegra_i2c_fill_tx_fifo()
865 struct tegra_i2c_dev *i2c_dev = dev_id; in tegra_i2c_isr() local
868 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_isr()
871 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
872 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS), in tegra_i2c_isr()
873 i2c_readl(i2c_dev, I2C_STATUS), in tegra_i2c_isr()
874 i2c_readl(i2c_dev, I2C_CNFG)); in tegra_i2c_isr()
875 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
880 tegra_i2c_disable_packet_mode(i2c_dev); in tegra_i2c_isr()
882 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
884 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
892 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
895 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
896 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
897 if (tegra_i2c_empty_rx_fifo(i2c_dev)) { in tegra_i2c_isr()
903 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
908 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
909 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
910 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_isr()
912 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
917 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
918 if (i2c_dev->is_dvc) in tegra_i2c_isr()
919 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
930 if (i2c_dev->dma_mode) in tegra_i2c_isr()
931 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
936 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
937 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
940 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
945 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
952 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
953 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_isr()
955 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
957 if (i2c_dev->is_dvc) in tegra_i2c_isr()
958 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
960 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
961 if (i2c_dev->msg_read) in tegra_i2c_isr()
962 dmaengine_terminate_async(i2c_dev->rx_dma_chan); in tegra_i2c_isr()
964 dmaengine_terminate_async(i2c_dev->tx_dma_chan); in tegra_i2c_isr()
966 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
969 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
974 static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_config_fifo_trig() argument
982 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
987 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
995 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
996 chan = i2c_dev->rx_dma_chan; in tegra_i2c_config_fifo_trig()
997 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); in tegra_i2c_config_fifo_trig()
999 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1003 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1008 chan = i2c_dev->tx_dma_chan; in tegra_i2c_config_fifo_trig()
1009 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); in tegra_i2c_config_fifo_trig()
1011 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1015 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1024 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1025 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1027 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_config_fifo_trig()
1028 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1034 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1041 i2c_writel(i2c_dev, val, reg); in tegra_i2c_config_fifo_trig()
1044 static unsigned long tegra_i2c_poll_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_completion() argument
1052 u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_poll_completion()
1055 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1070 static unsigned long tegra_i2c_wait_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_wait_completion() argument
1076 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1077 ret = tegra_i2c_poll_completion(i2c_dev, complete, timeout_ms); in tegra_i2c_wait_completion()
1079 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1082 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1095 ret = tegra_i2c_poll_completion(i2c_dev, complete, 0); in tegra_i2c_wait_completion()
1103 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_issue_bus_clear() local
1107 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1111 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1113 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_issue_bus_clear()
1118 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1119 tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1121 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1122 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1125 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1129 val = i2c_readl(i2c_dev, I2C_BUS_CLEAR_STATUS); in tegra_i2c_issue_bus_clear()
1131 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1138 static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_push_packet_header() argument
1142 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1148 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1151 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1154 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1158 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1161 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1183 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1186 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1189 static int tegra_i2c_error_recover(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_error_recover() argument
1192 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1195 tegra_i2c_init(i2c_dev); in tegra_i2c_error_recover()
1198 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1199 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1200 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1205 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1215 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_xfer_msg() argument
1224 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_xfer_msg()
1228 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1229 i2c_dev->msg_buf_remaining = msg->len; in tegra_i2c_xfer_msg()
1230 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1231 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1232 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1234 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1241 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1242 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1244 tegra_i2c_config_fifo_trig(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1251 i2c_dev->bus_clk_rate); in tegra_i2c_xfer_msg()
1254 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1256 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1257 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1258 dma_sync_single_for_device(i2c_dev->dev, in tegra_i2c_xfer_msg()
1259 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1262 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1266 dma_sync_single_for_cpu(i2c_dev->dev, in tegra_i2c_xfer_msg()
1267 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1272 tegra_i2c_push_packet_header(i2c_dev, msg, end_state); in tegra_i2c_xfer_msg()
1274 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1275 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1276 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1279 dma_sync_single_for_device(i2c_dev->dev, in tegra_i2c_xfer_msg()
1280 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1283 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1287 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_xfer_msg()
1291 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1294 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1297 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1301 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1302 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1303 i2c_readl(i2c_dev, I2C_INT_MASK)); in tegra_i2c_xfer_msg()
1305 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1306 time_left = tegra_i2c_wait_completion(i2c_dev, in tegra_i2c_xfer_msg()
1307 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1315 dmaengine_synchronize(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1316 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1317 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1319 dmaengine_terminate_sync(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1320 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1321 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1323 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1324 dev_err(i2c_dev->dev, "DMA transfer timed out\n"); in tegra_i2c_xfer_msg()
1325 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1329 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) { in tegra_i2c_xfer_msg()
1330 dma_sync_single_for_cpu(i2c_dev->dev, in tegra_i2c_xfer_msg()
1331 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1334 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); in tegra_i2c_xfer_msg()
1338 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1341 tegra_i2c_mask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1344 dev_err(i2c_dev->dev, "I2C transfer timed out\n"); in tegra_i2c_xfer_msg()
1345 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1349 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1350 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1351 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1353 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1355 err = tegra_i2c_error_recover(i2c_dev, msg); in tegra_i2c_xfer_msg()
1365 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer() local
1368 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1370 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1371 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1385 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); in tegra_i2c_xfer()
1390 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1398 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer_atomic() local
1401 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1403 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1410 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_func() local
1414 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1624 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_parse_dt() argument
1626 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1631 &i2c_dev->bus_clk_rate); in tegra_i2c_parse_dt()
1633 i2c_dev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; in tegra_i2c_parse_dt()
1636 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1639 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1642 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1645 static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_clocks() argument
1649 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1651 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1652 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1654 if (i2c_dev->is_vi) in tegra_i2c_init_clocks()
1655 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1657 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1658 i2c_dev->clocks); in tegra_i2c_init_clocks()
1662 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1666 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1668 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1671 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1673 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1680 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1685 static void tegra_i2c_release_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_clocks() argument
1687 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1688 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1690 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1693 static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_hardware() argument
1697 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1699 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1701 ret = tegra_i2c_init(i2c_dev); in tegra_i2c_init_hardware()
1703 pm_runtime_put(i2c_dev->dev); in tegra_i2c_init_hardware()
1710 struct tegra_i2c_dev *i2c_dev; in tegra_i2c_probe() local
1714 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1715 if (!i2c_dev) in tegra_i2c_probe()
1718 platform_set_drvdata(pdev, i2c_dev); in tegra_i2c_probe()
1720 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1721 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1723 i2c_dev->hw = of_device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1724 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1725 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1727 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1728 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1729 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1731 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1737 i2c_dev->irq = err; in tegra_i2c_probe()
1740 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1742 err = devm_request_threaded_irq(i2c_dev->dev, i2c_dev->irq, in tegra_i2c_probe()
1745 dev_name(i2c_dev->dev), i2c_dev); in tegra_i2c_probe()
1749 i2c_dev->rst = devm_reset_control_get_exclusive(i2c_dev->dev, "i2c"); in tegra_i2c_probe()
1750 if (IS_ERR(i2c_dev->rst)) { in tegra_i2c_probe()
1751 dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->rst), in tegra_i2c_probe()
1753 return PTR_ERR(i2c_dev->rst); in tegra_i2c_probe()
1756 tegra_i2c_parse_dt(i2c_dev); in tegra_i2c_probe()
1758 err = tegra_i2c_init_clocks(i2c_dev); in tegra_i2c_probe()
1762 err = tegra_i2c_init_dma(i2c_dev); in tegra_i2c_probe()
1775 if (!i2c_dev->is_vi) in tegra_i2c_probe()
1776 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1778 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1780 err = tegra_i2c_init_hardware(i2c_dev); in tegra_i2c_probe()
1784 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1785 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1786 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1787 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1788 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1789 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1790 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1791 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1792 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1793 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1795 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1796 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1798 strlcpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1799 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1801 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1808 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1810 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_probe()
1812 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_probe()
1819 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); in tegra_i2c_remove() local
1821 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1822 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_remove()
1824 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_remove()
1825 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_remove()
1832 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_resume() local
1839 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1848 if (i2c_dev->is_vi) { in tegra_i2c_runtime_resume()
1849 err = tegra_i2c_init(i2c_dev); in tegra_i2c_runtime_resume()
1857 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1864 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_suspend() local
1866 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1873 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_suspend() local
1876 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1889 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_resume() local
1900 err = tegra_i2c_init(i2c_dev); in tegra_i2c_resume()
1915 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()