Lines Matching +full:i2c +full:- +full:scl +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
6 #include <linux/dma-mapping.h>
8 #include <linux/i2c.h>
15 #include <linux/qcom-geni-se.h>
26 /* M_CMD OP codes for I2C */
33 /* M_CMD params for I2C */
44 /* I2C SCL COUNTER fields */
71 #define ABORT_TIMEOUT HZ
72 #define XFER_TIMEOUT HZ
73 #define RST_TIMEOUT HZ
100 [GP_IRQ0] = {-EIO, "Unknown I2C err GP_IRQ0"},
101 [NACK] = {-ENXIO, "NACK: slv unresponsive, check its power/reset-ln"},
102 [GP_IRQ2] = {-EIO, "Unknown I2C err GP IRQ2"},
103 [BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unexpected start/stop"},
104 [ARB_LOST] = {-EAGAIN, "Bus arbitration lost, clock line undriveable"},
105 [GP_IRQ5] = {-EIO, "Unknown I2C err GP IRQ5"},
106 [GENI_OVERRUN] = {-EIO, "Cmd overrun, check GENI cmd-state machine"},
107 [GENI_ILLEGAL_CMD] = {-EIO, "Illegal cmd, check GENI cmd-state machine"},
108 [GENI_ABORT_DONE] = {-ETIMEDOUT, "Abort after timeout successful"},
109 [GENI_TIMEOUT] = {-ETIMEDOUT, "I2C TXN timed out"},
122 * SCL clock cycle. Firmware uses some additional cycles excluded from the
126 * time of high period of SCL: t_high = (t_high_cnt * clk_div) / source_clock
127 * time of low period of SCL: t_low = (t_low_cnt * clk_div) / source_clock
128 * time of full period of SCL: t_cycle = (t_cycle_cnt * clk_div) / source_clock
144 if (itr->clk_freq_out == gi2c->clk_freq_out) { in geni_i2c_clk_map_idx()
145 gi2c->clk_fld = itr; in geni_i2c_clk_map_idx()
149 return -EINVAL; in geni_i2c_clk_map_idx()
154 const struct geni_i2c_clk_fld *itr = gi2c->clk_fld; in qcom_geni_i2c_conf()
157 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL); in qcom_geni_i2c_conf()
159 val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN; in qcom_geni_i2c_conf()
160 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG); in qcom_geni_i2c_conf()
162 val = itr->t_high_cnt << HIGH_COUNTER_SHFT; in qcom_geni_i2c_conf()
163 val |= itr->t_low_cnt << LOW_COUNTER_SHFT; in qcom_geni_i2c_conf()
164 val |= itr->t_cycle_cnt; in qcom_geni_i2c_conf()
165 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); in qcom_geni_i2c_conf()
170 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0); in geni_i2c_err_misc()
171 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_err_misc()
172 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS); in geni_i2c_err_misc()
173 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS); in geni_i2c_err_misc()
174 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN); in geni_i2c_err_misc()
178 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_err_misc()
179 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_err_misc()
181 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS); in geni_i2c_err_misc()
182 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS); in geni_i2c_err_misc()
184 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n", in geni_i2c_err_misc()
186 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n", in geni_i2c_err_misc()
192 if (!gi2c->err) in geni_i2c_err()
193 gi2c->err = gi2c_log[err].err; in geni_i2c_err()
194 if (gi2c->cur) in geni_i2c_err()
195 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n", in geni_i2c_err()
196 gi2c->cur->len, gi2c->cur->addr, gi2c->cur->flags); in geni_i2c_err()
199 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
207 void __iomem *base = gi2c->se.base; in geni_i2c_irq()
217 spin_lock(&gi2c->lock); in geni_i2c_irq()
223 cur = gi2c->cur; in geni_i2c_irq()
247 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n", in geni_i2c_irq()
249 } else if (cur->flags & I2C_M_RD && in geni_i2c_irq()
256 while (gi2c->cur_rd < cur->len && p < sizeof(val)) { in geni_i2c_irq()
257 cur->buf[gi2c->cur_rd++] = val & 0xff; in geni_i2c_irq()
261 if (gi2c->cur_rd == cur->len) in geni_i2c_irq()
264 } else if (!(cur->flags & I2C_M_RD) && in geni_i2c_irq()
266 for (j = 0; j < gi2c->tx_wm; j++) { in geni_i2c_irq()
271 while (gi2c->cur_wr < cur->len && p < sizeof(val)) { in geni_i2c_irq()
272 temp = cur->buf[gi2c->cur_wr++]; in geni_i2c_irq()
278 if (gi2c->cur_wr == cur->len) { in geni_i2c_irq()
293 /* if this is err with done-bit not set, handle that through timeout. */ in geni_i2c_irq()
297 complete(&gi2c->done); in geni_i2c_irq()
299 spin_unlock(&gi2c->lock); in geni_i2c_irq()
310 spin_lock_irqsave(&gi2c->lock, flags); in geni_i2c_abort_xfer()
312 gi2c->cur = NULL; in geni_i2c_abort_xfer()
313 geni_se_abort_m_cmd(&gi2c->se); in geni_i2c_abort_xfer()
314 spin_unlock_irqrestore(&gi2c->lock, flags); in geni_i2c_abort_xfer()
316 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_abort_xfer()
317 val = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_abort_xfer()
321 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); in geni_i2c_abort_xfer()
329 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST); in geni_i2c_rx_fsm_rst()
331 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_rx_fsm_rst()
332 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_rx_fsm_rst()
336 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n"); in geni_i2c_rx_fsm_rst()
344 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST); in geni_i2c_tx_fsm_rst()
346 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_tx_fsm_rst()
347 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_tx_fsm_rst()
351 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); in geni_i2c_tx_fsm_rst()
357 gi2c->cur_rd = 0; in geni_i2c_rx_msg_cleanup()
358 if (gi2c->dma_buf) { in geni_i2c_rx_msg_cleanup()
359 if (gi2c->err) in geni_i2c_rx_msg_cleanup()
361 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_rx_msg_cleanup()
362 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); in geni_i2c_rx_msg_cleanup()
369 gi2c->cur_wr = 0; in geni_i2c_tx_msg_cleanup()
370 if (gi2c->dma_buf) { in geni_i2c_tx_msg_cleanup()
371 if (gi2c->err) in geni_i2c_tx_msg_cleanup()
373 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_tx_msg_cleanup()
374 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); in geni_i2c_tx_msg_cleanup()
384 struct geni_se *se = &gi2c->se; in geni_i2c_rx_one_msg()
385 size_t len = msg->len; in geni_i2c_rx_one_msg()
394 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN); in geni_i2c_rx_one_msg()
402 gi2c->xfer_len = len; in geni_i2c_rx_one_msg()
403 gi2c->dma_addr = rx_dma; in geni_i2c_rx_one_msg()
404 gi2c->dma_buf = dma_buf; in geni_i2c_rx_one_msg()
407 cur = gi2c->cur; in geni_i2c_rx_one_msg()
408 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); in geni_i2c_rx_one_msg()
414 return gi2c->err; in geni_i2c_rx_one_msg()
423 struct geni_se *se = &gi2c->se; in geni_i2c_tx_one_msg()
424 size_t len = msg->len; in geni_i2c_tx_one_msg()
433 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN); in geni_i2c_tx_one_msg()
441 gi2c->xfer_len = len; in geni_i2c_tx_one_msg()
442 gi2c->dma_addr = tx_dma; in geni_i2c_tx_one_msg()
443 gi2c->dma_buf = dma_buf; in geni_i2c_tx_one_msg()
447 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); in geni_i2c_tx_one_msg()
449 cur = gi2c->cur; in geni_i2c_tx_one_msg()
450 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); in geni_i2c_tx_one_msg()
456 return gi2c->err; in geni_i2c_tx_one_msg()
466 gi2c->err = 0; in geni_i2c_xfer()
467 reinit_completion(&gi2c->done); in geni_i2c_xfer()
468 ret = pm_runtime_get_sync(gi2c->se.dev); in geni_i2c_xfer()
470 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret); in geni_i2c_xfer()
471 pm_runtime_put_noidle(gi2c->se.dev); in geni_i2c_xfer()
473 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_xfer()
479 u32 m_param = i < (num - 1) ? STOP_STRETCH : 0; in geni_i2c_xfer()
483 gi2c->cur = &msgs[i]; in geni_i2c_xfer()
495 pm_runtime_mark_last_busy(gi2c->se.dev); in geni_i2c_xfer()
496 pm_runtime_put_autosuspend(gi2c->se.dev); in geni_i2c_xfer()
497 gi2c->cur = NULL; in geni_i2c_xfer()
498 gi2c->err = 0; in geni_i2c_xfer()
526 struct device *dev = &pdev->dev; in geni_i2c_probe()
530 return -ENOMEM; in geni_i2c_probe()
532 gi2c->se.dev = dev; in geni_i2c_probe()
533 gi2c->se.wrapper = dev_get_drvdata(dev->parent); in geni_i2c_probe()
535 gi2c->se.base = devm_ioremap_resource(dev, res); in geni_i2c_probe()
536 if (IS_ERR(gi2c->se.base)) in geni_i2c_probe()
537 return PTR_ERR(gi2c->se.base); in geni_i2c_probe()
539 gi2c->se.clk = devm_clk_get(dev, "se"); in geni_i2c_probe()
540 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev)) in geni_i2c_probe()
541 return PTR_ERR(gi2c->se.clk); in geni_i2c_probe()
543 ret = device_property_read_u32(dev, "clock-frequency", in geni_i2c_probe()
544 &gi2c->clk_freq_out); in geni_i2c_probe()
547 gi2c->clk_freq_out = KHZ(100); in geni_i2c_probe()
551 ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev)); in geni_i2c_probe()
553 gi2c->irq = platform_get_irq(pdev, 0); in geni_i2c_probe()
554 if (gi2c->irq < 0) in geni_i2c_probe()
555 return gi2c->irq; in geni_i2c_probe()
559 dev_err(dev, "Invalid clk frequency %d Hz: %d\n", in geni_i2c_probe()
560 gi2c->clk_freq_out, ret); in geni_i2c_probe()
564 gi2c->adap.algo = &geni_i2c_algo; in geni_i2c_probe()
565 init_completion(&gi2c->done); in geni_i2c_probe()
566 spin_lock_init(&gi2c->lock); in geni_i2c_probe()
568 ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0, in geni_i2c_probe()
572 gi2c->irq, ret); in geni_i2c_probe()
575 /* Disable the interrupt so that the system can enter low-power mode */ in geni_i2c_probe()
576 disable_irq(gi2c->irq); in geni_i2c_probe()
577 i2c_set_adapdata(&gi2c->adap, gi2c); in geni_i2c_probe()
578 gi2c->adap.dev.parent = dev; in geni_i2c_probe()
579 gi2c->adap.dev.of_node = dev->of_node; in geni_i2c_probe()
580 strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name)); in geni_i2c_probe()
582 ret = geni_icc_get(&gi2c->se, "qup-memory"); in geni_i2c_probe()
590 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
591 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
592 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out); in geni_i2c_probe()
594 ret = geni_icc_set_bw(&gi2c->se); in geni_i2c_probe()
598 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_probe()
603 proto = geni_se_read_proto(&gi2c->se); in geni_i2c_probe()
604 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); in geni_i2c_probe()
607 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
608 return -ENXIO; in geni_i2c_probe()
610 gi2c->tx_wm = tx_depth - 1; in geni_i2c_probe()
611 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); in geni_i2c_probe()
612 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, PACKING_BYTES_PW, in geni_i2c_probe()
614 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
620 ret = geni_icc_disable(&gi2c->se); in geni_i2c_probe()
624 dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); in geni_i2c_probe()
626 gi2c->suspended = 1; in geni_i2c_probe()
627 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_probe()
628 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY); in geni_i2c_probe()
629 pm_runtime_use_autosuspend(gi2c->se.dev); in geni_i2c_probe()
630 pm_runtime_enable(gi2c->se.dev); in geni_i2c_probe()
632 ret = i2c_add_adapter(&gi2c->adap); in geni_i2c_probe()
634 dev_err(dev, "Error adding i2c adapter %d\n", ret); in geni_i2c_probe()
635 pm_runtime_disable(gi2c->se.dev); in geni_i2c_probe()
639 dev_dbg(dev, "Geni-I2C adaptor successfully added\n"); in geni_i2c_probe()
648 i2c_del_adapter(&gi2c->adap); in geni_i2c_remove()
649 pm_runtime_disable(gi2c->se.dev); in geni_i2c_remove()
657 /* Make client i2c transfers start failing */ in geni_i2c_shutdown()
658 i2c_mark_adapter_suspended(&gi2c->adap); in geni_i2c_shutdown()
666 disable_irq(gi2c->irq); in geni_i2c_runtime_suspend()
667 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_runtime_suspend()
669 enable_irq(gi2c->irq); in geni_i2c_runtime_suspend()
673 gi2c->suspended = 1; in geni_i2c_runtime_suspend()
676 return geni_icc_disable(&gi2c->se); in geni_i2c_runtime_suspend()
684 ret = geni_icc_enable(&gi2c->se); in geni_i2c_runtime_resume()
688 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_runtime_resume()
692 enable_irq(gi2c->irq); in geni_i2c_runtime_resume()
693 gi2c->suspended = 0; in geni_i2c_runtime_resume()
701 i2c_mark_adapter_suspended(&gi2c->adap); in geni_i2c_suspend_noirq()
703 if (!gi2c->suspended) { in geni_i2c_suspend_noirq()
716 i2c_mark_adapter_resumed(&gi2c->adap); in geni_i2c_resume_noirq()
727 { .compatible = "qcom,geni-i2c" },
746 MODULE_DESCRIPTION("I2C Controller Driver for GENI based QUP cores");