702 		/* MASTER transmit got a NACK before tx all bytes */  in npcm_i2c_callback()
783 		 * don't NACK it. If slave returns zero size HW can't NACK  in npcm_i2c_set_fifo()
784 		 * it immidiattly, it will read extra byte and then NACK.  in npcm_i2c_set_fifo()
987  * NACK on read will be once reached to bus->adap->quirks->max_read_len.
988  * sending a NACK wherever the backend requests for it is not supported.
1017 		 * transmit data. Write till the master will NACK  in npcm_i2c_slave_rd_wr()
1044 	/* Slave: A NACK has occurred */  in npcm_i2c_int_slave_handler()
1053 		/* In slave write, NACK is OK, otherwise it is a problem */  in npcm_i2c_int_slave_handler()
1361 			 * completion of send address byte. If we NACK here, and  in npcm_i2c_irq_master_handler_write()
1363 			 * unintentionally NACK the next multi-byte read.  in npcm_i2c_irq_master_handler_write()
1442 /* A NACK has occurred */
1462 	/* In master write operation, got unexpected NACK */  in npcm_i2c_irq_handle_nack()
1481 	 * In Master mode, NACK should be cleared only after STOP.  in npcm_i2c_irq_handle_nack()
1483 	 * software clears NACK bit. Then a Stop condition is sent.  in npcm_i2c_irq_handle_nack()
1526 		 * Receiving one byte only - set NACK after ensuring  in npcm_i2c_irq_handle_stall_after_start()
1561 		 * of sending address byte If we NACK here, and slave doesn't  in npcm_i2c_irq_handle_sda()
1562 		 * ACK the address, we might unintentionally NACK the next  in npcm_i2c_irq_handle_sda()
1625 	/* A NACK has occurred */  in npcm_i2c_int_master_handler()
2099 	 * 9: bits per transaction (including the ack/nack)  in npcm_i2c_master_xfer()