Lines Matching +full:mpc8544 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
3 * This is a combined i2c adapter and algorithm driver for the
5 * the same I2C unit (8240, 8245, 85xx).
7 * Copyright (C) 2003-2004 Humboldt Solutions Ltd, adrian@humboldt.co.uk
24 #include <linux/i2c.h>
32 #define DRV_NAME "mpc-i2c"
111 void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
114 static inline void writeccr(struct mpc_i2c *i2c, u32 x) in writeccr() argument
116 writeb(x, i2c->base + MPC_I2C_CR); in writeccr()
124 static void mpc_i2c_fixup(struct mpc_i2c *i2c) in mpc_i2c_fixup() argument
127 u32 delay_val = 1000000 / i2c->real_clk + 1; in mpc_i2c_fixup()
132 for (k = 9; k; k--) { in mpc_i2c_fixup()
133 writeccr(i2c, 0); in mpc_i2c_fixup()
134 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN); in mpc_i2c_fixup()
135 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
136 writeccr(i2c, CCR_MEN); in mpc_i2c_fixup()
141 static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask) in i2c_mpc_wait_sr() argument
143 void __iomem *addr = i2c->base + MPC_I2C_SR; in i2c_mpc_wait_sr()
153 * 2. I2CCR - a0h
157 * 5. I2CCR - 00h
158 * 6. I2CCR - 22h
159 * 7. I2CCR - a2h
163 * 11. I2CCR - 82h
167 * 15. I2CCR - 80h
169 static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c) in mpc_i2c_fixup_A004447() argument
174 writeccr(i2c, CCR_MEN | CCR_MSTA); in mpc_i2c_fixup_A004447()
175 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
177 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
181 val = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_fixup_A004447()
184 writeccr(i2c, 0x00); in mpc_i2c_fixup_A004447()
185 writeccr(i2c, CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
186 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
187 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
189 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
192 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
193 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
195 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
198 writeccr(i2c, CCR_MEN | CCR_RSVD); in mpc_i2c_fixup_A004447()
200 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
201 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
203 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
206 writeccr(i2c, CCR_MEN); in mpc_i2c_fixup_A004447()
241 /* see below - default fdr = 0x3f -> div = 2048 */ in mpc_i2c_get_fdr_52xx()
243 return -EINVAL; in mpc_i2c_get_fdr_52xx()
250 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_52xx()
256 if (div->fdr & 0xc0 && pvr == 0x80822011) in mpc_i2c_get_fdr_52xx()
258 if (div->divider >= divider) in mpc_i2c_get_fdr_52xx()
262 *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider; in mpc_i2c_get_fdr_52xx()
263 return (int)div->fdr; in mpc_i2c_get_fdr_52xx()
267 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
273 dev_dbg(i2c->dev, "using fdr %d\n", in mpc_i2c_setup_52xx()
274 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_52xx()
278 ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk); in mpc_i2c_setup_52xx()
281 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_52xx()
284 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk, in mpc_i2c_setup_52xx()
289 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
297 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
305 /* Enable I2C interrupts for mpc5121 */ in mpc_i2c_setup_512x()
307 "fsl,mpc5121-i2c-ctrl"); in mpc_i2c_setup_512x()
311 /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */ in mpc_i2c_setup_512x()
321 mpc_i2c_setup_52xx(node, i2c, clock); in mpc_i2c_setup_512x()
325 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
358 node = of_find_node_by_name(NULL, "global-utilities"); in mpc_i2c_get_sec_cfg_8xxx()
365 * and MPC8544 indicate SEC frequency ratio in mpc_i2c_get_sec_cfg_8xxx()
375 val = in_be32(reg) & 0x00000020; /* sec-cfg */ in mpc_i2c_get_sec_cfg_8xxx()
388 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
428 /* see below - default fdr = 0x1031 -> div = 16 * 3072 */ in mpc_i2c_get_fdr_8xxx()
430 return -EINVAL; in mpc_i2c_get_fdr_8xxx()
435 pr_debug("I2C: src_clock=%d clock=%d divider=%d\n", in mpc_i2c_get_fdr_8xxx()
439 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_8xxx()
444 if (div->divider >= divider) in mpc_i2c_get_fdr_8xxx()
448 *real_clk = fsl_get_sys_freq() / prescaler / div->divider; in mpc_i2c_get_fdr_8xxx()
449 return (int)div->fdr; in mpc_i2c_get_fdr_8xxx()
453 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
459 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n", in mpc_i2c_setup_8xxx()
460 readb(i2c->base + MPC_I2C_DFSRR), in mpc_i2c_setup_8xxx()
461 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_8xxx()
465 ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk); in mpc_i2c_setup_8xxx()
468 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_8xxx()
469 writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_setup_8xxx()
472 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", in mpc_i2c_setup_8xxx()
473 i2c->real_clk, fdr >> 8, fdr & 0xff); in mpc_i2c_setup_8xxx()
478 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
484 static void mpc_i2c_finish(struct mpc_i2c *i2c, int rc) in mpc_i2c_finish() argument
486 i2c->rc = rc; in mpc_i2c_finish()
487 i2c->block = 0; in mpc_i2c_finish()
488 i2c->cntl_bits = CCR_MEN; in mpc_i2c_finish()
489 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_finish()
490 wake_up(&i2c->waitq); in mpc_i2c_finish()
493 static void mpc_i2c_do_action(struct mpc_i2c *i2c) in mpc_i2c_do_action() argument
495 struct i2c_msg *msg = &i2c->msgs[i2c->curr_msg]; in mpc_i2c_do_action()
500 dev_dbg(i2c->dev, "action = %s\n", action_str[i2c->action]); in mpc_i2c_do_action()
502 i2c->cntl_bits &= ~(CCR_RSTA | CCR_MTX | CCR_TXAK); in mpc_i2c_do_action()
504 if (msg->flags & I2C_M_RD) in mpc_i2c_do_action()
506 if (msg->flags & I2C_M_RECV_LEN) in mpc_i2c_do_action()
509 switch (i2c->action) { in mpc_i2c_do_action()
511 i2c->cntl_bits |= CCR_RSTA; in mpc_i2c_do_action()
515 i2c->cntl_bits |= CCR_MSTA | CCR_MTX; in mpc_i2c_do_action()
516 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
517 writeb((msg->addr << 1) | dir, i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
518 i2c->expect_rxack = 1; in mpc_i2c_do_action()
519 i2c->action = dir ? MPC_I2C_ACTION_READ_BEGIN : MPC_I2C_ACTION_WRITE; in mpc_i2c_do_action()
523 if (msg->len) { in mpc_i2c_do_action()
524 if (msg->len == 1 && !(msg->flags & I2C_M_RECV_LEN)) in mpc_i2c_do_action()
525 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
527 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
529 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
531 i2c->action = MPC_I2C_ACTION_READ_BYTE; in mpc_i2c_do_action()
535 if (i2c->byte_posn || !recv_len) { in mpc_i2c_do_action()
537 if (i2c->byte_posn == msg->len - 2) in mpc_i2c_do_action()
538 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
540 if (i2c->byte_posn == msg->len - 1) in mpc_i2c_do_action()
541 i2c->cntl_bits |= CCR_MTX; in mpc_i2c_do_action()
543 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
546 byte = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
548 if (i2c->byte_posn == 0 && recv_len) { in mpc_i2c_do_action()
550 mpc_i2c_finish(i2c, -EPROTO); in mpc_i2c_do_action()
553 msg->len += byte; in mpc_i2c_do_action()
558 if (msg->len == 2) { in mpc_i2c_do_action()
559 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
560 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
564 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], byte); in mpc_i2c_do_action()
565 msg->buf[i2c->byte_posn++] = byte; in mpc_i2c_do_action()
569 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], in mpc_i2c_do_action()
570 msg->buf[i2c->byte_posn]); in mpc_i2c_do_action()
571 writeb(msg->buf[i2c->byte_posn++], i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
572 i2c->expect_rxack = 1; in mpc_i2c_do_action()
576 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
580 WARN(1, "Unexpected action %d\n", i2c->action); in mpc_i2c_do_action()
584 if (msg->len == i2c->byte_posn) { in mpc_i2c_do_action()
585 i2c->curr_msg++; in mpc_i2c_do_action()
586 i2c->byte_posn = 0; in mpc_i2c_do_action()
588 if (i2c->curr_msg == i2c->num_msgs) { in mpc_i2c_do_action()
589 i2c->action = MPC_I2C_ACTION_STOP; in mpc_i2c_do_action()
595 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
597 i2c->action = MPC_I2C_ACTION_RESTART; in mpc_i2c_do_action()
602 static void mpc_i2c_do_intr(struct mpc_i2c *i2c, u8 status) in mpc_i2c_do_intr() argument
604 spin_lock(&i2c->lock); in mpc_i2c_do_intr()
607 dev_dbg(i2c->dev, "unfinished\n"); in mpc_i2c_do_intr()
608 mpc_i2c_finish(i2c, -EIO); in mpc_i2c_do_intr()
613 dev_dbg(i2c->dev, "arbitration lost\n"); in mpc_i2c_do_intr()
614 mpc_i2c_finish(i2c, -EAGAIN); in mpc_i2c_do_intr()
618 if (i2c->expect_rxack && (status & CSR_RXAK)) { in mpc_i2c_do_intr()
619 dev_dbg(i2c->dev, "no Rx ACK\n"); in mpc_i2c_do_intr()
620 mpc_i2c_finish(i2c, -ENXIO); in mpc_i2c_do_intr()
623 i2c->expect_rxack = 0; in mpc_i2c_do_intr()
625 mpc_i2c_do_action(i2c); in mpc_i2c_do_intr()
628 spin_unlock(&i2c->lock); in mpc_i2c_do_intr()
633 struct mpc_i2c *i2c = dev_id; in mpc_i2c_isr() local
636 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
639 readb_poll_timeout(i2c->base + MPC_I2C_SR, status, !(status & CSR_MCF), 0, 100); in mpc_i2c_isr()
640 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
641 mpc_i2c_do_intr(i2c, status); in mpc_i2c_isr()
647 static int mpc_i2c_wait_for_completion(struct mpc_i2c *i2c) in mpc_i2c_wait_for_completion() argument
651 time_left = wait_event_timeout(i2c->waitq, !i2c->block, i2c->adap.timeout); in mpc_i2c_wait_for_completion()
653 return -ETIMEDOUT; in mpc_i2c_wait_for_completion()
660 static int mpc_i2c_execute_msg(struct mpc_i2c *i2c) in mpc_i2c_execute_msg() argument
666 spin_lock_irqsave(&i2c->lock, flags); in mpc_i2c_execute_msg()
668 i2c->curr_msg = 0; in mpc_i2c_execute_msg()
669 i2c->rc = 0; in mpc_i2c_execute_msg()
670 i2c->byte_posn = 0; in mpc_i2c_execute_msg()
671 i2c->block = 1; in mpc_i2c_execute_msg()
672 i2c->action = MPC_I2C_ACTION_START; in mpc_i2c_execute_msg()
674 i2c->cntl_bits = CCR_MEN | CCR_MIEN; in mpc_i2c_execute_msg()
675 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
676 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_execute_msg()
678 mpc_i2c_do_action(i2c); in mpc_i2c_execute_msg()
680 spin_unlock_irqrestore(&i2c->lock, flags); in mpc_i2c_execute_msg()
682 ret = mpc_i2c_wait_for_completion(i2c); in mpc_i2c_execute_msg()
684 i2c->rc = ret; in mpc_i2c_execute_msg()
686 if (i2c->rc == -EIO || i2c->rc == -EAGAIN || i2c->rc == -ETIMEDOUT) in mpc_i2c_execute_msg()
687 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
691 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) { in mpc_i2c_execute_msg()
693 u8 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
695 dev_dbg(i2c->dev, "timeout\n"); in mpc_i2c_execute_msg()
698 i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
699 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
701 return -EIO; in mpc_i2c_execute_msg()
706 return i2c->rc; in mpc_i2c_execute_msg()
712 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in mpc_xfer() local
715 dev_dbg(i2c->dev, "num = %d\n", num); in mpc_xfer()
717 dev_dbg(i2c->dev, " addr = %02x, flags = %02x, len = %d, %*ph\n", in mpc_xfer()
722 WARN_ON(i2c->msgs != NULL); in mpc_xfer()
723 i2c->msgs = msgs; in mpc_xfer()
724 i2c->num_msgs = num; in mpc_xfer()
726 rc = mpc_i2c_execute_msg(i2c); in mpc_xfer()
730 i2c->num_msgs = 0; in mpc_xfer()
731 i2c->msgs = NULL; in mpc_xfer()
744 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in fsl_i2c_bus_recovery() local
746 if (i2c->has_errata_A004447) in fsl_i2c_bus_recovery()
747 mpc_i2c_fixup_A004447(i2c); in fsl_i2c_bus_recovery()
749 mpc_i2c_fixup(i2c); in fsl_i2c_bus_recovery()
772 struct mpc_i2c *i2c; in fsl_i2c_probe() local
780 i2c = devm_kzalloc(&op->dev, sizeof(*i2c), GFP_KERNEL); in fsl_i2c_probe()
781 if (!i2c) in fsl_i2c_probe()
782 return -ENOMEM; in fsl_i2c_probe()
784 i2c->dev = &op->dev; /* for debug and error output */ in fsl_i2c_probe()
786 init_waitqueue_head(&i2c->waitq); in fsl_i2c_probe()
787 spin_lock_init(&i2c->lock); in fsl_i2c_probe()
789 i2c->base = devm_platform_ioremap_resource(op, 0); in fsl_i2c_probe()
790 if (IS_ERR(i2c->base)) in fsl_i2c_probe()
791 return PTR_ERR(i2c->base); in fsl_i2c_probe()
793 i2c->irq = platform_get_irq(op, 0); in fsl_i2c_probe()
794 if (i2c->irq < 0) in fsl_i2c_probe()
795 return i2c->irq; in fsl_i2c_probe()
797 result = devm_request_irq(&op->dev, i2c->irq, mpc_i2c_isr, in fsl_i2c_probe()
798 IRQF_SHARED, "i2c-mpc", i2c); in fsl_i2c_probe()
800 dev_err(i2c->dev, "failed to attach interrupt\n"); in fsl_i2c_probe()
805 * enable clock for the I2C peripheral (non fatal), in fsl_i2c_probe()
808 clk = devm_clk_get_optional(&op->dev, NULL); in fsl_i2c_probe()
814 dev_err(&op->dev, "failed to enable clock\n"); in fsl_i2c_probe()
818 i2c->clk_per = clk; in fsl_i2c_probe()
820 if (of_property_read_bool(op->dev.of_node, "fsl,preserve-clocking")) { in fsl_i2c_probe()
823 prop = of_get_property(op->dev.of_node, "clock-frequency", in fsl_i2c_probe()
829 data = device_get_match_data(&op->dev); in fsl_i2c_probe()
831 data->setup(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
834 if (of_get_property(op->dev.of_node, "dfsrr", NULL)) in fsl_i2c_probe()
835 mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
838 prop = of_get_property(op->dev.of_node, "fsl,timeout", &plen); in fsl_i2c_probe()
844 dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ); in fsl_i2c_probe()
846 if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447")) in fsl_i2c_probe()
847 i2c->has_errata_A004447 = true; in fsl_i2c_probe()
849 i2c->adap = mpc_ops; in fsl_i2c_probe()
850 scnprintf(i2c->adap.name, sizeof(i2c->adap.name), in fsl_i2c_probe()
851 "MPC adapter (%s)", of_node_full_name(op->dev.of_node)); in fsl_i2c_probe()
852 i2c->adap.dev.parent = &op->dev; in fsl_i2c_probe()
853 i2c->adap.nr = op->id; in fsl_i2c_probe()
854 i2c->adap.dev.of_node = of_node_get(op->dev.of_node); in fsl_i2c_probe()
855 i2c->adap.bus_recovery_info = &fsl_i2c_recovery_info; in fsl_i2c_probe()
856 platform_set_drvdata(op, i2c); in fsl_i2c_probe()
857 i2c_set_adapdata(&i2c->adap, i2c); in fsl_i2c_probe()
859 result = i2c_add_numbered_adapter(&i2c->adap); in fsl_i2c_probe()
866 clk_disable_unprepare(i2c->clk_per); in fsl_i2c_probe()
873 struct mpc_i2c *i2c = platform_get_drvdata(op); in fsl_i2c_remove() local
875 i2c_del_adapter(&i2c->adap); in fsl_i2c_remove()
877 clk_disable_unprepare(i2c->clk_per); in fsl_i2c_remove()
884 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_suspend() local
886 i2c->fdr = readb(i2c->base + MPC_I2C_FDR); in mpc_i2c_suspend()
887 i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR); in mpc_i2c_suspend()
894 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_resume() local
896 writeb(i2c->fdr, i2c->base + MPC_I2C_FDR); in mpc_i2c_resume()
897 writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_resume()
924 {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
925 {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
926 {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
927 {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
928 {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
929 {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
930 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
932 {.compatible = "fsl-i2c", },
951 MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "