35 	 * Transmit data, first byte is low byte of the 32-bit reg.
58 	 * 20-bit fields containing CTS values to be transmitted if
130 	enum vc4_hdmi_regs reg;  member
131 	unsigned int offset;  member
137 		.reg = _base,			\
138 		.offset = _offset,		\
141 #define VC4_HD_REG(reg, offset)		_VC4_REG(VC4_HD, reg, offset)  argument
142 #define VC4_HDMI_REG(reg, offset)	_VC4_REG(VC4_HDMI, reg, offset)  argument
143 #define VC5_CEC_REG(reg, offset)	_VC4_REG(VC5_CEC, reg, offset)  argument
144 #define VC5_CSC_REG(reg, offset)	_VC4_REG(VC5_CSC, reg, offset)  argument
145 #define VC5_DVP_REG(reg, offset)	_VC4_REG(VC5_DVP, reg, offset)  argument
146 #define VC5_PHY_REG(reg, offset)	_VC4_REG(VC5_PHY, reg, offset)  argument
147 #define VC5_RAM_REG(reg, offset)	_VC4_REG(VC5_RAM, reg, offset)  argument
148 #define VC5_RM_REG(reg, offset)		_VC4_REG(VC5_RM, reg, offset)  argument
374 					enum vc4_hdmi_regs reg)  in __vc4_hdmi_get_field_base()  argument
376 	switch (reg) {  in __vc4_hdmi_get_field_base()
378 		return hdmi->hd_regs;  in __vc4_hdmi_get_field_base()
381 		return hdmi->hdmicore_regs;  in __vc4_hdmi_get_field_base()
384 		return hdmi->csc_regs;  in __vc4_hdmi_get_field_base()
387 		return hdmi->cec_regs;  in __vc4_hdmi_get_field_base()
390 		return hdmi->dvp_regs;  in __vc4_hdmi_get_field_base()
393 		return hdmi->phy_regs;  in __vc4_hdmi_get_field_base()
396 		return hdmi->ram_regs;  in __vc4_hdmi_get_field_base()
399 		return hdmi->rm_regs;  in __vc4_hdmi_get_field_base()
409 				enum vc4_hdmi_field reg)  in vc4_hdmi_read()  argument
412 	const struct vc4_hdmi_variant *variant = hdmi->variant;  in vc4_hdmi_read()
415 	if (reg >= variant->num_registers) {  in vc4_hdmi_read()
416 		dev_warn(&hdmi->pdev->dev,  in vc4_hdmi_read()
417 			 "Invalid register ID %u\n", reg);  in vc4_hdmi_read()
421 	field = &variant->registers[reg];  in vc4_hdmi_read()
422 	base = __vc4_hdmi_get_field_base(hdmi, field->reg);  in vc4_hdmi_read()
424 		dev_warn(&hdmi->pdev->dev,  in vc4_hdmi_read()
425 			 "Unknown register ID %u\n", reg);  in vc4_hdmi_read()
429 	return readl(base + field->offset);  in vc4_hdmi_read()
431 #define HDMI_READ(reg)		vc4_hdmi_read(vc4_hdmi, reg)  argument
434 				  enum vc4_hdmi_field reg,  in vc4_hdmi_write()  argument
438 	const struct vc4_hdmi_variant *variant = hdmi->variant;  in vc4_hdmi_write()
441 	if (reg >= variant->num_registers) {  in vc4_hdmi_write()
442 		dev_warn(&hdmi->pdev->dev,  in vc4_hdmi_write()
443 			 "Invalid register ID %u\n", reg);  in vc4_hdmi_write()
447 	field = &variant->registers[reg];  in vc4_hdmi_write()
448 	base = __vc4_hdmi_get_field_base(hdmi, field->reg);  in vc4_hdmi_write()
452 	writel(value, base + field->offset);  in vc4_hdmi_write()
454 #define HDMI_WRITE(reg, val)	vc4_hdmi_write(vc4_hdmi, reg, val)  argument