Lines Matching refs:VC4_SET_FIELD
646 csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR, in vc4_hdmi_csc_setup()
662 csc_ctl |= VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM, in vc4_hdmi_csc_setup()
724 u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start, in vc4_hdmi_set_timings()
726 VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, in vc4_hdmi_set_timings()
728 VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL)); in vc4_hdmi_set_timings()
729 u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) | in vc4_hdmi_set_timings()
730 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end, in vc4_hdmi_set_timings()
732 u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) | in vc4_hdmi_set_timings()
733 VC4_SET_FIELD(mode->crtc_vtotal - in vc4_hdmi_set_timings()
741 VC4_SET_FIELD(mode->hdisplay * pixel_rep, in vc4_hdmi_set_timings()
745 VC4_SET_FIELD((mode->htotal - in vc4_hdmi_set_timings()
748 VC4_SET_FIELD((mode->hsync_end - in vc4_hdmi_set_timings()
751 VC4_SET_FIELD((mode->hsync_start - in vc4_hdmi_set_timings()
770 u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start, in vc5_hdmi_set_timings()
772 VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, in vc5_hdmi_set_timings()
774 VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL)); in vc5_hdmi_set_timings()
775 u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) | in vc5_hdmi_set_timings()
776 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end, in vc5_hdmi_set_timings()
778 u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) | in vc5_hdmi_set_timings()
779 VC4_SET_FIELD(mode->crtc_vtotal - in vc5_hdmi_set_timings()
791 VC4_SET_FIELD(mode->hdisplay * pixel_rep, in vc5_hdmi_set_timings()
793 VC4_SET_FIELD((mode->hsync_start - in vc5_hdmi_set_timings()
798 VC4_SET_FIELD((mode->htotal - in vc5_hdmi_set_timings()
801 VC4_SET_FIELD((mode->hsync_end - in vc5_hdmi_set_timings()
830 reg |= VC4_SET_FIELD(2, VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE) | in vc5_hdmi_set_timings()
831 VC4_SET_FIELD(gcp, VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH); in vc5_hdmi_set_timings()
836 reg |= VC4_SET_FIELD(gcp, VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1); in vc5_hdmi_set_timings()
1193 VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | in vc4_hdmi_audio_set_mai_clock()
1194 VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); in vc4_hdmi_audio_set_mai_clock()
1212 VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); in vc4_hdmi_set_n_cts()
1346 VC4_SET_FIELD(channels, VC4_HD_MAI_CTL_CHNUM) | in vc4_hdmi_audio_prepare()
1360 VC4_SET_FIELD(mai_sample_rate, in vc4_hdmi_audio_prepare()
1362 VC4_SET_FIELD(mai_audio_format, in vc4_hdmi_audio_prepare()
1369 VC4_SET_FIELD(0x8, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); in vc4_hdmi_audio_prepare()
1372 audio_packet_config |= VC4_SET_FIELD(channel_mask, in vc4_hdmi_audio_prepare()
1377 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) | in vc4_hdmi_audio_prepare()
1378 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) | in vc4_hdmi_audio_prepare()
1379 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) | in vc4_hdmi_audio_prepare()
1380 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW)); in vc4_hdmi_audio_prepare()
1385 VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); in vc4_hdmi_audio_prepare()