1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <soc/tegra/pmc.h>
51 	writel(value, vic->regs + offset);  in vic_writel()
57 	struct iommu_fwspec *spec = dev_iommu_fwspec_get(vic->dev);  in vic_boot()
64 	if (vic->config->supports_sid && spec) {  in vic_boot()
71 		if (spec->num_ids > 0) {  in vic_boot()
72 			value = spec->ids[0] & 0xffff;  in vic_boot()
98 	err = falcon_boot(&vic->falcon);  in vic_boot()
102 	hdr = vic->falcon.firmware.virt;  in vic_boot()
107 		hdr = vic->falcon.firmware.virt +  in vic_boot()
111 		falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE,  in vic_boot()
114 			&vic->falcon, VIC_SET_FCE_UCODE_OFFSET,  in vic_boot()
115 			(vic->falcon.firmware.iova + fce_bin_data_offset) >> 8);  in vic_boot()
118 	err = falcon_wait_idle(&vic->falcon);  in vic_boot()
120 		dev_err(vic->dev,  in vic_boot()
131 	struct drm_device *dev = dev_get_drvdata(client->host);  in vic_init()
132 	struct tegra_drm *tegra = dev->dev_private;  in vic_init()
137 	if (err < 0 && err != -ENODEV) {  in vic_init()
138 		dev_err(vic->dev, "failed to attach to domain: %d\n", err);  in vic_init()
142 	vic->channel = host1x_channel_request(client);  in vic_init()
143 	if (!vic->channel) {  in vic_init()
144 		err = -ENOMEM;  in vic_init()
148 	client->syncpts[0] = host1x_syncpt_request(client, 0);  in vic_init()
149 	if (!client->syncpts[0]) {  in vic_init()
150 		err = -ENOMEM;  in vic_init()
162 	client->dev->dma_parms = client->host->dma_parms;  in vic_init()
167 	host1x_syncpt_put(client->syncpts[0]);  in vic_init()
169 	host1x_channel_put(vic->channel);  in vic_init()
179 	struct drm_device *dev = dev_get_drvdata(client->host);  in vic_exit()
180 	struct tegra_drm *tegra = dev->dev_private;  in vic_exit()
185 	client->dev->dma_parms = NULL;  in vic_exit()
191 	host1x_syncpt_put(client->syncpts[0]);  in vic_exit()
192 	host1x_channel_put(vic->channel);  in vic_exit()
195 	if (client->group) {  in vic_exit()
196 		dma_unmap_single(vic->dev, vic->falcon.firmware.phys,  in vic_exit()
197 				 vic->falcon.firmware.size, DMA_TO_DEVICE);  in vic_exit()
198 		tegra_drm_free(tegra, vic->falcon.firmware.size,  in vic_exit()
199 			       vic->falcon.firmware.virt,  in vic_exit()
200 			       vic->falcon.firmware.iova);  in vic_exit()
202 		dma_free_coherent(vic->dev, vic->falcon.firmware.size,  in vic_exit()
203 				  vic->falcon.firmware.virt,  in vic_exit()
204 				  vic->falcon.firmware.iova);  in vic_exit()
217 	struct host1x_client *client = &vic->client.base;  in vic_load_firmware()
218 	struct tegra_drm *tegra = vic->client.drm;  in vic_load_firmware()
224 	if (vic->falcon.firmware.virt)  in vic_load_firmware()
227 	err = falcon_read_firmware(&vic->falcon, vic->config->firmware);  in vic_load_firmware()
231 	size = vic->falcon.firmware.size;  in vic_load_firmware()
233 	if (!client->group) {  in vic_load_firmware()
234 		virt = dma_alloc_coherent(vic->dev, size, &iova, GFP_KERNEL);  in vic_load_firmware()
236 		err = dma_mapping_error(vic->dev, iova);  in vic_load_firmware()
243 	vic->falcon.firmware.virt = virt;  in vic_load_firmware()
244 	vic->falcon.firmware.iova = iova;  in vic_load_firmware()
246 	err = falcon_load_firmware(&vic->falcon);  in vic_load_firmware()
255 	if (client->group) {  in vic_load_firmware()
258 		phys = dma_map_single(vic->dev, virt, size, DMA_TO_DEVICE);  in vic_load_firmware()
260 		err = dma_mapping_error(vic->dev, phys);  in vic_load_firmware()
264 		vic->falcon.firmware.phys = phys;  in vic_load_firmware()
270 	if (!client->group)  in vic_load_firmware()
271 		dma_free_coherent(vic->dev, size, virt, iova);  in vic_load_firmware()
284 	err = clk_prepare_enable(vic->clk);  in vic_runtime_resume()
290 	err = reset_control_deassert(vic->rst);  in vic_runtime_resume()
307 	reset_control_assert(vic->rst);  in vic_runtime_resume()
309 	clk_disable_unprepare(vic->clk);  in vic_runtime_resume()
318 	err = reset_control_assert(vic->rst);  in vic_runtime_suspend()
324 	clk_disable_unprepare(vic->clk);  in vic_runtime_suspend()
335 	err = pm_runtime_resume_and_get(vic->dev);  in vic_open_channel()
339 	context->channel = host1x_channel_get(vic->channel);  in vic_open_channel()
340 	if (!context->channel) {  in vic_open_channel()
341 		pm_runtime_put(vic->dev);  in vic_open_channel()
342 		return -ENOMEM;  in vic_open_channel()
350 	struct vic *vic = to_vic(context->client);  in vic_close_channel()
352 	host1x_channel_put(context->channel);  in vic_close_channel()
353 	pm_runtime_put(vic->dev);  in vic_close_channel()
370 #define NVIDIA_TEGRA_210_VIC_FIRMWARE "nvidia/tegra210/vic04_ucode.bin"
395 	{ .compatible = "nvidia,tegra124-vic", .data = &vic_t124_config },
396 	{ .compatible = "nvidia,tegra210-vic", .data = &vic_t210_config },
397 	{ .compatible = "nvidia,tegra186-vic", .data = &vic_t186_config },
398 	{ .compatible = "nvidia,tegra194-vic", .data = &vic_t194_config },
405 	struct device *dev = &pdev->dev;  in vic_probe()
412 	err = dma_coerce_mask_and_coherent(dev, *dev->parent->dma_mask);  in vic_probe()
414 		dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err);  in vic_probe()
420 		return -ENOMEM;  in vic_probe()
422 	vic->config = of_device_get_match_data(dev);  in vic_probe()
426 		return -ENOMEM;  in vic_probe()
430 		dev_err(&pdev->dev, "failed to get registers\n");  in vic_probe()
431 		return -ENXIO;  in vic_probe()
434 	vic->regs = devm_ioremap_resource(dev, regs);  in vic_probe()
435 	if (IS_ERR(vic->regs))  in vic_probe()
436 		return PTR_ERR(vic->regs);  in vic_probe()
438 	vic->clk = devm_clk_get(dev, NULL);  in vic_probe()
439 	if (IS_ERR(vic->clk)) {  in vic_probe()
440 		dev_err(&pdev->dev, "failed to get clock\n");  in vic_probe()
441 		return PTR_ERR(vic->clk);  in vic_probe()
444 	if (!dev->pm_domain) {  in vic_probe()
445 		vic->rst = devm_reset_control_get(dev, "vic");  in vic_probe()
446 		if (IS_ERR(vic->rst)) {  in vic_probe()
447 			dev_err(&pdev->dev, "failed to get reset\n");  in vic_probe()
448 			return PTR_ERR(vic->rst);  in vic_probe()
452 	vic->falcon.dev = dev;  in vic_probe()
453 	vic->falcon.regs = vic->regs;  in vic_probe()
455 	err = falcon_init(&vic->falcon);  in vic_probe()
461 	INIT_LIST_HEAD(&vic->client.base.list);  in vic_probe()
462 	vic->client.base.ops = &vic_client_ops;  in vic_probe()
463 	vic->client.base.dev = dev;  in vic_probe()
464 	vic->client.base.class = HOST1X_CLASS_VIC;  in vic_probe()
465 	vic->client.base.syncpts = syncpts;  in vic_probe()
466 	vic->client.base.num_syncpts = 1;  in vic_probe()
467 	vic->dev = dev;  in vic_probe()
469 	INIT_LIST_HEAD(&vic->client.list);  in vic_probe()
470 	vic->client.version = vic->config->version;  in vic_probe()
471 	vic->client.ops = &vic_ops;  in vic_probe()
473 	err = host1x_client_register(&vic->client.base);  in vic_probe()
479 	pm_runtime_enable(&pdev->dev);  in vic_probe()
480 	if (!pm_runtime_enabled(&pdev->dev)) {  in vic_probe()
481 		err = vic_runtime_resume(&pdev->dev);  in vic_probe()
489 	host1x_client_unregister(&vic->client.base);  in vic_probe()
491 	falcon_exit(&vic->falcon);  in vic_probe()
501 	err = host1x_client_unregister(&vic->client.base);  in vic_remove()
503 		dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",  in vic_remove()
508 	if (pm_runtime_enabled(&pdev->dev))  in vic_remove()
509 		pm_runtime_disable(&pdev->dev);  in vic_remove()
511 		vic_runtime_suspend(&pdev->dev);  in vic_remove()
513 	falcon_exit(&vic->falcon);  in vic_remove()
524 		.name = "tegra-vic",