Lines Matching +full:0 +full:x425
173 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
174 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
176 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
177 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
178 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
179 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
180 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
181 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
182 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
183 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
184 #define DC_CMD_WIN_C_INCR_SYNCPT 0x018
185 #define DC_CMD_WIN_C_INCR_SYNCPT_CNTRL 0x019
186 #define DC_CMD_WIN_C_INCR_SYNCPT_ERROR 0x01a
187 #define DC_CMD_CONT_SYNCPT_VSYNC 0x028
189 #define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
190 #define DC_CMD_DISPLAY_COMMAND 0x032
191 #define DISP_CTRL_MODE_STOP (0 << 5)
195 #define DC_CMD_SIGNAL_RAISE 0x033
196 #define DC_CMD_DISPLAY_POWER_CONTROL 0x036
197 #define PW0_ENABLE (1 << 0)
205 #define DC_CMD_INT_STATUS 0x037
206 #define DC_CMD_INT_MASK 0x038
207 #define DC_CMD_INT_ENABLE 0x039
208 #define DC_CMD_INT_TYPE 0x03a
209 #define DC_CMD_INT_POLARITY 0x03b
210 #define CTXSW_INT (1 << 0)
231 #define DC_CMD_SIGNAL_RAISE1 0x03c
232 #define DC_CMD_SIGNAL_RAISE2 0x03d
233 #define DC_CMD_SIGNAL_RAISE3 0x03e
235 #define DC_CMD_STATE_ACCESS 0x040
236 #define READ_MUX (1 << 0)
239 #define DC_CMD_STATE_CONTROL 0x041
240 #define GENERAL_ACT_REQ (1 << 0)
254 #define DC_CMD_DISPLAY_WINDOW_HEADER 0x042
259 #define DC_CMD_REG_ACT_CONTROL 0x043
261 #define DC_COM_CRC_CONTROL 0x300
263 #define DC_COM_CRC_CONTROL_FULL_FRAME (0 << 2)
266 #define DC_COM_CRC_CONTROL_ENABLE (1 << 0)
267 #define DC_COM_CRC_CHECKSUM 0x301
268 #define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x))
269 #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
272 #define DC_COM_PIN_OUTPUT_DATA(x) (0x30a + (x))
273 #define DC_COM_PIN_INPUT_ENABLE(x) (0x30e + (x))
274 #define DC_COM_PIN_INPUT_DATA(x) (0x312 + (x))
275 #define DC_COM_PIN_OUTPUT_SELECT(x) (0x314 + (x))
277 #define DC_COM_PIN_MISC_CONTROL 0x31b
278 #define DC_COM_PIN_PM0_CONTROL 0x31c
279 #define DC_COM_PIN_PM0_DUTY_CYCLE 0x31d
280 #define DC_COM_PIN_PM1_CONTROL 0x31e
281 #define DC_COM_PIN_PM1_DUTY_CYCLE 0x31f
283 #define DC_COM_SPI_CONTROL 0x320
284 #define DC_COM_SPI_START_BYTE 0x321
285 #define DC_COM_HSPI_WRITE_DATA_AB 0x322
286 #define DC_COM_HSPI_WRITE_DATA_CD 0x323
287 #define DC_COM_HSPI_CS_DC 0x324
288 #define DC_COM_SCRATCH_REGISTER_A 0x325
289 #define DC_COM_SCRATCH_REGISTER_B 0x326
290 #define DC_COM_GPIO_CTRL 0x327
291 #define DC_COM_GPIO_DEBOUNCE_COUNTER 0x328
292 #define DC_COM_CRC_CHECKSUM_LATCHED 0x329
294 #define DC_COM_RG_UNDERFLOW 0x365
296 #define UNDERFLOW_REPORT_ENABLE (1 << 0)
298 #define DC_DISP_DISP_SIGNAL_OPTIONS0 0x400
303 #define DC_DISP_DISP_SIGNAL_OPTIONS1 0x401
305 #define DC_DISP_DISP_WIN_OPTIONS 0x402
313 #define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403
314 #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24)
315 #define WINDOW_A_THRESHOLD(x) (((x) & 0x7f) << 16)
316 #define WINDOW_B_THRESHOLD(x) (((x) & 0x7f) << 8)
317 #define WINDOW_C_THRESHOLD(x) (((x) & 0xff) << 0)
319 #define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404
320 #define CURSOR_DELAY(x) (((x) & 0x3f) << 24)
321 #define WINDOW_A_DELAY(x) (((x) & 0x3f) << 16)
322 #define WINDOW_B_DELAY(x) (((x) & 0x3f) << 8)
323 #define WINDOW_C_DELAY(x) (((x) & 0x3f) << 0)
325 #define DC_DISP_DISP_TIMING_OPTIONS 0x405
326 #define VSYNC_H_POSITION(x) ((x) & 0xfff)
328 #define DC_DISP_REF_TO_SYNC 0x406
329 #define DC_DISP_SYNC_WIDTH 0x407
330 #define DC_DISP_BACK_PORCH 0x408
331 #define DC_DISP_ACTIVE 0x409
332 #define DC_DISP_FRONT_PORCH 0x40a
333 #define DC_DISP_H_PULSE0_CONTROL 0x40b
334 #define DC_DISP_H_PULSE0_POSITION_A 0x40c
335 #define DC_DISP_H_PULSE0_POSITION_B 0x40d
336 #define DC_DISP_H_PULSE0_POSITION_C 0x40e
337 #define DC_DISP_H_PULSE0_POSITION_D 0x40f
338 #define DC_DISP_H_PULSE1_CONTROL 0x410
339 #define DC_DISP_H_PULSE1_POSITION_A 0x411
340 #define DC_DISP_H_PULSE1_POSITION_B 0x412
341 #define DC_DISP_H_PULSE1_POSITION_C 0x413
342 #define DC_DISP_H_PULSE1_POSITION_D 0x414
343 #define DC_DISP_H_PULSE2_CONTROL 0x415
344 #define DC_DISP_H_PULSE2_POSITION_A 0x416
345 #define DC_DISP_H_PULSE2_POSITION_B 0x417
346 #define DC_DISP_H_PULSE2_POSITION_C 0x418
347 #define DC_DISP_H_PULSE2_POSITION_D 0x419
348 #define DC_DISP_V_PULSE0_CONTROL 0x41a
349 #define DC_DISP_V_PULSE0_POSITION_A 0x41b
350 #define DC_DISP_V_PULSE0_POSITION_B 0x41c
351 #define DC_DISP_V_PULSE0_POSITION_C 0x41d
352 #define DC_DISP_V_PULSE1_CONTROL 0x41e
353 #define DC_DISP_V_PULSE1_POSITION_A 0x41f
354 #define DC_DISP_V_PULSE1_POSITION_B 0x420
355 #define DC_DISP_V_PULSE1_POSITION_C 0x421
356 #define DC_DISP_V_PULSE2_CONTROL 0x422
357 #define DC_DISP_V_PULSE2_POSITION_A 0x423
358 #define DC_DISP_V_PULSE3_CONTROL 0x424
359 #define DC_DISP_V_PULSE3_POSITION_A 0x425
360 #define DC_DISP_M0_CONTROL 0x426
361 #define DC_DISP_M1_CONTROL 0x427
362 #define DC_DISP_DI_CONTROL 0x428
363 #define DC_DISP_PP_CONTROL 0x429
364 #define DC_DISP_PP_SELECT_A 0x42a
365 #define DC_DISP_PP_SELECT_B 0x42b
366 #define DC_DISP_PP_SELECT_C 0x42c
367 #define DC_DISP_PP_SELECT_D 0x42d
369 #define PULSE_MODE_NORMAL (0 << 3)
371 #define PULSE_POLARITY_HIGH (0 << 4)
373 #define PULSE_QUAL_ALWAYS (0 << 6)
376 #define PULSE_LAST_START_A (0 << 8)
385 #define PULSE_START(x) (((x) & 0xfff) << 0)
386 #define PULSE_END(x) (((x) & 0xfff) << 16)
388 #define DC_DISP_DISP_CLOCK_CONTROL 0x42e
389 #define PIXEL_CLK_DIVIDER_PCD1 (0 << 8)
402 #define SHIFT_CLK_DIVIDER(x) ((x) & 0xff)
404 #define DC_DISP_DISP_INTERFACE_CONTROL 0x42f
405 #define DISP_DATA_FORMAT_DF1P1C (0 << 0)
406 #define DISP_DATA_FORMAT_DF1P2C24B (1 << 0)
407 #define DISP_DATA_FORMAT_DF1P2C18B (2 << 0)
408 #define DISP_DATA_FORMAT_DF1P2C16B (3 << 0)
409 #define DISP_DATA_FORMAT_DF2S (4 << 0)
410 #define DISP_DATA_FORMAT_DF3S (5 << 0)
411 #define DISP_DATA_FORMAT_DFSPI (6 << 0)
412 #define DISP_DATA_FORMAT_DF1P3C24B (7 << 0)
413 #define DISP_DATA_FORMAT_DF1P3C18B (8 << 0)
414 #define DISP_ALIGNMENT_MSB (0 << 8)
416 #define DISP_ORDER_RED_BLUE (0 << 9)
419 #define DC_DISP_DISP_COLOR_CONTROL 0x430
420 #define BASE_COLOR_SIZE666 ( 0 << 0)
421 #define BASE_COLOR_SIZE111 ( 1 << 0)
422 #define BASE_COLOR_SIZE222 ( 2 << 0)
423 #define BASE_COLOR_SIZE333 ( 3 << 0)
424 #define BASE_COLOR_SIZE444 ( 4 << 0)
425 #define BASE_COLOR_SIZE555 ( 5 << 0)
426 #define BASE_COLOR_SIZE565 ( 6 << 0)
427 #define BASE_COLOR_SIZE332 ( 7 << 0)
428 #define BASE_COLOR_SIZE888 ( 8 << 0)
429 #define BASE_COLOR_SIZE101010 (10 << 0)
430 #define BASE_COLOR_SIZE121212 (12 << 0)
432 #define DITHER_CONTROL_DISABLE (0 << 8)
435 #define BASE_COLOR_SIZE_MASK (0xf << 0)
436 #define BASE_COLOR_SIZE_666 ( 0 << 0)
437 #define BASE_COLOR_SIZE_111 ( 1 << 0)
438 #define BASE_COLOR_SIZE_222 ( 2 << 0)
439 #define BASE_COLOR_SIZE_333 ( 3 << 0)
440 #define BASE_COLOR_SIZE_444 ( 4 << 0)
441 #define BASE_COLOR_SIZE_555 ( 5 << 0)
442 #define BASE_COLOR_SIZE_565 ( 6 << 0)
443 #define BASE_COLOR_SIZE_332 ( 7 << 0)
444 #define BASE_COLOR_SIZE_888 ( 8 << 0)
445 #define BASE_COLOR_SIZE_101010 ( 10 << 0)
446 #define BASE_COLOR_SIZE_121212 ( 12 << 0)
448 #define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
450 #define SC0_H_QUALIFIER_NONE (1 << 0)
452 #define DC_DISP_DATA_ENABLE_OPTIONS 0x432
453 #define DE_SELECT_ACTIVE_BLANK (0 << 0)
454 #define DE_SELECT_ACTIVE (1 << 0)
455 #define DE_SELECT_ACTIVE_IS (2 << 0)
456 #define DE_CONTROL_ONECLK (0 << 2)
462 #define DC_DISP_SERIAL_INTERFACE_OPTIONS 0x433
463 #define DC_DISP_LCD_SPI_OPTIONS 0x434
464 #define DC_DISP_BORDER_COLOR 0x435
465 #define DC_DISP_COLOR_KEY0_LOWER 0x436
466 #define DC_DISP_COLOR_KEY0_UPPER 0x437
467 #define DC_DISP_COLOR_KEY1_LOWER 0x438
468 #define DC_DISP_COLOR_KEY1_UPPER 0x439
470 #define DC_DISP_CURSOR_FOREGROUND 0x43c
471 #define DC_DISP_CURSOR_BACKGROUND 0x43d
473 #define DC_DISP_CURSOR_START_ADDR 0x43e
474 #define CURSOR_CLIP_DISPLAY (0 << 28)
478 #define CURSOR_SIZE_32x32 (0 << 24)
482 #define DC_DISP_CURSOR_START_ADDR_NS 0x43f
484 #define DC_DISP_CURSOR_POSITION 0x440
485 #define DC_DISP_CURSOR_POSITION_NS 0x441
487 #define DC_DISP_INIT_SEQ_CONTROL 0x442
488 #define DC_DISP_SPI_INIT_SEQ_DATA_A 0x443
489 #define DC_DISP_SPI_INIT_SEQ_DATA_B 0x444
490 #define DC_DISP_SPI_INIT_SEQ_DATA_C 0x445
491 #define DC_DISP_SPI_INIT_SEQ_DATA_D 0x446
493 #define DC_DISP_DC_MCCIF_FIFOCTRL 0x480
494 #define DC_DISP_MCCIF_DISPLAY0A_HYST 0x481
495 #define DC_DISP_MCCIF_DISPLAY0B_HYST 0x482
496 #define DC_DISP_MCCIF_DISPLAY1A_HYST 0x483
497 #define DC_DISP_MCCIF_DISPLAY1B_HYST 0x484
499 #define DC_DISP_DAC_CRT_CTRL 0x4c0
500 #define DC_DISP_DISP_MISC_CONTROL 0x4c1
501 #define DC_DISP_SD_CONTROL 0x4c2
502 #define DC_DISP_SD_CSC_COEFF 0x4c3
503 #define DC_DISP_SD_LUT(x) (0x4c4 + (x))
504 #define DC_DISP_SD_FLICKER_CONTROL 0x4cd
505 #define DC_DISP_DC_PIXEL_COUNT 0x4ce
506 #define DC_DISP_SD_HISTOGRAM(x) (0x4cf + (x))
507 #define DC_DISP_SD_BL_PARAMETERS 0x4d7
508 #define DC_DISP_SD_BL_TF(x) (0x4d8 + (x))
509 #define DC_DISP_SD_BL_CONTROL 0x4dc
510 #define DC_DISP_SD_HW_K_VALUES 0x4dd
511 #define DC_DISP_SD_MAN_K_VALUES 0x4de
513 #define DC_DISP_BLEND_BACKGROUND_COLOR 0x4e4
514 #define BACKGROUND_COLOR_ALPHA(x) (((x) & 0xff) << 24)
515 #define BACKGROUND_COLOR_BLUE(x) (((x) & 0xff) << 16)
516 #define BACKGROUND_COLOR_GREEN(x) (((x) & 0xff) << 8)
517 #define BACKGROUND_COLOR_RED(x) (((x) & 0xff) << 0)
519 #define DC_DISP_INTERLACE_CONTROL 0x4e5
522 #define INTERLACE_ENABLE (1 << 0)
524 #define DC_DISP_CURSOR_START_ADDR_HI 0x4ec
525 #define DC_DISP_BLEND_CURSOR_CONTROL 0x4f1
526 #define CURSOR_COMPOSITION_MODE_BLEND (0 << 25)
528 #define CURSOR_MODE_LEGACY (0 << 24)
530 #define CURSOR_DST_BLEND_ZERO (0 << 16)
534 #define CURSOR_SRC_BLEND_K1 (0 << 8)
537 #define CURSOR_ALPHA 0xff
539 #define DC_WIN_CORE_ACT_CONTROL 0x50e
540 #define VCOUNTER (0 << 0)
541 #define HCOUNTER (1 << 0)
543 #define DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA 0x543
546 #define DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB 0x544
547 #define WATERMARK_MASK 0x1fffffff
549 #define DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER 0x560
550 #define PIPE_METER_INT(x) (((x) & 0xff) << 8)
551 #define PIPE_METER_FRAC(x) (((x) & 0xff) << 0)
553 #define DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG 0x561
554 #define MEMPOOL_ENTRIES(x) (((x) & 0xffff) << 0)
556 #define DC_WIN_CORE_IHUB_WGRP_FETCH_METER 0x562
557 #define SLOTS(x) (((x) & 0xff) << 0)
559 #define DC_WIN_CORE_IHUB_LINEBUF_CONFIG 0x563
560 #define MODE_TWO_LINES (0 << 14)
563 #define DC_WIN_CORE_IHUB_THREAD_GROUP 0x568
564 #define THREAD_NUM_MASK (0x1f << 1)
565 #define THREAD_NUM(x) (((x) & 0x1f) << 1)
566 #define THREAD_GROUP_ENABLE (1 << 0)
568 #define DC_WIN_H_FILTER_P(p) (0x601 + (p))
569 #define DC_WIN_V_FILTER_P(p) (0x619 + (p))
571 #define DC_WIN_CSC_YOF 0x611
572 #define DC_WIN_CSC_KYRGB 0x612
573 #define DC_WIN_CSC_KUR 0x613
574 #define DC_WIN_CSC_KVR 0x614
575 #define DC_WIN_CSC_KUG 0x615
576 #define DC_WIN_CSC_KVG 0x616
577 #define DC_WIN_CSC_KUB 0x617
578 #define DC_WIN_CSC_KVB 0x618
580 #define DC_WIN_WIN_OPTIONS 0x700
581 #define H_DIRECTION (1 << 0)
589 #define DC_WIN_BYTE_SWAP 0x701
590 #define BYTE_SWAP_NOSWAP (0 << 0)
591 #define BYTE_SWAP_SWAP2 (1 << 0)
592 #define BYTE_SWAP_SWAP4 (2 << 0)
593 #define BYTE_SWAP_SWAP4HW (3 << 0)
595 #define DC_WIN_BUFFER_CONTROL 0x702
596 #define BUFFER_CONTROL_HOST (0 << 0)
597 #define BUFFER_CONTROL_VI (1 << 0)
598 #define BUFFER_CONTROL_EPP (2 << 0)
599 #define BUFFER_CONTROL_MPEGE (3 << 0)
600 #define BUFFER_CONTROL_SB2D (4 << 0)
602 #define DC_WIN_COLOR_DEPTH 0x703
603 #define WIN_COLOR_DEPTH_P1 0
640 #define DC_WIN_POSITION 0x704
641 #define H_POSITION(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */
642 #define V_POSITION(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
644 #define DC_WIN_SIZE 0x705
645 #define H_SIZE(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */
646 #define V_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
648 #define DC_WIN_PRESCALED_SIZE 0x706
649 #define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0)
650 #define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
652 #define DC_WIN_H_INITIAL_DDA 0x707
653 #define DC_WIN_V_INITIAL_DDA 0x708
654 #define DC_WIN_DDA_INC 0x709
655 #define H_DDA_INC(x) (((x) & 0xffff) << 0)
656 #define V_DDA_INC(x) (((x) & 0xffff) << 16)
658 #define DC_WIN_LINE_STRIDE 0x70a
659 #define DC_WIN_BUF_STRIDE 0x70b
660 #define DC_WIN_UV_BUF_STRIDE 0x70c
661 #define DC_WIN_BUFFER_ADDR_MODE 0x70d
662 #define DC_WIN_BUFFER_ADDR_MODE_LINEAR (0 << 0)
663 #define DC_WIN_BUFFER_ADDR_MODE_TILE (1 << 0)
664 #define DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV (0 << 16)
667 #define DC_WIN_DV_CONTROL 0x70e
669 #define DC_WIN_BLEND_NOKEY 0x70f
670 #define BLEND_WEIGHT1(x) (((x) & 0xff) << 16)
671 #define BLEND_WEIGHT0(x) (((x) & 0xff) << 8)
673 #define DC_WIN_BLEND_1WIN 0x710
674 #define BLEND_CONTROL_FIX (0 << 2)
676 #define BLEND_COLOR_KEY_NONE (0 << 0)
677 #define BLEND_COLOR_KEY_0 (1 << 0)
678 #define BLEND_COLOR_KEY_1 (2 << 0)
679 #define BLEND_COLOR_KEY_BOTH (3 << 0)
681 #define DC_WIN_BLEND_2WIN_X 0x711
684 #define DC_WIN_BLEND_2WIN_Y 0x712
685 #define DC_WIN_BLEND_3WIN_XY 0x713
687 #define DC_WIN_HP_FETCH_CONTROL 0x714
689 #define DC_WINBUF_START_ADDR 0x800
690 #define DC_WINBUF_START_ADDR_NS 0x801
691 #define DC_WINBUF_START_ADDR_U 0x802
692 #define DC_WINBUF_START_ADDR_U_NS 0x803
693 #define DC_WINBUF_START_ADDR_V 0x804
694 #define DC_WINBUF_START_ADDR_V_NS 0x805
696 #define DC_WINBUF_ADDR_H_OFFSET 0x806
697 #define DC_WINBUF_ADDR_H_OFFSET_NS 0x807
698 #define DC_WINBUF_ADDR_V_OFFSET 0x808
699 #define DC_WINBUF_ADDR_V_OFFSET_NS 0x809
701 #define DC_WINBUF_UFLOW_STATUS 0x80a
702 #define DC_WINBUF_SURFACE_KIND 0x80b
703 #define DC_WINBUF_SURFACE_KIND_PITCH (0 << 0)
704 #define DC_WINBUF_SURFACE_KIND_TILED (1 << 0)
705 #define DC_WINBUF_SURFACE_KIND_BLOCK (2 << 0)
706 #define DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT(x) (((x) & 0x7) << 4)
708 #define DC_WINBUF_START_ADDR_HI 0x80d
710 #define DC_WINBUF_START_ADDR_HI_U 0x80f
711 #define DC_WINBUF_START_ADDR_HI_V 0x811
713 #define DC_WINBUF_CDE_CONTROL 0x82f
714 #define ENABLE_SURFACE (1 << 0)
716 #define DC_WINBUF_AD_UFLOW_STATUS 0xbca
717 #define DC_WINBUF_BD_UFLOW_STATUS 0xdca
718 #define DC_WINBUF_CD_UFLOW_STATUS 0xfca
721 #define DC_DISP_CORE_SOR_SET_CONTROL(x) (0x403 + (x))
722 #define PROTOCOL_MASK (0xf << 8)
723 #define PROTOCOL_SINGLE_TMDS_A (0x1 << 8)
725 #define DC_DISP_PCALC_HEAD_SET_CROPPED_POINT_IN_CURSOR 0x442
726 #define DC_DISP_PCALC_HEAD_SET_CROPPED_SIZE_IN_CURSOR 0x446
728 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPA 0x500
729 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPB 0x501
730 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPC 0x502
731 #define MAX_PIXELS_5TAP444(x) ((x) & 0xffff)
732 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPD 0x503
733 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPE 0x504
734 #define MAX_PIXELS_2TAP444(x) ((x) & 0xffff)
735 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPF 0x505
737 #define DC_WIN_CORE_WINDOWGROUP_SET_CONTROL 0x702
738 #define OWNER_MASK (0xf << 0)
739 #define OWNER(x) (((x) & 0xf) << 0)
741 #define DC_WIN_CROPPED_SIZE 0x706
743 #define DC_WIN_SET_INPUT_SCALER_H_START_PHASE 0x707
744 #define DC_WIN_SET_INPUT_SCALER_V_START_PHASE 0x708
746 #define DC_WIN_PLANAR_STORAGE 0x709
747 #define PITCH(x) (((x) >> 6) & 0x1fff)
749 #define DC_WIN_PLANAR_STORAGE_UV 0x70a
750 #define PITCH_U(x) ((((x) >> 6) & 0x1fff) << 0)
751 #define PITCH_V(x) ((((x) >> 6) & 0x1fff) << 16)
753 #define DC_WIN_SET_INPUT_SCALER_HPHASE_INCR 0x70b
754 #define DC_WIN_SET_INPUT_SCALER_VPHASE_INCR 0x70c
756 #define DC_WIN_SET_PARAMS 0x70d
758 #define DEGAMMA_NONE (0 << 13)
762 #define INPUT_RANGE_BYPASS (0 << 10)
765 #define COLOR_SPACE_RGB (0 << 8)
770 #define DC_WIN_WINDOWGROUP_SET_CONTROL_INPUT_SCALER 0x70e
773 #define VERTICAL_TAPS_2 (1 << 0)
774 #define VERTICAL_TAPS_5 (4 << 0)
776 #define DC_WIN_WINDOWGROUP_SET_INPUT_SCALER_COEFF 0x70f
777 #define COEFF_INDEX(x) (((x) & 0xff) << 15)
778 #define COEFF_DATA(x) (((x) & 0x3ff) << 0)
780 #define DC_WIN_WINDOWGROUP_SET_INPUT_SCALER_USAGE 0x711
783 #define INPUT_SCALER_HBYPASS (1 << 0)
785 #define DC_WIN_BLEND_LAYER_CONTROL 0x716
786 #define COLOR_KEY_NONE (0 << 25)
790 #define K2(x) (((x) & 0xff) << 16)
791 #define K1(x) (((x) & 0xff) << 8)
792 #define WINDOW_LAYER_DEPTH(x) (((x) & 0xff) << 0)
794 #define DC_WIN_BLEND_MATCH_SELECT 0x717
795 #define BLEND_FACTOR_DST_ALPHA_ZERO (0 << 12)
799 #define BLEND_FACTOR_SRC_ALPHA_ZERO (0 << 8)
803 #define BLEND_FACTOR_DST_COLOR_ZERO (0 << 4)
811 #define BLEND_FACTOR_SRC_COLOR_ZERO (0 << 0)
812 #define BLEND_FACTOR_SRC_COLOR_ONE (1 << 0)
813 #define BLEND_FACTOR_SRC_COLOR_K1 (2 << 0)
814 #define BLEND_FACTOR_SRC_COLOR_K1_TIMES_DST (3 << 0)
815 #define BLEND_FACTOR_SRC_COLOR_NEG_K1_TIMES_DST (4 << 0)
816 #define BLEND_FACTOR_SRC_COLOR_K1_TIMES_SRC (5 << 0)
818 #define DC_WIN_BLEND_NOMATCH_SELECT 0x718
820 #define DC_WIN_PRECOMP_WGRP_PARAMS 0x724
821 #define SWAP_UV (1 << 0)
823 #define DC_WIN_WINDOW_SET_CONTROL 0x730
826 #define DC_WINBUF_CROPPED_POINT 0x806
827 #define OFFSET_Y(x) (((x) & 0xffff) << 16)
828 #define OFFSET_X(x) (((x) & 0xffff) << 0)