Lines Matching full:phy
127 struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_config_a83t() argument
130 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_hdmi_phy_config_a83t()
189 struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_config_h3() argument
257 SUN8I_HDMI_PHY_ANA_CFG2_REG_RESDI(phy->rcal); in sun8i_hdmi_phy_config_h3()
267 SUN8I_HDMI_PHY_ANA_CFG2_REG_RESDI(phy->rcal); in sun8i_hdmi_phy_config_h3()
293 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_config_h3()
297 * NOTE: We have to be careful not to overwrite PHY parent in sun8i_hdmi_phy_config_h3()
300 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_config_h3()
303 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, in sun8i_hdmi_phy_config_h3()
307 regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG3_REG, in sun8i_hdmi_phy_config_h3()
309 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_config_h3()
315 regmap_read(phy->regs, SUN8I_HDMI_PHY_ANA_STS_REG, &val); in sun8i_hdmi_phy_config_h3()
320 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_config_h3()
325 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_config_h3()
329 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, ana_cfg1_end); in sun8i_hdmi_phy_config_h3()
330 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG2_REG, ana_cfg2_init); in sun8i_hdmi_phy_config_h3()
331 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG3_REG, ana_cfg3_init); in sun8i_hdmi_phy_config_h3()
340 struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; in sun8i_hdmi_phy_config() local
349 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG, in sun8i_hdmi_phy_config()
352 if (phy->variant->has_phy_clk) in sun8i_hdmi_phy_config()
353 clk_set_rate(phy->clk_phy, mode->crtc_clock * 1000); in sun8i_hdmi_phy_config()
355 return phy->variant->phy_config(hdmi, phy, mode->crtc_clock * 1000); in sun8i_hdmi_phy_config()
359 struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_disable_a83t() argument
364 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_hdmi_phy_disable_a83t()
369 struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_disable_h3() argument
371 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_disable_h3()
375 regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, 0); in sun8i_hdmi_phy_disable_h3()
380 struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; in sun8i_hdmi_phy_disable() local
382 phy->variant->phy_disable(hdmi, phy); in sun8i_hdmi_phy_disable()
393 static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_unlock() argument
396 regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG, in sun8i_hdmi_phy_unlock()
400 regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG, in sun8i_hdmi_phy_unlock()
404 static void sun50i_hdmi_phy_init_h6(struct sun8i_hdmi_phy *phy) in sun50i_hdmi_phy_init_h6() argument
406 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun50i_hdmi_phy_init_h6()
410 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun50i_hdmi_phy_init_h6()
414 static void sun8i_hdmi_phy_init_a83t(struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_init_a83t() argument
416 sun8i_hdmi_phy_unlock(phy); in sun8i_hdmi_phy_init_a83t()
418 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG, in sun8i_hdmi_phy_init_a83t()
423 * Set PHY I2C address. It must match to the address set by in sun8i_hdmi_phy_init_a83t()
426 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG, in sun8i_hdmi_phy_init_a83t()
431 static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_init_h3() argument
435 sun8i_hdmi_phy_unlock(phy); in sun8i_hdmi_phy_init_h3()
437 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0); in sun8i_hdmi_phy_init_h3()
438 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
442 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
445 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
449 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
453 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
457 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
461 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
464 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
473 regmap_read_poll_timeout(phy->regs, SUN8I_HDMI_PHY_ANA_STS_REG, val, in sun8i_hdmi_phy_init_h3()
477 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
480 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
491 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG3_REG, in sun8i_hdmi_phy_init_h3()
497 /* reset PHY PLL clock parent */ in sun8i_hdmi_phy_init_h3()
498 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_init_h3()
502 regmap_write(phy->regs, SUN8I_HDMI_PHY_CEC_REG, 0); in sun8i_hdmi_phy_init_h3()
505 regmap_read(phy->regs, SUN8I_HDMI_PHY_ANA_STS_REG, &val); in sun8i_hdmi_phy_init_h3()
506 phy->rcal = (val & SUN8I_HDMI_PHY_ANA_STS_RCAL_MASK) >> 2; in sun8i_hdmi_phy_init_h3()
509 int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_init() argument
513 ret = reset_control_deassert(phy->rst_phy); in sun8i_hdmi_phy_init()
515 dev_err(phy->dev, "Cannot deassert phy reset control: %d\n", ret); in sun8i_hdmi_phy_init()
519 ret = clk_prepare_enable(phy->clk_bus); in sun8i_hdmi_phy_init()
521 dev_err(phy->dev, "Cannot enable bus clock: %d\n", ret); in sun8i_hdmi_phy_init()
525 ret = clk_prepare_enable(phy->clk_mod); in sun8i_hdmi_phy_init()
527 dev_err(phy->dev, "Cannot enable mod clock: %d\n", ret); in sun8i_hdmi_phy_init()
531 if (phy->variant->has_phy_clk) { in sun8i_hdmi_phy_init()
532 ret = sun8i_phy_clk_create(phy, phy->dev, in sun8i_hdmi_phy_init()
533 phy->variant->has_second_pll); in sun8i_hdmi_phy_init()
535 dev_err(phy->dev, "Couldn't create the PHY clock\n"); in sun8i_hdmi_phy_init()
539 clk_prepare_enable(phy->clk_phy); in sun8i_hdmi_phy_init()
542 phy->variant->phy_init(phy); in sun8i_hdmi_phy_init()
547 clk_disable_unprepare(phy->clk_mod); in sun8i_hdmi_phy_init()
549 clk_disable_unprepare(phy->clk_bus); in sun8i_hdmi_phy_init()
551 reset_control_assert(phy->rst_phy); in sun8i_hdmi_phy_init()
556 void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy) in sun8i_hdmi_phy_deinit() argument
558 clk_disable_unprepare(phy->clk_mod); in sun8i_hdmi_phy_deinit()
559 clk_disable_unprepare(phy->clk_bus); in sun8i_hdmi_phy_deinit()
560 clk_disable_unprepare(phy->clk_phy); in sun8i_hdmi_phy_deinit()
562 reset_control_assert(phy->rst_phy); in sun8i_hdmi_phy_deinit()
565 void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_set_ops() argument
568 struct sun8i_hdmi_phy_variant *variant = phy->variant; in sun8i_hdmi_phy_set_ops()
573 plat_data->phy_data = phy; in sun8i_hdmi_phy_set_ops()
586 .name = "phy"
630 .compatible = "allwinner,sun8i-a83t-hdmi-phy",
634 .compatible = "allwinner,sun8i-h3-hdmi-phy",
638 .compatible = "allwinner,sun8i-r40-hdmi-phy",
642 .compatible = "allwinner,sun50i-a64-hdmi-phy",
646 .compatible = "allwinner,sun50i-h6-hdmi-phy",
655 struct sun8i_hdmi_phy *phy; in sun8i_hdmi_phy_get() local
660 phy = platform_get_drvdata(pdev); in sun8i_hdmi_phy_get()
661 if (!phy) in sun8i_hdmi_phy_get()
664 hdmi->phy = phy; in sun8i_hdmi_phy_get()
676 struct sun8i_hdmi_phy *phy; in sun8i_hdmi_phy_probe() local
683 dev_err(dev, "Incompatible HDMI PHY\n"); in sun8i_hdmi_phy_probe()
687 phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL); in sun8i_hdmi_phy_probe()
688 if (!phy) in sun8i_hdmi_phy_probe()
691 phy->variant = (struct sun8i_hdmi_phy_variant *)match->data; in sun8i_hdmi_phy_probe()
692 phy->dev = dev; in sun8i_hdmi_phy_probe()
696 dev_err(dev, "phy: Couldn't get our resources\n"); in sun8i_hdmi_phy_probe()
702 dev_err(dev, "Couldn't map the HDMI PHY registers\n"); in sun8i_hdmi_phy_probe()
706 phy->regs = devm_regmap_init_mmio(dev, regs, in sun8i_hdmi_phy_probe()
708 if (IS_ERR(phy->regs)) { in sun8i_hdmi_phy_probe()
709 dev_err(dev, "Couldn't create the HDMI PHY regmap\n"); in sun8i_hdmi_phy_probe()
710 return PTR_ERR(phy->regs); in sun8i_hdmi_phy_probe()
713 phy->clk_bus = of_clk_get_by_name(node, "bus"); in sun8i_hdmi_phy_probe()
714 if (IS_ERR(phy->clk_bus)) { in sun8i_hdmi_phy_probe()
716 return PTR_ERR(phy->clk_bus); in sun8i_hdmi_phy_probe()
719 phy->clk_mod = of_clk_get_by_name(node, "mod"); in sun8i_hdmi_phy_probe()
720 if (IS_ERR(phy->clk_mod)) { in sun8i_hdmi_phy_probe()
722 ret = PTR_ERR(phy->clk_mod); in sun8i_hdmi_phy_probe()
726 if (phy->variant->has_phy_clk) { in sun8i_hdmi_phy_probe()
727 phy->clk_pll0 = of_clk_get_by_name(node, "pll-0"); in sun8i_hdmi_phy_probe()
728 if (IS_ERR(phy->clk_pll0)) { in sun8i_hdmi_phy_probe()
730 ret = PTR_ERR(phy->clk_pll0); in sun8i_hdmi_phy_probe()
734 if (phy->variant->has_second_pll) { in sun8i_hdmi_phy_probe()
735 phy->clk_pll1 = of_clk_get_by_name(node, "pll-1"); in sun8i_hdmi_phy_probe()
736 if (IS_ERR(phy->clk_pll1)) { in sun8i_hdmi_phy_probe()
738 ret = PTR_ERR(phy->clk_pll1); in sun8i_hdmi_phy_probe()
744 phy->rst_phy = of_reset_control_get_shared(node, "phy"); in sun8i_hdmi_phy_probe()
745 if (IS_ERR(phy->rst_phy)) { in sun8i_hdmi_phy_probe()
746 dev_err(dev, "Could not get phy reset control\n"); in sun8i_hdmi_phy_probe()
747 ret = PTR_ERR(phy->rst_phy); in sun8i_hdmi_phy_probe()
751 platform_set_drvdata(pdev, phy); in sun8i_hdmi_phy_probe()
756 clk_put(phy->clk_pll1); in sun8i_hdmi_phy_probe()
758 clk_put(phy->clk_pll0); in sun8i_hdmi_phy_probe()
760 clk_put(phy->clk_mod); in sun8i_hdmi_phy_probe()
762 clk_put(phy->clk_bus); in sun8i_hdmi_phy_probe()
769 struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev); in sun8i_hdmi_phy_remove() local
771 reset_control_put(phy->rst_phy); in sun8i_hdmi_phy_remove()
773 clk_put(phy->clk_pll0); in sun8i_hdmi_phy_remove()
774 clk_put(phy->clk_pll1); in sun8i_hdmi_phy_remove()
775 clk_put(phy->clk_mod); in sun8i_hdmi_phy_remove()
776 clk_put(phy->clk_bus); in sun8i_hdmi_phy_remove()
784 .name = "sun8i-hdmi-phy",