1 // SPDX-License-Identifier: GPL-2.0-or-later
6  * Maxime Ripard <maxime.ripard@free-electrons.com>
14 #include <linux/dma-mapping.h>
34 	/* backend <-> TCON muxing selection done in backend */
54 	regmap_write(engine->regs, SUN4I_BACKEND_OCCTL_REG,  in sun4i_backend_apply_color_correction()
58 		regmap_write(engine->regs, SUN4I_BACKEND_OCRCOEF_REG(i),  in sun4i_backend_apply_color_correction()
67 	regmap_update_bits(engine->regs, SUN4I_BACKEND_OCCTL_REG,  in sun4i_backend_disable_color_correction()
75 	regmap_write(engine->regs, SUN4I_BACKEND_REGBUFFCTL_REG,  in sun4i_backend_commit()
80 void sun4i_backend_layer_enable(struct sun4i_backend *backend,  in sun4i_backend_layer_enable()  argument
93 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_layer_enable()
133 		return -EINVAL;  in sun4i_backend_drm_format_to_layer()
168 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,  in sun4i_backend_update_layer_coord()  argument
171 	struct drm_plane_state *state = plane->state;  in sun4i_backend_update_layer_coord()
175 	if (plane->type == DRM_PLANE_TYPE_PRIMARY) {  in sun4i_backend_update_layer_coord()
177 				 state->crtc_w, state->crtc_h);  in sun4i_backend_update_layer_coord()
178 		regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG,  in sun4i_backend_update_layer_coord()
179 			     SUN4I_BACKEND_DISSIZE(state->crtc_w,  in sun4i_backend_update_layer_coord()
180 						   state->crtc_h));  in sun4i_backend_update_layer_coord()
185 			 state->crtc_w, state->crtc_h);  in sun4i_backend_update_layer_coord()
186 	regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYSIZE_REG(layer),  in sun4i_backend_update_layer_coord()
187 		     SUN4I_BACKEND_LAYSIZE(state->crtc_w,  in sun4i_backend_update_layer_coord()
188 					   state->crtc_h));  in sun4i_backend_update_layer_coord()
192 			 state->crtc_x, state->crtc_y);  in sun4i_backend_update_layer_coord()
193 	regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYCOOR_REG(layer),  in sun4i_backend_update_layer_coord()
194 		     SUN4I_BACKEND_LAYCOOR(state->crtc_x,  in sun4i_backend_update_layer_coord()
195 					   state->crtc_y));  in sun4i_backend_update_layer_coord()
200 static int sun4i_backend_update_yuv_format(struct sun4i_backend *backend,  in sun4i_backend_update_yuv_format()  argument
203 	struct drm_plane_state *state = plane->state;  in sun4i_backend_update_yuv_format()
204 	struct drm_framebuffer *fb = state->fb;  in sun4i_backend_update_yuv_format()
205 	const struct drm_format_info *format = fb->format;  in sun4i_backend_update_yuv_format()
206 	const uint32_t fmt = format->format;  in sun4i_backend_update_yuv_format()
211 		regmap_write(backend->engine.regs,  in sun4i_backend_update_yuv_format()
219 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_yuv_format()
223 	/* TODO: Add support for the multi-planar YUV formats */  in sun4i_backend_update_yuv_format()
252 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVCTL_REG, val);  in sun4i_backend_update_yuv_format()
257 int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,  in sun4i_backend_update_layer_formats()  argument
260 	struct drm_plane_state *state = plane->state;  in sun4i_backend_update_layer_formats()
261 	struct drm_framebuffer *fb = state->fb;  in sun4i_backend_update_layer_formats()
267 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_layer_formats()
270 	if (plane->state->crtc)  in sun4i_backend_update_layer_formats()
271 		interlaced = plane->state->crtc->state->adjusted_mode.flags  in sun4i_backend_update_layer_formats()
274 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_update_layer_formats()
278 	DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",  in sun4i_backend_update_layer_formats()
281 	val = SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(state->alpha >> 8);  in sun4i_backend_update_layer_formats()
282 	if (state->alpha != DRM_BLEND_ALPHA_OPAQUE)  in sun4i_backend_update_layer_formats()
284 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_formats()
290 	if (fb->format->is_yuv)  in sun4i_backend_update_layer_formats()
291 		return sun4i_backend_update_yuv_format(backend, layer, plane);  in sun4i_backend_update_layer_formats()
293 	ret = sun4i_backend_drm_format_to_layer(fb->format->format, &val);  in sun4i_backend_update_layer_formats()
299 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_formats()
306 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,  in sun4i_backend_update_layer_frontend()  argument
318 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_frontend()
323 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_frontend()
330 static int sun4i_backend_update_yuv_buffer(struct sun4i_backend *backend,  in sun4i_backend_update_yuv_buffer()  argument
334 	/* TODO: Add support for the multi-planar YUV formats */  in sun4i_backend_update_yuv_buffer()
336 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVADD_REG(0), paddr);  in sun4i_backend_update_yuv_buffer()
338 	DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8);  in sun4i_backend_update_yuv_buffer()
339 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVLINEWIDTH_REG(0),  in sun4i_backend_update_yuv_buffer()
340 		     fb->pitches[0] * 8);  in sun4i_backend_update_yuv_buffer()
345 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,  in sun4i_backend_update_layer_buffer()  argument
348 	struct drm_plane_state *state = plane->state;  in sun4i_backend_update_layer_buffer()
349 	struct drm_framebuffer *fb = state->fb;  in sun4i_backend_update_layer_buffer()
354 	DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8);  in sun4i_backend_update_layer_buffer()
355 	regmap_write(backend->engine.regs,  in sun4i_backend_update_layer_buffer()
357 		     fb->pitches[0] * 8);  in sun4i_backend_update_layer_buffer()
363 	if (fb->format->is_yuv)  in sun4i_backend_update_layer_buffer()
364 		return sun4i_backend_update_yuv_buffer(backend, fb, paddr);  in sun4i_backend_update_layer_buffer()
369 	regmap_write(backend->engine.regs,  in sun4i_backend_update_layer_buffer()
376 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG,  in sun4i_backend_update_layer_buffer()
383 int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend, int layer,  in sun4i_backend_update_layer_zpos()  argument
386 	struct drm_plane_state *state = plane->state;  in sun4i_backend_update_layer_zpos()
388 	unsigned int priority = state->normalized_zpos;  in sun4i_backend_update_layer_zpos()
389 	unsigned int pipe = p_state->pipe;  in sun4i_backend_update_layer_zpos()
393 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_layer_zpos()
396 			   SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(p_state->pipe) |  in sun4i_backend_update_layer_zpos()
402 void sun4i_backend_cleanup_layer(struct sun4i_backend *backend,  in sun4i_backend_cleanup_layer()  argument
405 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_cleanup_layer()
413 	u16 src_h = state->src_h >> 16;  in sun4i_backend_plane_uses_scaler()
414 	u16 src_w = state->src_w >> 16;  in sun4i_backend_plane_uses_scaler()
417 			 src_w, src_h, state->crtc_w, state->crtc_h);  in sun4i_backend_plane_uses_scaler()
419 	if ((state->crtc_h != src_h) || (state->crtc_w != src_w))  in sun4i_backend_plane_uses_scaler()
427 	struct sun4i_layer *layer = plane_to_sun4i_layer(state->plane);  in sun4i_backend_plane_uses_frontend()
428 	struct sun4i_backend *backend = layer->backend;  in sun4i_backend_plane_uses_frontend()  local
429 	uint32_t format = state->fb->format->format;  in sun4i_backend_plane_uses_frontend()
430 	uint64_t modifier = state->fb->modifier;  in sun4i_backend_plane_uses_frontend()
432 	if (IS_ERR(backend->frontend))  in sun4i_backend_plane_uses_frontend()
442 	 * TODO: The backend alone allows 2x and 4x integer scaling, including  in sun4i_backend_plane_uses_frontend()
444 	 * Use the backend directly instead of the frontend in this case, with  in sun4i_backend_plane_uses_frontend()
452 	 * Here the format is supported by both the frontend and the backend  in sun4i_backend_plane_uses_frontend()
453 	 * and no frontend scaling is required, so use the backend directly.  in sun4i_backend_plane_uses_frontend()
480 	WARN_ON(regmap_read_poll_timeout(engine->regs,  in sun4i_backend_atomic_begin()
490 	struct sun4i_backend *backend = engine_to_sun4i_backend(engine);  in sun4i_backend_atomic_check()  local
491 	struct drm_atomic_state *state = crtc_state->state;  in sun4i_backend_atomic_check()
492 	struct drm_device *drm = state->dev;  in sun4i_backend_atomic_check()
504 	if (!crtc_state->planes_changed)  in sun4i_backend_atomic_check()
507 	drm_for_each_plane_mask(plane, drm, crtc_state->plane_mask) {  in sun4i_backend_atomic_check()
512 		struct drm_framebuffer *fb = plane_state->fb;  in sun4i_backend_atomic_check()
515 						      &layer_state->uses_frontend))  in sun4i_backend_atomic_check()
516 			return -EINVAL;  in sun4i_backend_atomic_check()
518 		if (layer_state->uses_frontend) {  in sun4i_backend_atomic_check()
520 					 plane->index);  in sun4i_backend_atomic_check()
523 			if (fb->format->is_yuv) {  in sun4i_backend_atomic_check()
530 				 &fb->format->format);  in sun4i_backend_atomic_check()
531 		if (fb->format->has_alpha || (plane_state->alpha != DRM_BLEND_ALPHA_OPAQUE))  in sun4i_backend_atomic_check()
535 				 plane_state->normalized_zpos);  in sun4i_backend_atomic_check()
538 		plane_states[plane_state->normalized_zpos] = plane_state;  in sun4i_backend_atomic_check()
562 	 * This two-step scenario makes us unable to guarantee a  in sun4i_backend_atomic_check()
570 	 * discard the pixel data entirely and just display the pixels  in sun4i_backend_atomic_check()
581 	if (backend->quirks->supports_lowest_plane_alpha)  in sun4i_backend_atomic_check()
586 		return -EINVAL;  in sun4i_backend_atomic_check()
590 	if (!backend->quirks->supports_lowest_plane_alpha &&  in sun4i_backend_atomic_check()
591 	    (plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE))  in sun4i_backend_atomic_check()
592 		return -EINVAL;  in sun4i_backend_atomic_check()
596 		struct drm_framebuffer *fb = p_state->fb;  in sun4i_backend_atomic_check()
603 		if (fb->format->has_alpha || (p_state->alpha != DRM_BLEND_ALPHA_OPAQUE))  in sun4i_backend_atomic_check()
606 		s_state->pipe = current_pipe;  in sun4i_backend_atomic_check()
612 		return -EINVAL;  in sun4i_backend_atomic_check()
617 		return -EINVAL;  in sun4i_backend_atomic_check()
629 	struct sun4i_backend *backend = engine_to_sun4i_backend(engine);  in sun4i_backend_vblank_quirk()  local
630 	struct sun4i_frontend *frontend = backend->frontend;  in sun4i_backend_vblank_quirk()
640 	 * This is due to the fact that the backend will not take into  in sun4i_backend_vblank_quirk()
649 	spin_lock(&backend->frontend_lock);  in sun4i_backend_vblank_quirk()
650 	if (backend->frontend_teardown) {  in sun4i_backend_vblank_quirk()
652 		backend->frontend_teardown = false;  in sun4i_backend_vblank_quirk()
654 	spin_unlock(&backend->frontend_lock);  in sun4i_backend_vblank_quirk()
658 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_init_sat()  local
661 	backend->sat_reset = devm_reset_control_get(dev, "sat");  in sun4i_backend_init_sat()
662 	if (IS_ERR(backend->sat_reset)) {  in sun4i_backend_init_sat()
664 		return PTR_ERR(backend->sat_reset);  in sun4i_backend_init_sat()
667 	ret = reset_control_deassert(backend->sat_reset);  in sun4i_backend_init_sat()
673 	backend->sat_clk = devm_clk_get(dev, "sat");  in sun4i_backend_init_sat()
674 	if (IS_ERR(backend->sat_clk)) {  in sun4i_backend_init_sat()
676 		ret = PTR_ERR(backend->sat_clk);  in sun4i_backend_init_sat()
680 	ret = clk_prepare_enable(backend->sat_clk);  in sun4i_backend_init_sat()
689 	reset_control_assert(backend->sat_reset);  in sun4i_backend_init_sat()
694 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_free_sat()  local
696 	clk_disable_unprepare(backend->sat_clk);  in sun4i_backend_free_sat()
697 	reset_control_assert(backend->sat_reset);  in sun4i_backend_free_sat()
703  * The display backend can take video output from the display frontend, or
704  * the display enhancement unit on the A80, as input for one it its layers.
705  * This relationship within the display pipeline is encoded in the device
706  * tree with of_graph, and we use it here to figure out which backend, if
716 	ep = of_graph_get_endpoint_by_regs(node, 0, -1);  in sun4i_backend_of_get_id()
718 		return -EINVAL;  in sun4i_backend_of_get_id()
723 		return -EINVAL;  in sun4i_backend_of_get_id()
739 		return ERR_PTR(-EINVAL);  in sun4i_backend_find_frontend()
748 		list_for_each_entry(frontend, &drv->frontend_list, list) {  in sun4i_backend_find_frontend()
749 			if (remote == frontend->node) {  in sun4i_backend_find_frontend()
757 	return ERR_PTR(-EINVAL);  in sun4i_backend_find_frontend()
782 	struct sun4i_drv *drv = drm->dev_private;  in sun4i_backend_bind()
783 	struct sun4i_backend *backend;  in sun4i_backend_bind()  local
789 	backend = devm_kzalloc(dev, sizeof(*backend), GFP_KERNEL);  in sun4i_backend_bind()
790 	if (!backend)  in sun4i_backend_bind()
791 		return -ENOMEM;  in sun4i_backend_bind()
792 	dev_set_drvdata(dev, backend);  in sun4i_backend_bind()
793 	spin_lock_init(&backend->frontend_lock);  in sun4i_backend_bind()
795 	if (of_find_property(dev->of_node, "interconnects", NULL)) {  in sun4i_backend_bind()
800 		 * for us, and DRM doesn't do per-device allocation either, so  in sun4i_backend_bind()
803 		ret = of_dma_configure(drm->dev, dev->of_node, true);  in sun4i_backend_bind()
808 	backend->engine.node = dev->of_node;  in sun4i_backend_bind()
809 	backend->engine.ops = &sun4i_backend_engine_ops;  in sun4i_backend_bind()
810 	backend->engine.id = sun4i_backend_of_get_id(dev->of_node);  in sun4i_backend_bind()
811 	if (backend->engine.id < 0)  in sun4i_backend_bind()
812 		return backend->engine.id;  in sun4i_backend_bind()
814 	backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node);  in sun4i_backend_bind()
815 	if (IS_ERR(backend->frontend))  in sun4i_backend_bind()
823 	backend->reset = devm_reset_control_get(dev, NULL);  in sun4i_backend_bind()
824 	if (IS_ERR(backend->reset)) {  in sun4i_backend_bind()
826 		return PTR_ERR(backend->reset);  in sun4i_backend_bind()
829 	ret = reset_control_deassert(backend->reset);  in sun4i_backend_bind()
835 	backend->bus_clk = devm_clk_get(dev, "ahb");  in sun4i_backend_bind()
836 	if (IS_ERR(backend->bus_clk)) {  in sun4i_backend_bind()
837 		dev_err(dev, "Couldn't get the backend bus clock\n");  in sun4i_backend_bind()
838 		ret = PTR_ERR(backend->bus_clk);  in sun4i_backend_bind()
841 	clk_prepare_enable(backend->bus_clk);  in sun4i_backend_bind()
843 	backend->mod_clk = devm_clk_get(dev, "mod");  in sun4i_backend_bind()
844 	if (IS_ERR(backend->mod_clk)) {  in sun4i_backend_bind()
845 		dev_err(dev, "Couldn't get the backend module clock\n");  in sun4i_backend_bind()
846 		ret = PTR_ERR(backend->mod_clk);  in sun4i_backend_bind()
850 	ret = clk_set_rate_exclusive(backend->mod_clk, 300000000);  in sun4i_backend_bind()
856 	clk_prepare_enable(backend->mod_clk);  in sun4i_backend_bind()
858 	backend->ram_clk = devm_clk_get(dev, "ram");  in sun4i_backend_bind()
859 	if (IS_ERR(backend->ram_clk)) {  in sun4i_backend_bind()
860 		dev_err(dev, "Couldn't get the backend RAM clock\n");  in sun4i_backend_bind()
861 		ret = PTR_ERR(backend->ram_clk);  in sun4i_backend_bind()
864 	clk_prepare_enable(backend->ram_clk);  in sun4i_backend_bind()
866 	if (of_device_is_compatible(dev->of_node,  in sun4i_backend_bind()
867 				    "allwinner,sun8i-a33-display-backend")) {  in sun4i_backend_bind()
875 	backend->engine.regs = devm_regmap_init_mmio(dev, regs,  in sun4i_backend_bind()
877 	if (IS_ERR(backend->engine.regs)) {  in sun4i_backend_bind()
878 		dev_err(dev, "Couldn't create the backend regmap\n");  in sun4i_backend_bind()
879 		return PTR_ERR(backend->engine.regs);  in sun4i_backend_bind()
882 	list_add_tail(&backend->engine.list, &drv->engine_list);  in sun4i_backend_bind()
885 	 * Many of the backend's layer configuration registers have  in sun4i_backend_bind()
893 		regmap_write(backend->engine.regs, i, 0);  in sun4i_backend_bind()
896 	regmap_write(backend->engine.regs, SUN4I_BACKEND_REGBUFFCTL_REG,  in sun4i_backend_bind()
899 	/* Enable the backend */  in sun4i_backend_bind()
900 	regmap_write(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_bind()
906 	if (quirks->needs_output_muxing) {  in sun4i_backend_bind()
909 		 * and TCONs, so we select the backend with same ID.  in sun4i_backend_bind()
917 		regmap_update_bits(backend->engine.regs,  in sun4i_backend_bind()
920 				   (backend->engine.id  in sun4i_backend_bind()
925 	backend->quirks = quirks;  in sun4i_backend_bind()
930 	clk_disable_unprepare(backend->ram_clk);  in sun4i_backend_bind()
932 	clk_rate_exclusive_put(backend->mod_clk);  in sun4i_backend_bind()
933 	clk_disable_unprepare(backend->mod_clk);  in sun4i_backend_bind()
935 	clk_disable_unprepare(backend->bus_clk);  in sun4i_backend_bind()
937 	reset_control_assert(backend->reset);  in sun4i_backend_bind()
944 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_unbind()  local
946 	list_del(&backend->engine.list);  in sun4i_backend_unbind()
948 	if (of_device_is_compatible(dev->of_node,  in sun4i_backend_unbind()
949 				    "allwinner,sun8i-a33-display-backend"))  in sun4i_backend_unbind()
952 	clk_disable_unprepare(backend->ram_clk);  in sun4i_backend_unbind()
953 	clk_rate_exclusive_put(backend->mod_clk);  in sun4i_backend_unbind()
954 	clk_disable_unprepare(backend->mod_clk);  in sun4i_backend_unbind()
955 	clk_disable_unprepare(backend->bus_clk);  in sun4i_backend_unbind()
956 	reset_control_assert(backend->reset);  in sun4i_backend_unbind()
966 	return component_add(&pdev->dev, &sun4i_backend_ops);  in sun4i_backend_probe()
971 	component_del(&pdev->dev, &sun4i_backend_ops);  in sun4i_backend_remove()
999 		.compatible = "allwinner,sun4i-a10-display-backend",
1003 		.compatible = "allwinner,sun5i-a13-display-backend",
1007 		.compatible = "allwinner,sun6i-a31-display-backend",
1011 		.compatible = "allwinner,sun7i-a20-display-backend",
1015 		.compatible = "allwinner,sun8i-a23-display-backend",
1019 		.compatible = "allwinner,sun8i-a33-display-backend",
1023 		.compatible = "allwinner,sun9i-a80-display-backend",
1034 		.name		= "sun4i-backend",
1040 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1041 MODULE_DESCRIPTION("Allwinner A10 Display Backend Driver");