Lines Matching full:vop
43 #define VOP_WIN_SET(vop, win, name, v) \ argument
44 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
45 #define VOP_SCL_SET(vop, win, name, v) \ argument
46 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
47 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
48 vop_reg_set(vop, &win->phy->scl->ext->name, \
51 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
54 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
57 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
60 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
63 #define VOP_INTR_SET_MASK(vop, name, mask, v) \ argument
64 vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)
66 #define VOP_REG_SET(vop, group, name, v) \ argument
67 vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
69 #define VOP_INTR_SET_TYPE(vop, name, type, v) \ argument
72 for (i = 0; i < vop->data->intr->nintrs; i++) { \
73 if (vop->data->intr->intrs[i] & type) { \
78 VOP_INTR_SET_MASK(vop, name, mask, reg); \
80 #define VOP_INTR_GET_TYPE(vop, name, type) \ argument
81 vop_get_intr_type(vop, &vop->data->intr->name, type)
83 #define VOP_WIN_GET(vop, win, name) \ argument
84 vop_read_reg(vop, win->base, &win->phy->name)
89 #define VOP_WIN_GET_YRGBADDR(vop, win) \ argument
90 vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
93 ((vop_win) - (vop_win)->vop->win)
95 #define VOP_AFBC_SET(vop, name, v) \ argument
97 if ((vop)->data->afbc) \
98 vop_reg_set((vop), &(vop)->data->afbc->name, \
102 #define to_vop(x) container_of(x, struct vop, crtc)
131 struct vop *vop; member
135 struct vop { struct
158 /* physical map length of vop register */ argument
163 /* lock vop irq reg */ argument
170 /* vop AHP clk */ argument
172 /* vop dclk */ argument
174 /* vop share memory frequency */ argument
177 /* vop dclk reset */ argument
186 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) in vop_writel() argument
188 writel(v, vop->regs + offset); in vop_writel()
189 vop->regsbak[offset >> 2] = v; in vop_writel()
192 static inline uint32_t vop_readl(struct vop *vop, uint32_t offset) in vop_readl() argument
194 return readl(vop->regs + offset); in vop_readl()
197 static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, in vop_read_reg() argument
200 return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; in vop_read_reg()
203 static void vop_reg_set(struct vop *vop, const struct vop_reg *reg, in vop_reg_set() argument
210 DRM_DEV_DEBUG(vop->dev, "Warning: not support %s\n", reg_name); in vop_reg_set()
221 uint32_t cached_val = vop->regsbak[offset >> 2]; in vop_reg_set()
224 vop->regsbak[offset >> 2] = v; in vop_reg_set()
228 writel_relaxed(v, vop->regs + offset); in vop_reg_set()
230 writel(v, vop->regs + offset); in vop_reg_set()
233 static inline uint32_t vop_get_intr_type(struct vop *vop, in vop_get_intr_type() argument
237 uint32_t regs = vop_read_reg(vop, 0, reg); in vop_get_intr_type()
239 for (i = 0; i < vop->data->intr->nintrs; i++) { in vop_get_intr_type()
240 if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) in vop_get_intr_type()
241 ret |= vop->data->intr->intrs[i]; in vop_get_intr_type()
247 static inline void vop_cfg_done(struct vop *vop) in vop_cfg_done() argument
249 VOP_REG_SET(vop, common, cfg_done, 1); in vop_cfg_done()
348 static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, in scl_vop_cal_scl_fac() argument
367 DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n"); in scl_vop_cal_scl_fac()
372 VOP_SCL_SET(vop, win, scale_yrgb_x, in scl_vop_cal_scl_fac()
374 VOP_SCL_SET(vop, win, scale_yrgb_y, in scl_vop_cal_scl_fac()
377 VOP_SCL_SET(vop, win, scale_cbcr_x, in scl_vop_cal_scl_fac()
379 VOP_SCL_SET(vop, win, scale_cbcr_y, in scl_vop_cal_scl_fac()
402 VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); in scl_vop_cal_scl_fac()
405 DRM_DEV_ERROR(vop->dev, "not allow yrgb ver scale\n"); in scl_vop_cal_scl_fac()
409 DRM_DEV_ERROR(vop->dev, "not allow cbcr ver scale\n"); in scl_vop_cal_scl_fac()
421 VOP_SCL_SET(vop, win, scale_yrgb_x, val); in scl_vop_cal_scl_fac()
424 VOP_SCL_SET(vop, win, scale_yrgb_y, val); in scl_vop_cal_scl_fac()
426 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
427 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
429 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); in scl_vop_cal_scl_fac()
430 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); in scl_vop_cal_scl_fac()
431 VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
432 VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
433 VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
437 VOP_SCL_SET(vop, win, scale_cbcr_x, val); in scl_vop_cal_scl_fac()
440 VOP_SCL_SET(vop, win, scale_cbcr_y, val); in scl_vop_cal_scl_fac()
442 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
443 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
444 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); in scl_vop_cal_scl_fac()
445 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); in scl_vop_cal_scl_fac()
446 VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
447 VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
448 VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
452 static void vop_dsp_hold_valid_irq_enable(struct vop *vop) in vop_dsp_hold_valid_irq_enable() argument
456 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_enable()
459 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
461 VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
462 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
464 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
467 static void vop_dsp_hold_valid_irq_disable(struct vop *vop) in vop_dsp_hold_valid_irq_disable() argument
471 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_disable()
474 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
476 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); in vop_dsp_hold_valid_irq_disable()
478 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
503 static bool vop_line_flag_irq_is_enabled(struct vop *vop) in vop_line_flag_irq_is_enabled() argument
508 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
510 line_flag_irq = VOP_INTR_GET_TYPE(vop, enable, LINE_FLAG_INTR); in vop_line_flag_irq_is_enabled()
512 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
517 static void vop_line_flag_irq_enable(struct vop *vop) in vop_line_flag_irq_enable() argument
521 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_enable()
524 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
526 VOP_INTR_SET_TYPE(vop, clear, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
527 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
529 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
532 static void vop_line_flag_irq_disable(struct vop *vop) in vop_line_flag_irq_disable() argument
536 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_disable()
539 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
541 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 0); in vop_line_flag_irq_disable()
543 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
546 static int vop_core_clks_enable(struct vop *vop) in vop_core_clks_enable() argument
550 ret = clk_enable(vop->hclk); in vop_core_clks_enable()
554 ret = clk_enable(vop->aclk); in vop_core_clks_enable()
561 clk_disable(vop->hclk); in vop_core_clks_enable()
565 static void vop_core_clks_disable(struct vop *vop) in vop_core_clks_disable() argument
567 clk_disable(vop->aclk); in vop_core_clks_disable()
568 clk_disable(vop->hclk); in vop_core_clks_disable()
571 static void vop_win_disable(struct vop *vop, const struct vop_win *vop_win) in vop_win_disable() argument
576 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, SCALE_NONE); in vop_win_disable()
577 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, SCALE_NONE); in vop_win_disable()
578 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, SCALE_NONE); in vop_win_disable()
579 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, SCALE_NONE); in vop_win_disable()
582 VOP_WIN_SET(vop, win, enable, 0); in vop_win_disable()
583 vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); in vop_win_disable()
588 struct vop *vop = to_vop(crtc); in vop_enable() local
591 ret = pm_runtime_get_sync(vop->dev); in vop_enable()
593 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_enable()
597 ret = vop_core_clks_enable(vop); in vop_enable()
601 ret = clk_enable(vop->dclk); in vop_enable()
606 * Slave iommu shares power, irq and clock with vop. It was associated in vop_enable()
611 ret = rockchip_drm_dma_attach_device(vop->drm_dev, vop->dev); in vop_enable()
613 DRM_DEV_ERROR(vop->dev, in vop_enable()
618 spin_lock(&vop->reg_lock); in vop_enable()
619 for (i = 0; i < vop->len; i += 4) in vop_enable()
620 writel_relaxed(vop->regsbak[i / 4], vop->regs + i); in vop_enable()
632 for (i = 0; i < vop->data->win_size; i++) { in vop_enable()
633 struct vop_win *vop_win = &vop->win[i]; in vop_enable()
635 vop_win_disable(vop, vop_win); in vop_enable()
639 if (vop->data->afbc) { in vop_enable()
642 * Disable AFBC and forget there was a vop window with AFBC in vop_enable()
644 VOP_AFBC_SET(vop, enable, 0); in vop_enable()
649 vop_cfg_done(vop); in vop_enable()
651 spin_unlock(&vop->reg_lock); in vop_enable()
654 * At here, vop clock & iommu is enable, R/W vop regs would be safe. in vop_enable()
656 vop->is_enabled = true; in vop_enable()
658 spin_lock(&vop->reg_lock); in vop_enable()
660 VOP_REG_SET(vop, common, standby, 1); in vop_enable()
662 spin_unlock(&vop->reg_lock); in vop_enable()
669 clk_disable(vop->dclk); in vop_enable()
671 vop_core_clks_disable(vop); in vop_enable()
673 pm_runtime_put_sync(vop->dev); in vop_enable()
679 struct vop *vop = to_vop(crtc); in rockchip_drm_set_win_enabled() local
682 spin_lock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
684 for (i = 0; i < vop->data->win_size; i++) { in rockchip_drm_set_win_enabled()
685 struct vop_win *vop_win = &vop->win[i]; in rockchip_drm_set_win_enabled()
688 VOP_WIN_SET(vop, win, enable, in rockchip_drm_set_win_enabled()
689 enabled && (vop->win_enabled & BIT(i))); in rockchip_drm_set_win_enabled()
691 vop_cfg_done(vop); in rockchip_drm_set_win_enabled()
693 spin_unlock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
699 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_disable() local
701 WARN_ON(vop->event); in vop_crtc_atomic_disable()
706 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_disable()
714 * Vop standby will take effect at end of current frame, in vop_crtc_atomic_disable()
720 reinit_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
721 vop_dsp_hold_valid_irq_enable(vop); in vop_crtc_atomic_disable()
723 spin_lock(&vop->reg_lock); in vop_crtc_atomic_disable()
725 VOP_REG_SET(vop, common, standby, 1); in vop_crtc_atomic_disable()
727 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_disable()
729 wait_for_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
731 vop_dsp_hold_valid_irq_disable(vop); in vop_crtc_atomic_disable()
733 vop->is_enabled = false; in vop_crtc_atomic_disable()
736 * vop standby complete, so iommu detach is safe. in vop_crtc_atomic_disable()
738 rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); in vop_crtc_atomic_disable()
740 clk_disable(vop->dclk); in vop_crtc_atomic_disable()
741 vop_core_clks_disable(vop); in vop_crtc_atomic_disable()
742 pm_runtime_put(vop->dev); in vop_crtc_atomic_disable()
745 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_disable()
833 struct vop *vop = to_vop(crtc); in vop_plane_atomic_check() local
835 if (!vop->data->afbc) { in vop_plane_atomic_check()
836 DRM_ERROR("vop does not support AFBC\n"); in vop_plane_atomic_check()
867 struct vop *vop = to_vop(old_state->crtc); in vop_plane_atomic_disable() local
872 spin_lock(&vop->reg_lock); in vop_plane_atomic_disable()
874 vop_win_disable(vop, vop_win); in vop_plane_atomic_disable()
876 spin_unlock(&vop->reg_lock); in vop_plane_atomic_disable()
888 struct vop *vop = to_vop(new_state->crtc); in vop_plane_atomic_update() local
907 * can't update plane when vop is disabled. in vop_plane_atomic_update()
912 if (WARN_ON(!vop->is_enabled)) in vop_plane_atomic_update()
947 spin_lock(&vop->reg_lock); in vop_plane_atomic_update()
952 VOP_AFBC_SET(vop, format, afbc_format | AFBC_TILE_16x16); in vop_plane_atomic_update()
953 VOP_AFBC_SET(vop, hreg_block_split, 0); in vop_plane_atomic_update()
954 VOP_AFBC_SET(vop, win_sel, VOP_WIN_TO_INDEX(vop_win)); in vop_plane_atomic_update()
955 VOP_AFBC_SET(vop, hdr_ptr, dma_addr); in vop_plane_atomic_update()
956 VOP_AFBC_SET(vop, pic_size, act_info); in vop_plane_atomic_update()
959 VOP_WIN_SET(vop, win, format, format); in vop_plane_atomic_update()
960 VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); in vop_plane_atomic_update()
961 VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); in vop_plane_atomic_update()
962 VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); in vop_plane_atomic_update()
963 VOP_WIN_SET(vop, win, y_mir_en, in vop_plane_atomic_update()
965 VOP_WIN_SET(vop, win, x_mir_en, in vop_plane_atomic_update()
980 VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4)); in vop_plane_atomic_update()
981 VOP_WIN_SET(vop, win, uv_mst, dma_addr); in vop_plane_atomic_update()
984 VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, in vop_plane_atomic_update()
992 scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, in vop_plane_atomic_update()
996 VOP_WIN_SET(vop, win, act_info, act_info); in vop_plane_atomic_update()
997 VOP_WIN_SET(vop, win, dsp_info, dsp_info); in vop_plane_atomic_update()
998 VOP_WIN_SET(vop, win, dsp_st, dsp_st); in vop_plane_atomic_update()
1001 VOP_WIN_SET(vop, win, rb_swap, rb_swap); in vop_plane_atomic_update()
1011 VOP_WIN_SET(vop, win, dst_alpha_ctl, in vop_plane_atomic_update()
1018 VOP_WIN_SET(vop, win, src_alpha_ctl, val); in vop_plane_atomic_update()
1020 VOP_WIN_SET(vop, win, alpha_pre_mul, ALPHA_SRC_PRE_MUL); in vop_plane_atomic_update()
1021 VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); in vop_plane_atomic_update()
1022 VOP_WIN_SET(vop, win, alpha_en, 1); in vop_plane_atomic_update()
1024 VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); in vop_plane_atomic_update()
1025 VOP_WIN_SET(vop, win, alpha_en, 0); in vop_plane_atomic_update()
1028 VOP_WIN_SET(vop, win, enable, 1); in vop_plane_atomic_update()
1029 vop->win_enabled |= BIT(win_index); in vop_plane_atomic_update()
1030 spin_unlock(&vop->reg_lock); in vop_plane_atomic_update()
1071 struct vop *vop = to_vop(plane->state->crtc); in vop_plane_atomic_async_update() local
1084 if (vop->is_enabled) { in vop_plane_atomic_async_update()
1086 spin_lock(&vop->reg_lock); in vop_plane_atomic_async_update()
1087 vop_cfg_done(vop); in vop_plane_atomic_async_update()
1088 spin_unlock(&vop->reg_lock); in vop_plane_atomic_async_update()
1101 drm_flip_work_queue(&vop->fb_unref_work, old_fb); in vop_plane_atomic_async_update()
1102 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_plane_atomic_async_update()
1127 struct vop *vop = to_vop(crtc); in vop_crtc_enable_vblank() local
1130 if (WARN_ON(!vop->is_enabled)) in vop_crtc_enable_vblank()
1133 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1135 VOP_INTR_SET_TYPE(vop, clear, FS_INTR, 1); in vop_crtc_enable_vblank()
1136 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); in vop_crtc_enable_vblank()
1138 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1145 struct vop *vop = to_vop(crtc); in vop_crtc_disable_vblank() local
1148 if (WARN_ON(!vop->is_enabled)) in vop_crtc_disable_vblank()
1151 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1153 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); in vop_crtc_disable_vblank()
1155 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1162 struct vop *vop = to_vop(crtc); in vop_crtc_mode_fixup() local
1191 rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_mode_fixup()
1193 rate = clk_round_rate(vop->dclk, in vop_crtc_mode_fixup()
1200 static bool vop_dsp_lut_is_enabled(struct vop *vop) in vop_dsp_lut_is_enabled() argument
1202 return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en); in vop_dsp_lut_is_enabled()
1205 static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc) in vop_crtc_write_gamma_lut() argument
1216 writel(word, vop->lut_regs + i * 4); in vop_crtc_write_gamma_lut()
1220 static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc, in vop_crtc_gamma_set() argument
1227 if (!vop->lut_regs) in vop_crtc_gamma_set()
1233 spin_lock(&vop->reg_lock); in vop_crtc_gamma_set()
1234 VOP_REG_SET(vop, common, dsp_lut_en, 0); in vop_crtc_gamma_set()
1235 vop_cfg_done(vop); in vop_crtc_gamma_set()
1236 spin_unlock(&vop->reg_lock); in vop_crtc_gamma_set()
1242 ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop, in vop_crtc_gamma_set()
1245 DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n"); in vop_crtc_gamma_set()
1252 spin_lock(&vop->reg_lock); in vop_crtc_gamma_set()
1253 vop_crtc_write_gamma_lut(vop, crtc); in vop_crtc_gamma_set()
1254 VOP_REG_SET(vop, common, dsp_lut_en, 1); in vop_crtc_gamma_set()
1255 vop_cfg_done(vop); in vop_crtc_gamma_set()
1256 spin_unlock(&vop->reg_lock); in vop_crtc_gamma_set()
1266 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_begin() local
1274 vop_crtc_gamma_set(vop, crtc, old_crtc_state); in vop_crtc_atomic_begin()
1282 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_enable() local
1283 const struct vop_data *vop_data = vop->data; in vop_crtc_atomic_enable()
1312 vop_crtc_gamma_set(vop, crtc, old_state); in vop_crtc_atomic_enable()
1314 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_enable()
1316 WARN_ON(vop->event); in vop_crtc_atomic_enable()
1320 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1321 DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret); in vop_crtc_atomic_enable()
1328 VOP_REG_SET(vop, output, pin_pol, pin_pol); in vop_crtc_atomic_enable()
1329 VOP_REG_SET(vop, output, mipi_dual_channel_en, 0); in vop_crtc_atomic_enable()
1333 VOP_REG_SET(vop, output, rgb_dclk_pol, 1); in vop_crtc_atomic_enable()
1334 VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1335 VOP_REG_SET(vop, output, rgb_en, 1); in vop_crtc_atomic_enable()
1338 VOP_REG_SET(vop, output, edp_dclk_pol, 1); in vop_crtc_atomic_enable()
1339 VOP_REG_SET(vop, output, edp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1340 VOP_REG_SET(vop, output, edp_en, 1); in vop_crtc_atomic_enable()
1343 VOP_REG_SET(vop, output, hdmi_dclk_pol, 1); in vop_crtc_atomic_enable()
1344 VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1345 VOP_REG_SET(vop, output, hdmi_en, 1); in vop_crtc_atomic_enable()
1348 VOP_REG_SET(vop, output, mipi_dclk_pol, 1); in vop_crtc_atomic_enable()
1349 VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1350 VOP_REG_SET(vop, output, mipi_en, 1); in vop_crtc_atomic_enable()
1351 VOP_REG_SET(vop, output, mipi_dual_channel_en, in vop_crtc_atomic_enable()
1355 VOP_REG_SET(vop, output, dp_dclk_pol, 0); in vop_crtc_atomic_enable()
1356 VOP_REG_SET(vop, output, dp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1357 VOP_REG_SET(vop, output, dp_en, 1); in vop_crtc_atomic_enable()
1360 DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", in vop_crtc_atomic_enable()
1365 * if vop is not support RGB10 output, need force RGB10 to RGB888. in vop_crtc_atomic_enable()
1372 VOP_REG_SET(vop, common, pre_dither_down, 1); in vop_crtc_atomic_enable()
1374 VOP_REG_SET(vop, common, pre_dither_down, 0); in vop_crtc_atomic_enable()
1377 VOP_REG_SET(vop, common, dither_down_sel, DITHER_DOWN_ALLEGRO); in vop_crtc_atomic_enable()
1378 VOP_REG_SET(vop, common, dither_down_mode, RGB888_TO_RGB666); in vop_crtc_atomic_enable()
1379 VOP_REG_SET(vop, common, dither_down_en, 1); in vop_crtc_atomic_enable()
1381 VOP_REG_SET(vop, common, dither_down_en, 0); in vop_crtc_atomic_enable()
1384 VOP_REG_SET(vop, common, out_mode, s->output_mode); in vop_crtc_atomic_enable()
1386 VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len); in vop_crtc_atomic_enable()
1389 VOP_REG_SET(vop, modeset, hact_st_end, val); in vop_crtc_atomic_enable()
1390 VOP_REG_SET(vop, modeset, hpost_st_end, val); in vop_crtc_atomic_enable()
1392 VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len); in vop_crtc_atomic_enable()
1395 VOP_REG_SET(vop, modeset, vact_st_end, val); in vop_crtc_atomic_enable()
1396 VOP_REG_SET(vop, modeset, vpost_st_end, val); in vop_crtc_atomic_enable()
1398 VOP_REG_SET(vop, intr, line_flag_num[0], vact_end); in vop_crtc_atomic_enable()
1400 clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_atomic_enable()
1402 VOP_REG_SET(vop, common, standby, 0); in vop_crtc_atomic_enable()
1403 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1406 static bool vop_fs_irq_is_pending(struct vop *vop) in vop_fs_irq_is_pending() argument
1408 return VOP_INTR_GET_TYPE(vop, status, FS_INTR); in vop_fs_irq_is_pending()
1411 static void vop_wait_for_irq_handler(struct vop *vop) in vop_wait_for_irq_handler() argument
1424 ret = readx_poll_timeout_atomic(vop_fs_irq_is_pending, vop, pending, in vop_wait_for_irq_handler()
1427 DRM_DEV_ERROR(vop->dev, "VOP vblank IRQ stuck for 10 ms\n"); in vop_wait_for_irq_handler()
1429 synchronize_irq(vop->irq); in vop_wait_for_irq_handler()
1437 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_check() local
1443 if (vop->lut_regs && crtc_state->color_mgmt_changed && in vop_crtc_atomic_check()
1486 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_flush() local
1491 if (WARN_ON(!vop->is_enabled)) in vop_crtc_atomic_flush()
1494 spin_lock(&vop->reg_lock); in vop_crtc_atomic_flush()
1498 VOP_AFBC_SET(vop, enable, s->enable_afbc); in vop_crtc_atomic_flush()
1499 vop_cfg_done(vop); in vop_crtc_atomic_flush()
1501 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_flush()
1508 vop_wait_for_irq_handler(vop); in vop_crtc_atomic_flush()
1513 WARN_ON(vop->event); in vop_crtc_atomic_flush()
1515 vop->event = crtc->state->event; in vop_crtc_atomic_flush()
1530 drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb); in vop_crtc_atomic_flush()
1531 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_crtc_atomic_flush()
1582 static struct drm_connector *vop_get_edp_connector(struct vop *vop) in vop_get_edp_connector() argument
1587 drm_connector_list_iter_begin(vop->drm_dev, &conn_iter); in vop_get_edp_connector()
1602 struct vop *vop = to_vop(crtc); in vop_crtc_set_crc_source() local
1606 connector = vop_get_edp_connector(vop); in vop_crtc_set_crc_source()
1661 struct vop *vop = container_of(work, struct vop, fb_unref_work); in vop_fb_unref_worker() local
1664 drm_crtc_vblank_put(&vop->crtc); in vop_fb_unref_worker()
1668 static void vop_handle_vblank(struct vop *vop) in vop_handle_vblank() argument
1670 struct drm_device *drm = vop->drm_dev; in vop_handle_vblank()
1671 struct drm_crtc *crtc = &vop->crtc; in vop_handle_vblank()
1674 if (vop->event) { in vop_handle_vblank()
1675 drm_crtc_send_vblank_event(crtc, vop->event); in vop_handle_vblank()
1677 vop->event = NULL; in vop_handle_vblank()
1681 if (test_and_clear_bit(VOP_PENDING_FB_UNREF, &vop->pending)) in vop_handle_vblank()
1682 drm_flip_work_commit(&vop->fb_unref_work, system_unbound_wq); in vop_handle_vblank()
1687 struct vop *vop = data; in vop_isr() local
1688 struct drm_crtc *crtc = &vop->crtc; in vop_isr()
1694 * vop-device is disabled the irq has to be targeted at the iommu. in vop_isr()
1696 if (!pm_runtime_get_if_in_use(vop->dev)) in vop_isr()
1699 if (vop_core_clks_enable(vop)) { in vop_isr()
1700 DRM_DEV_ERROR_RATELIMITED(vop->dev, "couldn't enable clocks\n"); in vop_isr()
1708 spin_lock(&vop->irq_lock); in vop_isr()
1710 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr()
1713 VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); in vop_isr()
1715 spin_unlock(&vop->irq_lock); in vop_isr()
1717 /* This is expected for vop iommu irqs, since the irq is shared */ in vop_isr()
1722 complete(&vop->dsp_hold_completion); in vop_isr()
1728 complete(&vop->line_flag_completion); in vop_isr()
1735 vop_handle_vblank(vop); in vop_isr()
1742 DRM_DEV_ERROR(vop->dev, "Unknown VOP IRQs: %#02x\n", in vop_isr()
1746 vop_core_clks_disable(vop); in vop_isr()
1748 pm_runtime_put(vop->dev); in vop_isr()
1764 static int vop_create_crtc(struct vop *vop) in vop_create_crtc() argument
1766 const struct vop_data *vop_data = vop->data; in vop_create_crtc()
1767 struct device *dev = vop->dev; in vop_create_crtc()
1768 struct drm_device *drm_dev = vop->drm_dev; in vop_create_crtc()
1770 struct drm_crtc *crtc = &vop->crtc; in vop_create_crtc()
1781 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1788 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1795 DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n", in vop_create_crtc()
1815 if (vop->lut_regs) { in vop_create_crtc()
1825 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1832 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1840 DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n", in vop_create_crtc()
1850 DRM_DEV_ERROR(vop->dev, "no port node found in %pOF\n", in vop_create_crtc()
1856 drm_flip_work_init(&vop->fb_unref_work, "fb_unref", in vop_create_crtc()
1859 init_completion(&vop->dsp_hold_completion); in vop_create_crtc()
1860 init_completion(&vop->line_flag_completion); in vop_create_crtc()
1865 DRM_DEV_DEBUG_KMS(vop->dev, in vop_create_crtc()
1880 static void vop_destroy_crtc(struct vop *vop) in vop_destroy_crtc() argument
1882 struct drm_crtc *crtc = &vop->crtc; in vop_destroy_crtc()
1883 struct drm_device *drm_dev = vop->drm_dev; in vop_destroy_crtc()
1893 * The planes are "&vop->win[i].base". That means the memory is in vop_destroy_crtc()
1894 * all part of the big "struct vop" chunk of memory. That memory in vop_destroy_crtc()
1907 drm_flip_work_cleanup(&vop->fb_unref_work); in vop_destroy_crtc()
1910 static int vop_initial(struct vop *vop) in vop_initial() argument
1915 vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); in vop_initial()
1916 if (IS_ERR(vop->hclk)) { in vop_initial()
1917 DRM_DEV_ERROR(vop->dev, "failed to get hclk source\n"); in vop_initial()
1918 return PTR_ERR(vop->hclk); in vop_initial()
1920 vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); in vop_initial()
1921 if (IS_ERR(vop->aclk)) { in vop_initial()
1922 DRM_DEV_ERROR(vop->dev, "failed to get aclk source\n"); in vop_initial()
1923 return PTR_ERR(vop->aclk); in vop_initial()
1925 vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); in vop_initial()
1926 if (IS_ERR(vop->dclk)) { in vop_initial()
1927 DRM_DEV_ERROR(vop->dev, "failed to get dclk source\n"); in vop_initial()
1928 return PTR_ERR(vop->dclk); in vop_initial()
1931 ret = pm_runtime_get_sync(vop->dev); in vop_initial()
1933 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_initial()
1937 ret = clk_prepare(vop->dclk); in vop_initial()
1939 DRM_DEV_ERROR(vop->dev, "failed to prepare dclk\n"); in vop_initial()
1943 /* Enable both the hclk and aclk to setup the vop */ in vop_initial()
1944 ret = clk_prepare_enable(vop->hclk); in vop_initial()
1946 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable hclk\n"); in vop_initial()
1950 ret = clk_prepare_enable(vop->aclk); in vop_initial()
1952 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable aclk\n"); in vop_initial()
1957 * do hclk_reset, reset all vop registers. in vop_initial()
1959 ahb_rst = devm_reset_control_get(vop->dev, "ahb"); in vop_initial()
1961 DRM_DEV_ERROR(vop->dev, "failed to get ahb reset\n"); in vop_initial()
1969 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial()
1970 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
1972 for (i = 0; i < vop->len; i += sizeof(u32)) in vop_initial()
1973 vop->regsbak[i / 4] = readl_relaxed(vop->regs + i); in vop_initial()
1975 VOP_REG_SET(vop, misc, global_regdone_en, 1); in vop_initial()
1976 VOP_REG_SET(vop, common, dsp_blank, 0); in vop_initial()
1978 for (i = 0; i < vop->data->win_size; i++) { in vop_initial()
1979 struct vop_win *vop_win = &vop->win[i]; in vop_initial()
1983 VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); in vop_initial()
1984 vop_win_disable(vop, vop_win); in vop_initial()
1985 VOP_WIN_SET(vop, win, gate, 1); in vop_initial()
1988 vop_cfg_done(vop); in vop_initial()
1993 vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); in vop_initial()
1994 if (IS_ERR(vop->dclk_rst)) { in vop_initial()
1995 DRM_DEV_ERROR(vop->dev, "failed to get dclk reset\n"); in vop_initial()
1996 ret = PTR_ERR(vop->dclk_rst); in vop_initial()
1999 reset_control_assert(vop->dclk_rst); in vop_initial()
2001 reset_control_deassert(vop->dclk_rst); in vop_initial()
2003 clk_disable(vop->hclk); in vop_initial()
2004 clk_disable(vop->aclk); in vop_initial()
2006 vop->is_enabled = false; in vop_initial()
2008 pm_runtime_put_sync(vop->dev); in vop_initial()
2013 clk_disable_unprepare(vop->aclk); in vop_initial()
2015 clk_disable_unprepare(vop->hclk); in vop_initial()
2017 clk_unprepare(vop->dclk); in vop_initial()
2019 pm_runtime_put_sync(vop->dev); in vop_initial()
2024 * Initialize the vop->win array elements.
2026 static void vop_win_init(struct vop *vop) in vop_win_init() argument
2028 const struct vop_data *vop_data = vop->data; in vop_win_init()
2032 struct vop_win *vop_win = &vop->win[i]; in vop_win_init()
2036 vop_win->vop = vop; in vop_win_init()
2055 struct vop *vop = to_vop(crtc); in rockchip_drm_wait_vact_end() local
2059 if (!crtc || !vop->is_enabled) in rockchip_drm_wait_vact_end()
2062 mutex_lock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
2068 if (vop_line_flag_irq_is_enabled(vop)) { in rockchip_drm_wait_vact_end()
2073 reinit_completion(&vop->line_flag_completion); in rockchip_drm_wait_vact_end()
2074 vop_line_flag_irq_enable(vop); in rockchip_drm_wait_vact_end()
2076 jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion, in rockchip_drm_wait_vact_end()
2078 vop_line_flag_irq_disable(vop); in rockchip_drm_wait_vact_end()
2081 DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n"); in rockchip_drm_wait_vact_end()
2087 mutex_unlock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
2097 struct vop *vop; in vop_bind() local
2105 /* Allocate vop struct and its vop_win array */ in vop_bind()
2106 vop = devm_kzalloc(dev, struct_size(vop, win, vop_data->win_size), in vop_bind()
2108 if (!vop) in vop_bind()
2111 vop->dev = dev; in vop_bind()
2112 vop->data = vop_data; in vop_bind()
2113 vop->drm_dev = drm_dev; in vop_bind()
2114 dev_set_drvdata(dev, vop); in vop_bind()
2116 vop_win_init(vop); in vop_bind()
2119 vop->len = resource_size(res); in vop_bind()
2120 vop->regs = devm_ioremap_resource(dev, res); in vop_bind()
2121 if (IS_ERR(vop->regs)) in vop_bind()
2122 return PTR_ERR(vop->regs); in vop_bind()
2130 vop->lut_regs = devm_ioremap_resource(dev, res); in vop_bind()
2131 if (IS_ERR(vop->lut_regs)) in vop_bind()
2132 return PTR_ERR(vop->lut_regs); in vop_bind()
2135 vop->regsbak = devm_kzalloc(dev, vop->len, GFP_KERNEL); in vop_bind()
2136 if (!vop->regsbak) in vop_bind()
2141 DRM_DEV_ERROR(dev, "cannot find irq for vop\n"); in vop_bind()
2144 vop->irq = (unsigned int)irq; in vop_bind()
2146 spin_lock_init(&vop->reg_lock); in vop_bind()
2147 spin_lock_init(&vop->irq_lock); in vop_bind()
2148 mutex_init(&vop->vop_lock); in vop_bind()
2150 ret = vop_create_crtc(vop); in vop_bind()
2156 ret = vop_initial(vop); in vop_bind()
2159 "cannot initial vop dev - err %d\n", ret); in vop_bind()
2163 ret = devm_request_irq(dev, vop->irq, vop_isr, in vop_bind()
2164 IRQF_SHARED, dev_name(dev), vop); in vop_bind()
2168 if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { in vop_bind()
2169 vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); in vop_bind()
2170 if (IS_ERR(vop->rgb)) { in vop_bind()
2171 ret = PTR_ERR(vop->rgb); in vop_bind()
2180 vop_destroy_crtc(vop); in vop_bind()
2186 struct vop *vop = dev_get_drvdata(dev); in vop_unbind() local
2188 if (vop->rgb) in vop_unbind()
2189 rockchip_rgb_fini(vop->rgb); in vop_unbind()
2192 vop_destroy_crtc(vop); in vop_unbind()
2194 clk_unprepare(vop->aclk); in vop_unbind()
2195 clk_unprepare(vop->hclk); in vop_unbind()
2196 clk_unprepare(vop->dclk); in vop_unbind()