1 // SPDX-License-Identifier: GPL-2.0-only
222 	u32 temp = readl(dsi->regs + offset);  in mtk_dsi_mask()
224 	writel((temp & ~mask) | (data & mask), dsi->regs + offset);  in mtk_dsi_mask()
230 	u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000);  in mtk_dsi_phy_timconfig()
231 	struct mtk_phy_timing *timing = &dsi->phy_timing;  in mtk_dsi_phy_timconfig()  local
233 	timing->lpx = (60 * data_rate_mhz / (8 * 1000)) + 1;  in mtk_dsi_phy_timconfig()
234 	timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;  in mtk_dsi_phy_timconfig()
235 	timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -  in mtk_dsi_phy_timconfig()
236 			     timing->da_hs_prepare;  in mtk_dsi_phy_timconfig()
237 	timing->da_hs_trail = timing->da_hs_prepare + 1;  in mtk_dsi_phy_timconfig()
239 	timing->ta_go = 4 * timing->lpx - 2;  in mtk_dsi_phy_timconfig()
240 	timing->ta_sure = timing->lpx + 2;  in mtk_dsi_phy_timconfig()
241 	timing->ta_get = 4 * timing->lpx;  in mtk_dsi_phy_timconfig()
242 	timing->da_hs_exit = 2 * timing->lpx + 1;  in mtk_dsi_phy_timconfig()
244 	timing->clk_hs_prepare = 70 * data_rate_mhz / (8 * 1000);  in mtk_dsi_phy_timconfig()
245 	timing->clk_hs_post = timing->clk_hs_prepare + 8;  in mtk_dsi_phy_timconfig()
246 	timing->clk_hs_trail = timing->clk_hs_prepare;  in mtk_dsi_phy_timconfig()
247 	timing->clk_hs_zero = timing->clk_hs_trail * 4;  in mtk_dsi_phy_timconfig()
248 	timing->clk_hs_exit = 2 * timing->clk_hs_trail;  in mtk_dsi_phy_timconfig()
250 	timcon0 = timing->lpx | timing->da_hs_prepare << 8 |  in mtk_dsi_phy_timconfig()
251 		  timing->da_hs_zero << 16 | timing->da_hs_trail << 24;  in mtk_dsi_phy_timconfig()
252 	timcon1 = timing->ta_go | timing->ta_sure << 8 |  in mtk_dsi_phy_timconfig()
253 		  timing->ta_get << 16 | timing->da_hs_exit << 24;  in mtk_dsi_phy_timconfig()
254 	timcon2 = 1 << 8 | timing->clk_hs_zero << 16 |  in mtk_dsi_phy_timconfig()
255 		  timing->clk_hs_trail << 24;  in mtk_dsi_phy_timconfig()
256 	timcon3 = timing->clk_hs_prepare | timing->clk_hs_post << 8 |  in mtk_dsi_phy_timconfig()
257 		  timing->clk_hs_exit << 16;  in mtk_dsi_phy_timconfig()
259 	writel(timcon0, dsi->regs + DSI_PHY_TIMECON0);  in mtk_dsi_phy_timconfig()
260 	writel(timcon1, dsi->regs + DSI_PHY_TIMECON1);  in mtk_dsi_phy_timconfig()
261 	writel(timcon2, dsi->regs + DSI_PHY_TIMECON2);  in mtk_dsi_phy_timconfig()
262 	writel(timcon3, dsi->regs + DSI_PHY_TIMECON3);  in mtk_dsi_phy_timconfig()
315 	return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN;  in mtk_dsi_clk_hs_state()
330 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {  in mtk_dsi_set_mode()
331 		if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)  in mtk_dsi_set_mode()
333 		else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)  in mtk_dsi_set_mode()
339 	writel(vid_mode, dsi->regs + DSI_MODE_CTRL);  in mtk_dsi_set_mode()
350 	struct videomode *vm = &dsi->vm;  in mtk_dsi_ps_control_vact()
354 	if (dsi->format == MIPI_DSI_FMT_RGB565)  in mtk_dsi_ps_control_vact()
359 	ps_wc = vm->hactive * dsi_buf_bpp;  in mtk_dsi_ps_control_vact()
362 	switch (dsi->format) {  in mtk_dsi_ps_control_vact()
377 	writel(vm->vactive, dsi->regs + DSI_VACT_NL);  in mtk_dsi_ps_control_vact()
378 	writel(ps_bpp_mode, dsi->regs + DSI_PSCTRL);  in mtk_dsi_ps_control_vact()
379 	writel(ps_wc, dsi->regs + DSI_HSTX_CKL_WC);  in mtk_dsi_ps_control_vact()
386 	switch (dsi->lanes) {  in mtk_dsi_rxtx_control()
404 	if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)  in mtk_dsi_rxtx_control()
407 	if (!(dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET))  in mtk_dsi_rxtx_control()
410 	writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL);  in mtk_dsi_rxtx_control()
418 	switch (dsi->format) {  in mtk_dsi_ps_control()
441 	tmp_reg += dsi->vm.hactive * dsi_tmp_buf_bpp & DSI_PS_WC;  in mtk_dsi_ps_control()
442 	writel(tmp_reg, dsi->regs + DSI_PSCTRL);  in mtk_dsi_ps_control()
454 	struct mtk_phy_timing *timing = &dsi->phy_timing;  in mtk_dsi_config_vdo_timing()  local
456 	struct videomode *vm = &dsi->vm;  in mtk_dsi_config_vdo_timing()
458 	if (dsi->format == MIPI_DSI_FMT_RGB565)  in mtk_dsi_config_vdo_timing()
463 	writel(vm->vsync_len, dsi->regs + DSI_VSA_NL);  in mtk_dsi_config_vdo_timing()
464 	writel(vm->vback_porch, dsi->regs + DSI_VBP_NL);  in mtk_dsi_config_vdo_timing()
465 	writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);  in mtk_dsi_config_vdo_timing()
466 	writel(vm->vactive, dsi->regs + DSI_VACT_NL);  in mtk_dsi_config_vdo_timing()
468 	if (dsi->driver_data->has_size_ctl)  in mtk_dsi_config_vdo_timing()
469 		writel(vm->vactive << 16 | vm->hactive,  in mtk_dsi_config_vdo_timing()
470 		       dsi->regs + DSI_SIZE_CON);  in mtk_dsi_config_vdo_timing()
472 	horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);  in mtk_dsi_config_vdo_timing()
474 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)  in mtk_dsi_config_vdo_timing()
475 		horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10;  in mtk_dsi_config_vdo_timing()
477 		horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *  in mtk_dsi_config_vdo_timing()
478 					    dsi_tmp_buf_bpp - 10;  in mtk_dsi_config_vdo_timing()
480 	data_phy_cycles = timing->lpx + timing->da_hs_prepare +  in mtk_dsi_config_vdo_timing()
481 			  timing->da_hs_zero + timing->da_hs_exit + 3;  in mtk_dsi_config_vdo_timing()
483 	delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12;  in mtk_dsi_config_vdo_timing()
484 	delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 2 : 0;  in mtk_dsi_config_vdo_timing()
486 	horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp;  in mtk_dsi_config_vdo_timing()
488 	data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta;  in mtk_dsi_config_vdo_timing()
491 		horizontal_frontporch_byte -= data_phy_cycles_byte *  in mtk_dsi_config_vdo_timing()
495 		horizontal_backporch_byte -= data_phy_cycles_byte *  in mtk_dsi_config_vdo_timing()
499 		DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");  in mtk_dsi_config_vdo_timing()
502 	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);  in mtk_dsi_config_vdo_timing()
503 	writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);  in mtk_dsi_config_vdo_timing()
504 	writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);  in mtk_dsi_config_vdo_timing()
511 	writel(0, dsi->regs + DSI_START);  in mtk_dsi_start()
512 	writel(1, dsi->regs + DSI_START);  in mtk_dsi_start()
517 	writel(0, dsi->regs + DSI_START);  in mtk_dsi_stop()
522 	writel(CMD_MODE, dsi->regs + DSI_MODE_CTRL);  in mtk_dsi_set_cmd_mode()
529 	writel(inten, dsi->regs + DSI_INTEN);  in mtk_dsi_set_interrupt_enable()
534 	dsi->irq_data |= irq_bit;  in mtk_dsi_irq_data_set()
539 	dsi->irq_data &= ~irq_bit;  in mtk_dsi_irq_data_clear()
548 	ret = wait_event_interruptible_timeout(dsi->irq_wait_queue,  in mtk_dsi_wait_for_irq_done()
549 					       dsi->irq_data & irq_flag,  in mtk_dsi_wait_for_irq_done()
567 	status = readl(dsi->regs + DSI_INTSTA) & flag;  in mtk_dsi_irq()
572 			tmp = readl(dsi->regs + DSI_INTSTA);  in mtk_dsi_irq()
577 		wake_up_interruptible(&dsi->irq_wait_queue);  in mtk_dsi_irq()
590 		return -ETIME;  in mtk_dsi_switch_to_cmd_mode()
598 	struct device *dev = dsi->host.dev;  in mtk_dsi_poweron()
602 	if (++dsi->refcount != 1)  in mtk_dsi_poweron()
605 	switch (dsi->format) {  in mtk_dsi_poweron()
619 	dsi->data_rate = DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel,  in mtk_dsi_poweron()
620 					  dsi->lanes);  in mtk_dsi_poweron()
622 	ret = clk_set_rate(dsi->hs_clk, dsi->data_rate);  in mtk_dsi_poweron()
628 	phy_power_on(dsi->phy);  in mtk_dsi_poweron()
630 	ret = clk_prepare_enable(dsi->engine_clk);  in mtk_dsi_poweron()
636 	ret = clk_prepare_enable(dsi->digital_clk);  in mtk_dsi_poweron()
644 	if (dsi->driver_data->has_shadow_ctl)  in mtk_dsi_poweron()
646 		       dsi->regs + DSI_SHADOW_DEBUG);  in mtk_dsi_poweron()
665 	clk_disable_unprepare(dsi->engine_clk);  in mtk_dsi_poweron()
667 	phy_power_off(dsi->phy);  in mtk_dsi_poweron()
669 	dsi->refcount--;  in mtk_dsi_poweron()
675 	if (WARN_ON(dsi->refcount == 0))  in mtk_dsi_poweroff()
678 	if (--dsi->refcount != 0)  in mtk_dsi_poweroff()
697 	clk_disable_unprepare(dsi->engine_clk);  in mtk_dsi_poweroff()
698 	clk_disable_unprepare(dsi->digital_clk);  in mtk_dsi_poweroff()
700 	phy_power_off(dsi->phy);  in mtk_dsi_poweroff()
707 	if (dsi->enabled)  in mtk_output_dsi_enable()
721 	dsi->enabled = true;  in mtk_output_dsi_enable()
726 	if (!dsi->enabled)  in mtk_output_dsi_disable()
731 	dsi->enabled = false;  in mtk_output_dsi_disable()
740 	return drm_bridge_attach(bridge->encoder, dsi->next_bridge,  in mtk_dsi_bridge_attach()
741 				 &dsi->bridge, flags);  in mtk_dsi_bridge_attach()
750 	drm_display_mode_to_videomode(adjusted, &dsi->vm);  in mtk_dsi_bridge_mode_set()
793 	dsi->lanes = device->lanes;  in mtk_dsi_host_attach()
794 	dsi->format = device->format;  in mtk_dsi_host_attach()
795 	dsi->mode_flags = device->mode_flags;  in mtk_dsi_host_attach()
805 	ret = readl_poll_timeout(dsi->regs + DSI_INTSTA, val, !(val & DSI_BUSY),  in mtk_dsi_wait_for_idle()
840 	const char *tx_buf = msg->tx_buf;  in mtk_dsi_cmdq()
841 	u8 config, cmdq_size, cmdq_off, type = msg->type;  in mtk_dsi_cmdq()
843 	u32 reg_cmdq_off = dsi->driver_data->reg_cmdq_off;  in mtk_dsi_cmdq()
848 		config = (msg->tx_len > 2) ? LONG_PACKET : SHORT_PACKET;  in mtk_dsi_cmdq()
850 	if (msg->tx_len > 2) {  in mtk_dsi_cmdq()
851 		cmdq_size = 1 + (msg->tx_len + 3) / 4;  in mtk_dsi_cmdq()
854 		reg_val = (msg->tx_len << 16) | (type << 8) | config;  in mtk_dsi_cmdq()
862 	for (i = 0; i < msg->tx_len; i++)  in mtk_dsi_cmdq()
880 		return -ETIME;  in mtk_dsi_host_send_cmd()
894 	if (readl(dsi->regs + DSI_MODE_CTRL) & MODE) {  in mtk_dsi_host_transfer()
896 		return -EINVAL;  in mtk_dsi_host_transfer()
899 	if (MTK_DSI_HOST_IS_READ(msg->type))  in mtk_dsi_host_transfer()
903 		return -ETIME;  in mtk_dsi_host_transfer()
905 	if (!MTK_DSI_HOST_IS_READ(msg->type))  in mtk_dsi_host_transfer()
908 	if (!msg->rx_buf) {  in mtk_dsi_host_transfer()
910 		return -EINVAL;  in mtk_dsi_host_transfer()
914 		*(read_data + i) = readb(dsi->regs + DSI_RX_DATA0 + i);  in mtk_dsi_host_transfer()
926 	if (recv_cnt > msg->rx_len)  in mtk_dsi_host_transfer()
927 		recv_cnt = msg->rx_len;  in mtk_dsi_host_transfer()
930 		memcpy(msg->rx_buf, src_addr, recv_cnt);  in mtk_dsi_host_transfer()
933 		 recv_cnt, *((u8 *)(msg->tx_buf)));  in mtk_dsi_host_transfer()
947 	ret = drm_simple_encoder_init(drm, &dsi->encoder,  in mtk_dsi_encoder_init()
954 	dsi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi->host.dev);  in mtk_dsi_encoder_init()
956 	ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,  in mtk_dsi_encoder_init()
961 	dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder);  in mtk_dsi_encoder_init()
962 	if (IS_ERR(dsi->connector)) {  in mtk_dsi_encoder_init()
964 		ret = PTR_ERR(dsi->connector);  in mtk_dsi_encoder_init()
967 	drm_connector_attach_encoder(dsi->connector, &dsi->encoder);  in mtk_dsi_encoder_init()
972 	drm_encoder_cleanup(&dsi->encoder);  in mtk_dsi_encoder_init()
992 	drm_encoder_cleanup(&dsi->encoder);  in mtk_dsi_unbind()
1003 	struct device *dev = &pdev->dev;  in mtk_dsi_probe()
1011 		return -ENOMEM;  in mtk_dsi_probe()
1013 	dsi->host.ops = &mtk_dsi_ops;  in mtk_dsi_probe()
1014 	dsi->host.dev = dev;  in mtk_dsi_probe()
1015 	ret = mipi_dsi_host_register(&dsi->host);  in mtk_dsi_probe()
1021 	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,  in mtk_dsi_probe()
1022 					  &panel, &dsi->next_bridge);  in mtk_dsi_probe()
1027 		dsi->next_bridge = devm_drm_panel_bridge_add(dev, panel);  in mtk_dsi_probe()
1028 		if (IS_ERR(dsi->next_bridge)) {  in mtk_dsi_probe()
1029 			ret = PTR_ERR(dsi->next_bridge);  in mtk_dsi_probe()
1034 	dsi->driver_data = of_device_get_match_data(dev);  in mtk_dsi_probe()
1036 	dsi->engine_clk = devm_clk_get(dev, "engine");  in mtk_dsi_probe()
1037 	if (IS_ERR(dsi->engine_clk)) {  in mtk_dsi_probe()
1038 		ret = PTR_ERR(dsi->engine_clk);  in mtk_dsi_probe()
1040 		if (ret != -EPROBE_DEFER)  in mtk_dsi_probe()
1045 	dsi->digital_clk = devm_clk_get(dev, "digital");  in mtk_dsi_probe()
1046 	if (IS_ERR(dsi->digital_clk)) {  in mtk_dsi_probe()
1047 		ret = PTR_ERR(dsi->digital_clk);  in mtk_dsi_probe()
1049 		if (ret != -EPROBE_DEFER)  in mtk_dsi_probe()
1054 	dsi->hs_clk = devm_clk_get(dev, "hs");  in mtk_dsi_probe()
1055 	if (IS_ERR(dsi->hs_clk)) {  in mtk_dsi_probe()
1056 		ret = PTR_ERR(dsi->hs_clk);  in mtk_dsi_probe()
1062 	dsi->regs = devm_ioremap_resource(dev, regs);  in mtk_dsi_probe()
1063 	if (IS_ERR(dsi->regs)) {  in mtk_dsi_probe()
1064 		ret = PTR_ERR(dsi->regs);  in mtk_dsi_probe()
1069 	dsi->phy = devm_phy_get(dev, "dphy");  in mtk_dsi_probe()
1070 	if (IS_ERR(dsi->phy)) {  in mtk_dsi_probe()
1071 		ret = PTR_ERR(dsi->phy);  in mtk_dsi_probe()
1072 		dev_err(dev, "Failed to get MIPI-DPHY: %d\n", ret);  in mtk_dsi_probe()
1078 		dev_err(&pdev->dev, "failed to get dsi irq_num: %d\n", irq_num);  in mtk_dsi_probe()
1083 	ret = devm_request_irq(&pdev->dev, irq_num, mtk_dsi_irq,  in mtk_dsi_probe()
1084 			       IRQF_TRIGGER_NONE, dev_name(&pdev->dev), dsi);  in mtk_dsi_probe()
1086 		dev_err(&pdev->dev, "failed to request mediatek dsi irq\n");  in mtk_dsi_probe()
1090 	init_waitqueue_head(&dsi->irq_wait_queue);  in mtk_dsi_probe()
1094 	dsi->bridge.funcs = &mtk_dsi_bridge_funcs;  in mtk_dsi_probe()
1095 	dsi->bridge.of_node = dev->of_node;  in mtk_dsi_probe()
1096 	dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;  in mtk_dsi_probe()
1098 	drm_bridge_add(&dsi->bridge);  in mtk_dsi_probe()
1100 	ret = component_add(&pdev->dev, &mtk_dsi_component_ops);  in mtk_dsi_probe()
1102 		dev_err(&pdev->dev, "failed to add component: %d\n", ret);  in mtk_dsi_probe()
1109 	mipi_dsi_host_unregister(&dsi->host);  in mtk_dsi_probe()
1118 	drm_bridge_remove(&dsi->bridge);  in mtk_dsi_remove()
1119 	component_del(&pdev->dev, &mtk_dsi_component_ops);  in mtk_dsi_remove()
1120 	mipi_dsi_host_unregister(&dsi->host);  in mtk_dsi_remove()
1140 	{ .compatible = "mediatek,mt2701-dsi",
1142 	{ .compatible = "mediatek,mt8173-dsi",
1144 	{ .compatible = "mediatek,mt8183-dsi",
1154 		.name = "mtk-dsi",