Lines Matching refs:pipe_mode
917 const struct drm_display_mode *pipe_mode = in pnv_update_wm() local
918 &crtc->config->hw.pipe_mode; in pnv_update_wm()
922 int clock = pipe_mode->crtc_clock; in pnv_update_wm()
1153 const struct drm_display_mode *pipe_mode = in g4x_compute_wm() local
1154 &crtc_state->hw.pipe_mode; in g4x_compute_wm()
1181 clock = pipe_mode->crtc_clock; in g4x_compute_wm()
1182 htotal = pipe_mode->crtc_htotal; in g4x_compute_wm()
1679 const struct drm_display_mode *pipe_mode = in vlv_compute_wm_level() local
1680 &crtc_state->hw.pipe_mode; in vlv_compute_wm_level()
1690 clock = pipe_mode->crtc_clock; in vlv_compute_wm_level()
1691 htotal = pipe_mode->crtc_htotal; in vlv_compute_wm_level()
2281 const struct drm_display_mode *pipe_mode = in i965_update_wm() local
2282 &crtc->config->hw.pipe_mode; in i965_update_wm()
2285 int clock = pipe_mode->crtc_clock; in i965_update_wm()
2286 int htotal = pipe_mode->crtc_htotal; in i965_update_wm()
2365 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2366 &crtc->config->hw.pipe_mode; in i9xx_update_wm()
2376 planea_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i9xx_update_wm()
2392 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2393 &crtc->config->hw.pipe_mode; in i9xx_update_wm()
2403 planeb_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i9xx_update_wm()
2441 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2442 &enabled->config->hw.pipe_mode; in i9xx_update_wm()
2445 int clock = pipe_mode->crtc_clock; in i9xx_update_wm()
2446 int htotal = pipe_mode->crtc_htotal; in i9xx_update_wm()
2494 const struct drm_display_mode *pipe_mode; in i845_update_wm() local
2502 pipe_mode = &crtc->config->hw.pipe_mode; in i845_update_wm()
2503 planea_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i845_update_wm()
2593 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_pri_wm()
2621 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_spr_wm()
2646 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_cur_wm()
3907 if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE) in skl_crtc_can_enable_sagv()
4118 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_ddb_weight() local
4129 drm_mode_get_hv_timing(pipe_mode, &hdisplay, &vdisplay); in intel_crtc_ddb_weight()
5355 crtc_htotal = crtc_state->hw.pipe_mode.crtc_htotal; in intel_get_linetime_us()
5527 crtc_state->hw.pipe_mode.crtc_htotal, in skl_compute_plane_wm()
5534 if ((wp->cpp * crtc_state->hw.pipe_mode.crtc_htotal / in skl_compute_plane_wm()