Lines Matching refs:FW_WM

374 #define FW_WM(value, plane) \  macro
930 reg |= FW_WM(wm, SR); in pnv_update_wm()
940 reg |= FW_WM(wm, CURSOR_SR); in pnv_update_wm()
949 reg |= FW_WM(wm, HPLL_SR); in pnv_update_wm()
958 reg |= FW_WM(wm, HPLL_CURSOR); in pnv_update_wm()
994 FW_WM(wm->sr.plane, SR) | in g4x_write_wm_values()
995 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in g4x_write_wm_values()
996 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | in g4x_write_wm_values()
997 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); in g4x_write_wm_values()
1000 FW_WM(wm->sr.fbc, FBC_SR) | in g4x_write_wm_values()
1001 FW_WM(wm->hpll.fbc, FBC_HPLL_SR) | in g4x_write_wm_values()
1002 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) | in g4x_write_wm_values()
1003 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in g4x_write_wm_values()
1004 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA)); in g4x_write_wm_values()
1007 FW_WM(wm->sr.cursor, CURSOR_SR) | in g4x_write_wm_values()
1008 FW_WM(wm->hpll.cursor, HPLL_CURSOR) | in g4x_write_wm_values()
1009 FW_WM(wm->hpll.plane, HPLL_SR)); in g4x_write_wm_values()
1044 FW_WM(wm->sr.plane, SR) | in vlv_write_wm_values()
1045 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in vlv_write_wm_values()
1050 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in vlv_write_wm_values()
1053 FW_WM(wm->sr.cursor, CURSOR_SR)); in vlv_write_wm_values()
1064 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); in vlv_write_wm_values()
1066 FW_WM(wm->sr.plane >> 9, SR_HI) | in vlv_write_wm_values()
1067 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | in vlv_write_wm_values()
1068 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | in vlv_write_wm_values()
1069 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | in vlv_write_wm_values()
1070 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | in vlv_write_wm_values()
1071 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | in vlv_write_wm_values()
1072 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | in vlv_write_wm_values()
1073 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | in vlv_write_wm_values()
1074 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | in vlv_write_wm_values()
1075 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); in vlv_write_wm_values()
1081 FW_WM(wm->sr.plane >> 9, SR_HI) | in vlv_write_wm_values()
1082 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | in vlv_write_wm_values()
1083 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | in vlv_write_wm_values()
1084 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | in vlv_write_wm_values()
1085 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | in vlv_write_wm_values()
1086 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | in vlv_write_wm_values()
1087 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); in vlv_write_wm_values()
2329 intel_uncore_write(&dev_priv->uncore, DSPFW1, FW_WM(srwm, SR) | in i965_update_wm()
2330 FW_WM(8, CURSORB) | in i965_update_wm()
2331 FW_WM(8, PLANEB) | in i965_update_wm()
2332 FW_WM(8, PLANEA)); in i965_update_wm()
2333 intel_uncore_write(&dev_priv->uncore, DSPFW2, FW_WM(8, CURSORA) | in i965_update_wm()
2334 FW_WM(8, PLANEC_OLD)); in i965_update_wm()
2336 intel_uncore_write(&dev_priv->uncore, DSPFW3, FW_WM(cursor_sr, CURSOR_SR)); in i965_update_wm()
2342 #undef FW_WM