Lines Matching refs:GEN2_IIR
255 intel_uncore_write16(uncore, GEN2_IIR, 0xffff); in gen2_irq_reset()
256 intel_uncore_posting_read16(uncore, GEN2_IIR); in gen2_irq_reset()
257 intel_uncore_write16(uncore, GEN2_IIR, 0xffff); in gen2_irq_reset()
258 intel_uncore_posting_read16(uncore, GEN2_IIR); in gen2_irq_reset()
282 u16 val = intel_uncore_read16(uncore, GEN2_IIR); in gen2_assert_iir_is_zero()
289 i915_mmio_reg_offset(GEN2_IIR), val); in gen2_assert_iir_is_zero()
290 intel_uncore_write16(uncore, GEN2_IIR, 0xffff); in gen2_assert_iir_is_zero()
291 intel_uncore_posting_read16(uncore, GEN2_IIR); in gen2_assert_iir_is_zero()
292 intel_uncore_write16(uncore, GEN2_IIR, 0xffff); in gen2_assert_iir_is_zero()
293 intel_uncore_posting_read16(uncore, GEN2_IIR); in gen2_assert_iir_is_zero()
4042 iir = intel_uncore_read16(&dev_priv->uncore, GEN2_IIR); in i8xx_irq_handler()
4055 intel_uncore_write16(&dev_priv->uncore, GEN2_IIR, iir); in i8xx_irq_handler()
4146 iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR); in i915_irq_handler()
4163 intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir); in i915_irq_handler()
4292 iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR); in i965_irq_handler()
4308 intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir); in i965_irq_handler()