Lines Matching refs:INTEL_INFO
1300 #define INTEL_INFO(dev_priv) (&(dev_priv)->__info) macro
1308 #define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
1309 #define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->graphics_ver, \
1310 INTEL_INFO(i915)->graphics_rel)
1314 #define MEDIA_VER(i915) (INTEL_INFO(i915)->media_ver)
1315 #define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->media_ver, \
1316 INTEL_INFO(i915)->media_rel)
1320 #define DISPLAY_VER(i915) (INTEL_INFO(i915)->display.ver)
1326 #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb)
1401 #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
1402 #define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
1425 INTEL_INFO(dev_priv)->gt == 1)
1458 INTEL_INFO(dev_priv)->gt == 3)
1462 INTEL_INFO(dev_priv)->gt == 3)
1464 INTEL_INFO(dev_priv)->gt == 1)
1477 INTEL_INFO(dev_priv)->gt == 2)
1479 INTEL_INFO(dev_priv)->gt == 3)
1481 INTEL_INFO(dev_priv)->gt == 4)
1483 INTEL_INFO(dev_priv)->gt == 2)
1485 INTEL_INFO(dev_priv)->gt == 3)
1491 INTEL_INFO(dev_priv)->gt == 2)
1493 INTEL_INFO(dev_priv)->gt == 3)
1500 INTEL_INFO(dev_priv)->gt == 2)
1584 #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
1608 #define HAS_LLC(dev_priv) (INTEL_INFO(dev_priv)->has_llc)
1609 #define HAS_SNOOP(dev_priv) (INTEL_INFO(dev_priv)->has_snoop)
1614 #define HWS_NEEDS_PHYSICAL(dev_priv) (INTEL_INFO(dev_priv)->hws_needs_physical)
1617 (INTEL_INFO(dev_priv)->has_logical_ring_contexts)
1619 (INTEL_INFO(dev_priv)->has_logical_ring_elsq)
1623 #define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_type)
1631 ((sizes) & ~INTEL_INFO(dev_priv)->page_sizes) == 0; \
1634 #define HAS_OVERLAY(dev_priv) (INTEL_INFO(dev_priv)->display.has_overlay)
1636 (INTEL_INFO(dev_priv)->display.overlay_needs_physical)
1658 #define SUPPORTS_TV(dev_priv) (INTEL_INFO(dev_priv)->display.supports_tv)
1659 #define I915_HAS_HOTPLUG(dev_priv) (INTEL_INFO(dev_priv)->display.has_hotplug)
1662 #define HAS_FBC(dev_priv) (INTEL_INFO(dev_priv)->display.has_fbc)
1667 #define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
1669 #define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
1670 #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
1671 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
1672 #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
1674 (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
1676 #define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) …
1678 #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
1679 #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
1682 #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps)
1684 #define HAS_DMC(dev_priv) (INTEL_INFO(dev_priv)->display.has_dmc)
1688 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
1689 #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
1692 (INTEL_INFO(dev_priv)->has_mslices)
1694 #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
1696 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
1699 #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc)
1701 #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu)
1703 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs)
1706 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
1711 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
1718 #define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)->pipe_mask))
1720 #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
1941 return (struct intel_device_info *)INTEL_INFO(dev_priv); in mkwrite_device_info()