Lines Matching refs:REG32

573 #define REG32(_reg, ...) \  macro
610 	REG32(GEN7_3DPRIM_END_OFFSET),
611 	REG32(GEN7_3DPRIM_START_VERTEX),
612 	REG32(GEN7_3DPRIM_VERTEX_COUNT),
613 	REG32(GEN7_3DPRIM_INSTANCE_COUNT),
614 	REG32(GEN7_3DPRIM_START_INSTANCE),
615 	REG32(GEN7_3DPRIM_BASE_VERTEX),
616 	REG32(GEN7_GPGPU_DISPATCHDIMX),
617 	REG32(GEN7_GPGPU_DISPATCHDIMY),
618 	REG32(GEN7_GPGPU_DISPATCHDIMZ),
628 	REG32(GEN7_SO_WRITE_OFFSET(0)),
629 	REG32(GEN7_SO_WRITE_OFFSET(1)),
630 	REG32(GEN7_SO_WRITE_OFFSET(2)),
631 	REG32(GEN7_SO_WRITE_OFFSET(3)),
632 	REG32(GEN7_L3SQCREG1),
633 	REG32(GEN7_L3CNTLREG2),
634 	REG32(GEN7_L3CNTLREG3),
655 	REG32(HSW_SCRATCH1,
658 	REG32(HSW_ROW_CHICKEN3,
667 	REG32(BCS_SWCTRL),
674 	REG32(BCS_SWCTRL),
696 #undef REG32