Lines Matching +full:global +full:- +full:reset
1 // SPDX-License-Identifier: MIT
45 h->gt = gt; in hang_init()
47 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
48 if (IS_ERR(h->ctx)) in hang_init()
49 return PTR_ERR(h->ctx); in hang_init()
51 GEM_BUG_ON(i915_gem_context_is_bannable(h->ctx)); in hang_init()
53 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
54 if (IS_ERR(h->hws)) { in hang_init()
55 err = PTR_ERR(h->hws); in hang_init()
59 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
60 if (IS_ERR(h->obj)) { in hang_init()
61 err = PTR_ERR(h->obj); in hang_init()
65 i915_gem_object_set_cache_coherency(h->hws, I915_CACHE_LLC); in hang_init()
66 vaddr = i915_gem_object_pin_map_unlocked(h->hws, I915_MAP_WB); in hang_init()
71 h->seqno = memset(vaddr, 0xff, PAGE_SIZE); in hang_init()
73 vaddr = i915_gem_object_pin_map_unlocked(h->obj, in hang_init()
74 i915_coherent_map_type(gt->i915, h->obj, false)); in hang_init()
79 h->batch = vaddr; in hang_init()
84 i915_gem_object_unpin_map(h->hws); in hang_init()
86 i915_gem_object_put(h->obj); in hang_init()
88 i915_gem_object_put(h->hws); in hang_init()
90 kernel_context_close(h->ctx); in hang_init()
97 return hws->node.start + offset_in_page(sizeof(u32)*rq->fence.context); in hws_address()
107 err = i915_request_await_object(rq, vma->obj, in move_to_active()
119 struct intel_gt *gt = h->gt; in hang_create_request()
120 struct i915_address_space *vm = i915_gem_context_get_vm_rcu(h->ctx); in hang_create_request()
129 obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_create_request()
135 vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false)); in hang_create_request()
142 i915_gem_object_unpin_map(h->obj); in hang_create_request()
143 i915_gem_object_put(h->obj); in hang_create_request()
145 h->obj = obj; in hang_create_request()
146 h->batch = vaddr; in hang_create_request()
148 vma = i915_vma_instance(h->obj, vm, NULL); in hang_create_request()
154 hws = i915_vma_instance(h->hws, vm, NULL); in hang_create_request()
170 rq = igt_request_alloc(h->ctx, engine); in hang_create_request()
184 batch = h->batch; in hang_create_request()
185 if (GRAPHICS_VER(gt->i915) >= 8) { in hang_create_request()
189 *batch++ = rq->fence.seqno; in hang_create_request()
197 *batch++ = lower_32_bits(vma->node.start); in hang_create_request()
198 *batch++ = upper_32_bits(vma->node.start); in hang_create_request()
199 } else if (GRAPHICS_VER(gt->i915) >= 6) { in hang_create_request()
203 *batch++ = rq->fence.seqno; in hang_create_request()
211 *batch++ = lower_32_bits(vma->node.start); in hang_create_request()
212 } else if (GRAPHICS_VER(gt->i915) >= 4) { in hang_create_request()
216 *batch++ = rq->fence.seqno; in hang_create_request()
224 *batch++ = lower_32_bits(vma->node.start); in hang_create_request()
228 *batch++ = rq->fence.seqno; in hang_create_request()
236 *batch++ = lower_32_bits(vma->node.start); in hang_create_request()
239 intel_gt_chipset_flush(engine->gt); in hang_create_request()
241 if (rq->engine->emit_init_breadcrumb) { in hang_create_request()
242 err = rq->engine->emit_init_breadcrumb(rq); in hang_create_request()
248 if (GRAPHICS_VER(gt->i915) <= 5) in hang_create_request()
251 err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags); in hang_create_request()
268 return READ_ONCE(h->seqno[rq->fence.context % (PAGE_SIZE/sizeof(u32))]); in hws_seqno()
273 *h->batch = MI_BATCH_BUFFER_END; in hang_fini()
274 intel_gt_chipset_flush(h->gt); in hang_fini()
276 i915_gem_object_unpin_map(h->obj); in hang_fini()
277 i915_gem_object_put(h->obj); in hang_fini()
279 i915_gem_object_unpin_map(h->hws); in hang_fini()
280 i915_gem_object_put(h->hws); in hang_fini()
282 kernel_context_close(h->ctx); in hang_fini()
284 igt_flush_test(h->gt->i915); in hang_fini()
290 rq->fence.seqno), in wait_until_running()
293 rq->fence.seqno), in wait_until_running()
323 engine->name, err); in igt_hang_sanitycheck()
330 intel_gt_chipset_flush(engine->gt); in igt_hang_sanitycheck()
339 timeout = -EIO; in igt_hang_sanitycheck()
346 engine->name, err); in igt_hang_sanitycheck()
364 struct i915_gpu_error *global = >->i915->gpu_error; in igt_reset_nop() local
371 /* Check that we can reset during non-user portions of requests */ in igt_reset_nop()
373 reset_count = i915_reset_count(global); in igt_reset_nop()
383 pr_err("[%s] Create context failed: %d!\n", engine->name, err); in igt_reset_nop()
394 engine->name, err); in igt_reset_nop()
409 pr_err("[%s] GT is wedged!\n", engine->name); in igt_reset_nop()
410 err = -EIO; in igt_reset_nop()
414 if (i915_reset_count(global) != reset_count + ++count) { in igt_reset_nop()
415 pr_err("[%s] Reset not recorded: %d vs %d + %d!\n", in igt_reset_nop()
416 engine->name, i915_reset_count(global), reset_count, count); in igt_reset_nop()
417 err = -EINVAL; in igt_reset_nop()
421 err = igt_flush_test(gt->i915); in igt_reset_nop()
423 pr_err("[%s] Flush failed: %d!\n", engine->name, err); in igt_reset_nop()
429 if (igt_flush_test(gt->i915)) { in igt_reset_nop()
431 err = -EIO; in igt_reset_nop()
440 struct i915_gpu_error *global = >->i915->gpu_error; in igt_reset_nop_engine() local
444 /* Check that we can engine-reset during non-user portions */ in igt_reset_nop_engine()
458 * more. Thus a nop batch cannot be used as a reset test in igt_reset_nop_engine()
465 pr_err("[%s] Create context failed: %pe!\n", engine->name, ce); in igt_reset_nop_engine()
469 reset_count = i915_reset_count(global); in igt_reset_nop_engine()
470 reset_engine_count = i915_reset_engine_count(global, engine); in igt_reset_nop_engine()
474 set_bit(I915_RESET_ENGINE + id, >->reset.flags); in igt_reset_nop_engine()
479 pr_err("%s failed to idle before reset\n", in igt_reset_nop_engine()
480 engine->name); in igt_reset_nop_engine()
481 err = -EIO; in igt_reset_nop_engine()
491 drm_info_printer(gt->i915->drm.dev); in igt_reset_nop_engine()
495 engine->name); in igt_reset_nop_engine()
499 engine->name); in igt_reset_nop_engine()
513 engine->name, err); in igt_reset_nop_engine()
517 if (i915_reset_count(global) != reset_count) { in igt_reset_nop_engine()
518 pr_err("Full GPU reset recorded! (engine reset expected)\n"); in igt_reset_nop_engine()
519 err = -EINVAL; in igt_reset_nop_engine()
523 if (i915_reset_engine_count(global, engine) != in igt_reset_nop_engine()
525 pr_err("%s engine reset not recorded!\n", in igt_reset_nop_engine()
526 engine->name); in igt_reset_nop_engine()
527 err = -EINVAL; in igt_reset_nop_engine()
531 clear_bit(I915_RESET_ENGINE + id, >->reset.flags); in igt_reset_nop_engine()
534 pr_info("%s(%s): %d resets\n", __func__, engine->name, count); in igt_reset_nop_engine()
537 if (igt_flush_test(gt->i915)) in igt_reset_nop_engine()
538 err = -EIO; in igt_reset_nop_engine()
548 engine->reset_timeout.probability = 999; in force_reset_timeout()
549 atomic_set(&engine->reset_timeout.times, -1); in force_reset_timeout()
554 memset(&engine->reset_timeout, 0, sizeof(engine->reset_timeout)); in cancel_reset_timeout()
563 /* Check that we can recover from engine-reset failues */ in igt_reset_fail_engine()
574 /* Can't manually break the reset if i915 doesn't perform it */ in igt_reset_fail_engine()
580 pr_err("[%s] Create context failed: %pe!\n", engine->name, ce); in igt_reset_fail_engine()
585 set_bit(I915_RESET_ENGINE + id, >->reset.flags); in igt_reset_fail_engine()
599 pr_err("%s failed to idle before reset\n", in igt_reset_fail_engine()
600 engine->name); in igt_reset_fail_engine()
601 err = -EIO; in igt_reset_fail_engine()
611 drm_info_printer(gt->i915->drm.dev); in igt_reset_fail_engine()
615 engine->name); in igt_reset_fail_engine()
619 engine->name); in igt_reset_fail_engine()
640 engine->name, err); in igt_reset_fail_engine()
649 if (err != -ETIMEDOUT) { in igt_reset_fail_engine()
651 engine->name, err); in igt_reset_fail_engine()
661 drm_info_printer(gt->i915->drm.dev); in igt_reset_fail_engine()
666 engine->name); in igt_reset_fail_engine()
670 engine->name); in igt_reset_fail_engine()
673 err = -EIO; in igt_reset_fail_engine()
680 pr_info("%s(%s): %d resets\n", __func__, engine->name, count); in igt_reset_fail_engine()
682 clear_bit(I915_RESET_ENGINE + id, >->reset.flags); in igt_reset_fail_engine()
686 if (igt_flush_test(gt->i915)) in igt_reset_fail_engine()
687 err = -EIO; in igt_reset_fail_engine()
697 struct i915_gpu_error *global = >->i915->gpu_error; in __igt_reset_engine() local
703 /* Check that we can issue an engine reset on an idle engine (no-op) */ in __igt_reset_engine()
727 pr_err("%s failed to idle before reset\n", in __igt_reset_engine()
728 engine->name); in __igt_reset_engine()
729 err = -EIO; in __igt_reset_engine()
733 reset_count = i915_reset_count(global); in __igt_reset_engine()
734 reset_engine_count = i915_reset_engine_count(global, engine); in __igt_reset_engine()
737 set_bit(I915_RESET_ENGINE + id, >->reset.flags); in __igt_reset_engine()
747 pr_err("[%s] Modify policy failed: %d!\n", engine->name, err); in __igt_reset_engine()
756 engine->name, err); in __igt_reset_engine()
764 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in __igt_reset_engine()
767 __func__, rq->fence.seqno, hws_seqno(&h, rq)); in __igt_reset_engine()
769 "%s\n", engine->name); in __igt_reset_engine()
772 err = -EIO; in __igt_reset_engine()
781 engine->name, err); in __igt_reset_engine()
787 /* Ensure the reset happens and kills the engine */ in __igt_reset_engine()
791 engine->name, rq->fence.context, in __igt_reset_engine()
792 rq->fence.seqno, rq->context->guc_id, err); in __igt_reset_engine()
799 if (i915_reset_count(global) != reset_count) { in __igt_reset_engine()
800 pr_err("Full GPU reset recorded! (engine reset expected)\n"); in __igt_reset_engine()
801 err = -EINVAL; in __igt_reset_engine()
807 if (i915_reset_engine_count(global, engine) != in __igt_reset_engine()
809 pr_err("%s engine reset not recorded!\n", in __igt_reset_engine()
810 engine->name); in __igt_reset_engine()
811 err = -EINVAL; in __igt_reset_engine()
821 pr_err("[%s] Restore policy failed: %d!\n", engine->name, err); in __igt_reset_engine()
827 clear_bit(I915_RESET_ENGINE + id, >->reset.flags); in __igt_reset_engine()
830 engine->name, count, active ? "active" : "idle"); in __igt_reset_engine()
835 err = igt_flush_test(gt->i915); in __igt_reset_engine()
837 pr_err("[%s] Flush failed: %d!\n", engine->name, err); in __igt_reset_engine()
844 err = -EIO; in __igt_reset_engine()
884 rq->engine->name, in active_request_put()
885 rq->fence.context, in active_request_put()
886 rq->fence.seqno); in active_request_put()
889 intel_gt_set_wedged(rq->engine->gt); in active_request_put()
890 err = -EIO; in active_request_put()
902 struct intel_engine_cs *engine = arg->engine; in active_engine()
912 pr_err("[%s] Create context #%ld failed: %d!\n", engine->name, count, err); in active_engine()
913 while (--count) in active_engine()
921 unsigned int idx = count++ & (ARRAY_SIZE(rq) - 1); in active_engine()
928 pr_err("[%s] Create request #%d failed: %d!\n", engine->name, idx, err); in active_engine()
935 if (engine->sched_engine->schedule && arg->flags & TEST_PRIORITY) { in active_engine()
940 engine->sched_engine->schedule(rq[idx], &attr); in active_engine()
945 pr_err("[%s] Request put failed: %d!\n", engine->name, err); in active_engine()
956 pr_err("[%s] Request put #%ld failed: %d!\n", engine->name, count, err); in active_engine()
972 struct i915_gpu_error *global = >->i915->gpu_error; in __igt_reset_engines() local
978 /* Check that issuing a reset on one engine does not interfere in __igt_reset_engines()
991 h.ctx->sched.priority = 1024; in __igt_reset_engines()
996 unsigned long device = i915_reset_count(global); in __igt_reset_engines()
1008 pr_err("i915_reset_engine(%s:%s): failed to idle before reset\n", in __igt_reset_engines()
1009 engine->name, test_name); in __igt_reset_engines()
1010 err = -EIO; in __igt_reset_engines()
1019 i915_reset_engine_count(global, other); in __igt_reset_engines()
1031 "igt/%s", other->name); in __igt_reset_engines()
1034 pr_err("[%s] Thread spawn failed: %d!\n", engine->name, err); in __igt_reset_engines()
1045 set_bit(I915_RESET_ENGINE + id, >->reset.flags); in __igt_reset_engines()
1054 pr_err("[%s] Modify policy failed: %d!\n", engine->name, err); in __igt_reset_engines()
1063 engine->name, err); in __igt_reset_engines()
1071 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in __igt_reset_engines()
1074 __func__, rq->fence.seqno, hws_seqno(&h, rq)); in __igt_reset_engines()
1076 "%s\n", engine->name); in __igt_reset_engines()
1079 err = -EIO; in __igt_reset_engines()
1090 engine->name, test_name, err); in __igt_reset_engines()
1096 /* Ensure the reset happens and kills the engine */ in __igt_reset_engines()
1100 engine->name, rq->fence.context, in __igt_reset_engines()
1101 rq->fence.seqno, rq->context->guc_id, err); in __igt_reset_engines()
1107 if (rq->fence.error != -EIO) { in __igt_reset_engines()
1108 pr_err("i915_reset_engine(%s:%s): failed to reset request %lld:%lld [0x%04X]\n", in __igt_reset_engines()
1109 engine->name, test_name, in __igt_reset_engines()
1110 rq->fence.context, in __igt_reset_engines()
1111 rq->fence.seqno, rq->context->guc_id); in __igt_reset_engines()
1116 err = -EIO; in __igt_reset_engines()
1122 drm_info_printer(gt->i915->drm.dev); in __igt_reset_engines()
1125 " failed to complete request %llx:%lld after reset\n", in __igt_reset_engines()
1126 engine->name, test_name, in __igt_reset_engines()
1127 rq->fence.context, in __igt_reset_engines()
1128 rq->fence.seqno); in __igt_reset_engines()
1130 "%s\n", engine->name); in __igt_reset_engines()
1135 err = -EIO; in __igt_reset_engines()
1147 drm_info_printer(gt->i915->drm.dev); in __igt_reset_engines()
1150 " failed to idle after reset\n", in __igt_reset_engines()
1151 engine->name, test_name); in __igt_reset_engines()
1153 "%s\n", engine->name); in __igt_reset_engines()
1155 err = -EIO; in __igt_reset_engines()
1162 pr_err("[%s] Restore policy failed: %d!\n", engine->name, err2); in __igt_reset_engines()
1168 clear_bit(I915_RESET_ENGINE + id, >->reset.flags); in __igt_reset_engines()
1172 engine->name, test_name, count); in __igt_reset_engines()
1176 reported = i915_reset_engine_count(global, engine); in __igt_reset_engines()
1177 reported -= threads[engine->id].resets; in __igt_reset_engines()
1179 pr_err("i915_reset_engine(%s:%s): reset %lu times, but reported %lu\n", in __igt_reset_engines()
1180 engine->name, test_name, count, reported); in __igt_reset_engines()
1182 err = -EINVAL; in __igt_reset_engines()
1196 other->name, ret); in __igt_reset_engines()
1204 if (other->uabi_class != engine->uabi_class && in __igt_reset_engines()
1206 i915_reset_engine_count(global, other)) { in __igt_reset_engines()
1207 pr_err("Innocent engine %s was reset (count=%ld)\n", in __igt_reset_engines()
1208 other->name, in __igt_reset_engines()
1209 i915_reset_engine_count(global, other) - in __igt_reset_engines()
1212 err = -EINVAL; in __igt_reset_engines()
1217 if (device != i915_reset_count(global)) { in __igt_reset_engines()
1218 pr_err("Global reset (count=%ld)!\n", in __igt_reset_engines()
1219 i915_reset_count(global) - device); in __igt_reset_engines()
1221 err = -EINVAL; in __igt_reset_engines()
1227 err = igt_flush_test(gt->i915); in __igt_reset_engines()
1229 pr_err("[%s] Flush failed: %d!\n", engine->name, err); in __igt_reset_engines()
1235 err = -EIO; in __igt_reset_engines()
1251 { "others-idle", TEST_OTHERS }, in igt_reset_engines()
1252 { "others-active", TEST_OTHERS | TEST_ACTIVE }, in igt_reset_engines()
1254 "others-priority", in igt_reset_engines()
1258 "self-priority", in igt_reset_engines()
1267 for (p = phases; p->name; p++) { in igt_reset_engines()
1268 if (p->flags & TEST_PRIORITY) { in igt_reset_engines()
1269 if (!(gt->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY)) in igt_reset_engines()
1273 err = __igt_reset_engines(arg, p->name, p->flags); in igt_reset_engines()
1283 u32 count = i915_reset_count(>->i915->gpu_error); in fake_hangcheck()
1293 struct i915_gpu_error *global = >->i915->gpu_error; in igt_reset_wait() local
1294 struct intel_engine_cs *engine = gt->engine[RCS0]; in igt_reset_wait()
1304 /* Check that we detect a stuck waiter and issue a reset */ in igt_reset_wait()
1310 pr_err("[%s] Hang init failed: %d!\n", engine->name, err); in igt_reset_wait()
1317 pr_err("[%s] Create hang request failed: %d!\n", engine->name, err); in igt_reset_wait()
1325 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in igt_reset_wait()
1328 __func__, rq->fence.seqno, hws_seqno(&h, rq)); in igt_reset_wait()
1329 intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name); in igt_reset_wait()
1333 err = -EIO; in igt_reset_wait()
1347 if (i915_reset_count(global) == reset_count) { in igt_reset_wait()
1348 pr_err("No GPU reset recorded!\n"); in igt_reset_wait()
1349 err = -EINVAL; in igt_reset_wait()
1361 return -EIO; in igt_reset_wait()
1374 struct i915_address_space *vm = arg->vma->vm; in evict_vma()
1375 struct drm_mm_node evict = arg->vma->node; in evict_vma()
1378 complete(&arg->completion); in evict_vma()
1380 mutex_lock(&vm->mutex); in evict_vma()
1382 mutex_unlock(&vm->mutex); in evict_vma()
1392 complete(&arg->completion); in evict_fence()
1395 err = i915_gem_object_set_tiling(arg->vma->obj, I915_TILING_Y, 512); in evict_fence()
1397 pr_err("Invalid Y-tiling settings; err:%d\n", err); in evict_fence()
1401 err = i915_vma_pin(arg->vma, 0, 0, PIN_GLOBAL | PIN_MAPPABLE); in evict_fence()
1403 pr_err("Unable to pin vma for Y-tiled fence; err:%d\n", err); in evict_fence()
1407 err = i915_vma_pin_fence(arg->vma); in evict_fence()
1408 i915_vma_unpin(arg->vma); in evict_fence()
1410 pr_err("Unable to pin Y-tiled fence; err:%d\n", err); in evict_fence()
1414 i915_vma_unpin_fence(arg->vma); in evict_fence()
1424 struct intel_engine_cs *engine = gt->engine[RCS0]; in __igt_reset_evict_vma()
1433 if (!gt->ggtt->num_fences && flags & EXEC_OBJECT_NEEDS_FENCE) in __igt_reset_evict_vma()
1443 pr_err("[%s] Hang init failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1447 obj = i915_gem_object_create_internal(gt->i915, SZ_1M); in __igt_reset_evict_vma()
1450 pr_err("[%s] Create object failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1457 pr_err("Invalid X-tiling settings; err:%d\n", err); in __igt_reset_evict_vma()
1465 pr_err("[%s] VMA instance failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1472 pr_err("[%s] Create hang request failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1484 pr_err("[%s] VMA pin failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1491 pr_err("Unable to pin X-tiled fence; err:%d\n", err); in __igt_reset_evict_vma()
1499 err = i915_request_await_object(rq, arg.vma->obj, in __igt_reset_evict_vma()
1504 pr_err("[%s] Move to active failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1506 pr_err("[%s] Request await failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1521 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in __igt_reset_evict_vma()
1524 __func__, rq->fence.seqno, hws_seqno(&h, rq)); in __igt_reset_evict_vma()
1525 intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name); in __igt_reset_evict_vma()
1536 pr_err("[%s] Thread spawn failed: %d!\n", engine->name, err); in __igt_reset_evict_vma()
1544 if (wait_for(!list_empty(&rq->fence.cb_list), 10)) { in __igt_reset_evict_vma()
1545 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in __igt_reset_evict_vma()
1548 intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name); in __igt_reset_evict_vma()
1556 fake_hangcheck(gt, rq->engine->mask); in __igt_reset_evict_vma()
1562 /* The reset, even indirectly, should take less than 10ms. */ in __igt_reset_evict_vma()
1576 return -EIO; in __igt_reset_evict_vma()
1585 return __igt_reset_evict_vma(gt, >->ggtt->vm, in igt_reset_evict_ggtt()
1595 /* aliasing == global gtt locking, covered above */ in igt_reset_evict_ppgtt()
1596 if (INTEL_PPGTT(gt->i915) < INTEL_PPGTT_FULL) in igt_reset_evict_ppgtt()
1603 err = __igt_reset_evict_vma(gt, &ppgtt->vm, in igt_reset_evict_ppgtt()
1605 i915_vm_put(&ppgtt->vm); in igt_reset_evict_ppgtt()
1614 return __igt_reset_evict_vma(gt, >->ggtt->vm, in igt_reset_evict_fence()
1629 return -EIO; in wait_for_others()
1638 struct i915_gpu_error *global = >->i915->gpu_error; in igt_reset_queue() local
1666 pr_err("[%s] Modify policy failed: %d!\n", engine->name, err); in igt_reset_queue()
1674 pr_err("[%s] Create 'prev' hang request failed: %d!\n", engine->name, err); in igt_reset_queue()
1689 pr_err("[%s] Create hang request failed: %d!\n", engine->name, err); in igt_reset_queue()
1698 * very well. If we trigger a device reset twice in in igt_reset_queue()
1708 pr_err("%s(%s): Failed to idle other inactive engines after device reset\n", in igt_reset_queue()
1709 __func__, engine->name); in igt_reset_queue()
1719 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in igt_reset_queue()
1722 __func__, engine->name, in igt_reset_queue()
1723 prev->fence.seqno, hws_seqno(&h, prev)); in igt_reset_queue()
1725 "%s\n", engine->name); in igt_reset_queue()
1732 err = -EIO; in igt_reset_queue()
1738 if (prev->fence.error != -EIO) { in igt_reset_queue()
1739 pr_err("GPU reset not recorded on hanging request [fence.error=%d]!\n", in igt_reset_queue()
1740 prev->fence.error); in igt_reset_queue()
1743 err = -EINVAL; in igt_reset_queue()
1747 if (rq->fence.error) { in igt_reset_queue()
1748 pr_err("Fence error status not zero [%d] after unrelated reset\n", in igt_reset_queue()
1749 rq->fence.error); in igt_reset_queue()
1752 err = -EINVAL; in igt_reset_queue()
1756 if (i915_reset_count(global) == reset_count) { in igt_reset_queue()
1757 pr_err("No GPU reset recorded!\n"); in igt_reset_queue()
1760 err = -EINVAL; in igt_reset_queue()
1769 engine->name, count); in igt_reset_queue()
1772 intel_gt_chipset_flush(engine->gt); in igt_reset_queue()
1782 __func__, __LINE__, engine->name, err2); in igt_reset_queue()
1789 err = igt_flush_test(gt->i915); in igt_reset_queue()
1791 pr_err("[%s] Flush failed: %d!\n", engine->name, err); in igt_reset_queue()
1802 return -EIO; in igt_reset_queue()
1810 struct i915_gpu_error *global = >->i915->gpu_error; in igt_handle_error() local
1811 struct intel_engine_cs *engine = gt->engine[RCS0]; in igt_handle_error()
1817 /* Check that we can issue a global GPU and engine reset */ in igt_handle_error()
1827 pr_err("[%s] Hang init failed: %d!\n", engine->name, err); in igt_handle_error()
1834 pr_err("[%s] Create hang request failed: %d!\n", engine->name, err); in igt_handle_error()
1842 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); in igt_handle_error()
1845 __func__, rq->fence.seqno, hws_seqno(&h, rq)); in igt_handle_error()
1846 intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name); in igt_handle_error()
1850 err = -EIO; in igt_handle_error()
1855 error = xchg(&global->first_error, (void *)-1); in igt_handle_error()
1857 intel_gt_handle_error(gt, engine->mask, 0, NULL); in igt_handle_error()
1859 xchg(&global->first_error, error); in igt_handle_error()
1861 if (rq->fence.error != -EIO) { in igt_handle_error()
1863 err = -EINVAL; in igt_handle_error()
1878 struct tasklet_struct * const t = &engine->sched_engine->tasklet; in __igt_atomic_reset_engine()
1882 engine->name, mode, p->name); in __igt_atomic_reset_engine()
1884 if (t->func) in __igt_atomic_reset_engine()
1886 if (strcmp(p->name, "softirq")) in __igt_atomic_reset_engine()
1888 p->critical_section_begin(); in __igt_atomic_reset_engine()
1892 p->critical_section_end(); in __igt_atomic_reset_engine()
1893 if (strcmp(p->name, "softirq")) in __igt_atomic_reset_engine()
1895 if (t->func) { in __igt_atomic_reset_engine()
1902 engine->name, mode, p->name); in __igt_atomic_reset_engine()
1918 err = hang_init(&h, engine->gt); in igt_atomic_reset_engine()
1920 pr_err("[%s] Hang init failed: %d!\n", engine->name, err); in igt_atomic_reset_engine()
1927 pr_err("[%s] Create hang request failed: %d!\n", engine->name, err); in igt_atomic_reset_engine()
1938 __func__, engine->name, in igt_atomic_reset_engine()
1939 rq->fence.seqno, hws_seqno(&h, rq)); in igt_atomic_reset_engine()
1940 intel_gt_set_wedged(engine->gt); in igt_atomic_reset_engine()
1941 err = -EIO; in igt_atomic_reset_engine()
1947 intel_wedge_on_timeout(&w, engine->gt, HZ / 20 /* 50ms */) in igt_atomic_reset_engine()
1949 if (intel_gt_is_wedged(engine->gt)) in igt_atomic_reset_engine()
1950 err = -EIO; in igt_atomic_reset_engine()
1970 if (intel_uc_uses_guc_submission(>->uc)) in igt_reset_engines_atomic()
1979 for (p = igt_atomic_phases; p->name; p++) { in igt_reset_engines_atomic()
1991 /* As we poke around the guts, do a full reset before continuing. */ in igt_reset_engines_atomic()
2017 struct intel_gt *gt = &i915->gt; in intel_hangcheck_live_selftests()
2025 return -EIO; /* we're long past hope of a successful reset */ in intel_hangcheck_live_selftests()
2027 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in intel_hangcheck_live_selftests()
2031 intel_runtime_pm_put(gt->uncore->rpm, wakeref); in intel_hangcheck_live_selftests()