Lines Matching +full:0 +full:x280
25 #define POSTED BIT(0) in set_offsets()
26 #define REG(x) (((x) >> 2) | BUILD_BUG_ON_ZERO(x >= 0x200)) in set_offsets()
28 (((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x10000)), \ in set_offsets()
29 (((x) >> 2) & 0x7f) in set_offsets()
30 #define END 0 in set_offsets()
43 count = *data & 0x3f; in set_offsets()
56 u32 offset = 0; in set_offsets()
65 regs[0] = base + (offset << 2); in set_offsets()
74 *regs |= BIT(0); in set_offsets()
80 LRI(11, 0),
81 REG16(0x244),
82 REG(0x034),
83 REG(0x030),
84 REG(0x038),
85 REG(0x03c),
86 REG(0x168),
87 REG(0x140),
88 REG(0x110),
89 REG(0x11c),
90 REG(0x114),
91 REG(0x118),
94 LRI(9, 0),
95 REG16(0x3a8),
96 REG16(0x28c),
97 REG16(0x288),
98 REG16(0x284),
99 REG16(0x280),
100 REG16(0x27c),
101 REG16(0x278),
102 REG16(0x274),
103 REG16(0x270),
106 LRI(2, 0),
107 REG16(0x200),
108 REG(0x028),
116 REG16(0x244),
117 REG(0x034),
118 REG(0x030),
119 REG(0x038),
120 REG(0x03c),
121 REG(0x168),
122 REG(0x140),
123 REG(0x110),
124 REG(0x11c),
125 REG(0x114),
126 REG(0x118),
127 REG(0x1c0),
128 REG(0x1c4),
129 REG(0x1c8),
133 REG16(0x3a8),
134 REG16(0x28c),
135 REG16(0x288),
136 REG16(0x284),
137 REG16(0x280),
138 REG16(0x27c),
139 REG16(0x278),
140 REG16(0x274),
141 REG16(0x270),
145 REG16(0x200),
149 REG(0x028),
150 REG(0x09c),
151 REG(0x0c0),
152 REG(0x178),
153 REG(0x17c),
154 REG16(0x358),
155 REG(0x170),
156 REG(0x150),
157 REG(0x154),
158 REG(0x158),
159 REG16(0x41c),
160 REG16(0x600),
161 REG16(0x604),
162 REG16(0x608),
163 REG16(0x60c),
164 REG16(0x610),
165 REG16(0x614),
166 REG16(0x618),
167 REG16(0x61c),
168 REG16(0x620),
169 REG16(0x624),
170 REG16(0x628),
171 REG16(0x62c),
172 REG16(0x630),
173 REG16(0x634),
174 REG16(0x638),
175 REG16(0x63c),
176 REG16(0x640),
177 REG16(0x644),
178 REG16(0x648),
179 REG16(0x64c),
180 REG16(0x650),
181 REG16(0x654),
182 REG16(0x658),
183 REG16(0x65c),
184 REG16(0x660),
185 REG16(0x664),
186 REG16(0x668),
187 REG16(0x66c),
188 REG16(0x670),
189 REG16(0x674),
190 REG16(0x678),
191 REG16(0x67c),
192 REG(0x068),
200 REG16(0x244),
201 REG(0x034),
202 REG(0x030),
203 REG(0x038),
204 REG(0x03c),
205 REG(0x168),
206 REG(0x140),
207 REG(0x110),
208 REG(0x1c0),
209 REG(0x1c4),
210 REG(0x1c8),
211 REG(0x180),
212 REG16(0x2b4),
216 REG16(0x3a8),
217 REG16(0x28c),
218 REG16(0x288),
219 REG16(0x284),
220 REG16(0x280),
221 REG16(0x27c),
222 REG16(0x278),
223 REG16(0x274),
224 REG16(0x270),
232 REG16(0x244),
233 REG(0x034),
234 REG(0x030),
235 REG(0x038),
236 REG(0x03c),
237 REG(0x168),
238 REG(0x140),
239 REG(0x110),
240 REG(0x11c),
241 REG(0x114),
242 REG(0x118),
243 REG(0x1c0),
244 REG(0x1c4),
245 REG(0x1c8),
249 REG16(0x3a8),
250 REG16(0x28c),
251 REG16(0x288),
252 REG16(0x284),
253 REG16(0x280),
254 REG16(0x27c),
255 REG16(0x278),
256 REG16(0x274),
257 REG16(0x270),
260 LRI(1, 0),
261 REG(0x0c8),
269 REG16(0x244),
270 REG(0x34),
271 REG(0x30),
272 REG(0x38),
273 REG(0x3c),
274 REG(0x168),
275 REG(0x140),
276 REG(0x110),
277 REG(0x11c),
278 REG(0x114),
279 REG(0x118),
280 REG(0x1c0),
281 REG(0x1c4),
282 REG(0x1c8),
286 REG16(0x3a8),
287 REG16(0x28c),
288 REG16(0x288),
289 REG16(0x284),
290 REG16(0x280),
291 REG16(0x27c),
292 REG16(0x278),
293 REG16(0x274),
294 REG16(0x270),
297 LRI(1, 0),
298 REG(0xc8),
302 REG(0x28),
303 REG(0x9c),
304 REG(0xc0),
305 REG(0x178),
306 REG(0x17c),
307 REG16(0x358),
308 REG(0x170),
309 REG(0x150),
310 REG(0x154),
311 REG(0x158),
312 REG16(0x41c),
313 REG16(0x600),
314 REG16(0x604),
315 REG16(0x608),
316 REG16(0x60c),
317 REG16(0x610),
318 REG16(0x614),
319 REG16(0x618),
320 REG16(0x61c),
321 REG16(0x620),
322 REG16(0x624),
323 REG16(0x628),
324 REG16(0x62c),
325 REG16(0x630),
326 REG16(0x634),
327 REG16(0x638),
328 REG16(0x63c),
329 REG16(0x640),
330 REG16(0x644),
331 REG16(0x648),
332 REG16(0x64c),
333 REG16(0x650),
334 REG16(0x654),
335 REG16(0x658),
336 REG16(0x65c),
337 REG16(0x660),
338 REG16(0x664),
339 REG16(0x668),
340 REG16(0x66c),
341 REG16(0x670),
342 REG16(0x674),
343 REG16(0x678),
344 REG16(0x67c),
345 REG(0x68),
353 REG16(0x244),
354 REG(0x034),
355 REG(0x030),
356 REG(0x038),
357 REG(0x03c),
358 REG(0x168),
359 REG(0x140),
360 REG(0x110),
361 REG(0x11c),
362 REG(0x114),
363 REG(0x118),
364 REG(0x1c0),
365 REG(0x1c4),
366 REG(0x1c8),
367 REG(0x180),
371 REG16(0x3a8),
372 REG16(0x28c),
373 REG16(0x288),
374 REG16(0x284),
375 REG16(0x280),
376 REG16(0x27c),
377 REG16(0x278),
378 REG16(0x274),
379 REG16(0x270),
382 REG(0x1b0),
385 LRI(1, 0),
386 REG(0x0c8),
394 REG16(0x244),
395 REG(0x034),
396 REG(0x030),
397 REG(0x038),
398 REG(0x03c),
399 REG(0x168),
400 REG(0x140),
401 REG(0x110),
402 REG(0x1c0),
403 REG(0x1c4),
404 REG(0x1c8),
405 REG(0x180),
406 REG16(0x2b4),
410 REG16(0x3a8),
411 REG16(0x28c),
412 REG16(0x288),
413 REG16(0x284),
414 REG16(0x280),
415 REG16(0x27c),
416 REG16(0x278),
417 REG16(0x274),
418 REG16(0x270),
421 REG(0x1b0),
422 REG16(0x5a8),
423 REG16(0x5ac),
426 LRI(1, 0),
427 REG(0x0c8),
431 REG16(0x588),
432 REG16(0x588),
433 REG16(0x588),
434 REG16(0x588),
435 REG16(0x588),
436 REG16(0x588),
437 REG(0x028),
438 REG(0x09c),
439 REG(0x0c0),
440 REG(0x178),
441 REG(0x17c),
442 REG16(0x358),
443 REG(0x170),
444 REG(0x150),
445 REG(0x154),
446 REG(0x158),
447 REG16(0x41c),
448 REG16(0x600),
449 REG16(0x604),
450 REG16(0x608),
451 REG16(0x60c),
452 REG16(0x610),
453 REG16(0x614),
454 REG16(0x618),
455 REG16(0x61c),
456 REG16(0x620),
457 REG16(0x624),
458 REG16(0x628),
459 REG16(0x62c),
460 REG16(0x630),
461 REG16(0x634),
462 REG16(0x638),
463 REG16(0x63c),
464 REG16(0x640),
465 REG16(0x644),
466 REG16(0x648),
467 REG16(0x64c),
468 REG16(0x650),
469 REG16(0x654),
470 REG16(0x658),
471 REG16(0x65c),
472 REG16(0x660),
473 REG16(0x664),
474 REG16(0x668),
475 REG16(0x66c),
476 REG16(0x670),
477 REG16(0x674),
478 REG16(0x678),
479 REG16(0x67c),
480 REG(0x068),
481 REG(0x084),
490 REG16(0x244),
491 REG(0x034),
492 REG(0x030),
493 REG(0x038),
494 REG(0x03c),
495 REG(0x168),
496 REG(0x140),
497 REG(0x110),
498 REG(0x1c0),
499 REG(0x1c4),
500 REG(0x1c8),
501 REG(0x180),
502 REG16(0x2b4),
506 REG16(0x3a8),
507 REG16(0x28c),
508 REG16(0x288),
509 REG16(0x284),
510 REG16(0x280),
511 REG16(0x27c),
512 REG16(0x278),
513 REG16(0x274),
514 REG16(0x270),
517 REG(0x1b0),
518 REG16(0x5a8),
519 REG16(0x5ac),
522 LRI(1, 0),
523 REG(0x0c8),
569 return 0x70; in lrc_ring_mi_mode()
571 return 0x60; in lrc_ring_mi_mode()
573 return 0x54; in lrc_ring_mi_mode()
575 return 0x58; in lrc_ring_mi_mode()
583 return 0x84; in lrc_ring_gpr0()
585 return 0x74; in lrc_ring_gpr0()
587 return 0x68; in lrc_ring_gpr0()
589 return 0xd8; in lrc_ring_gpr0()
597 return 0x12; in lrc_ring_wa_bb_per_ctx()
599 return 0x18; in lrc_ring_wa_bb_per_ctx()
609 if (x < 0) in lrc_ring_indirect_ptr()
620 if (x < 0) in lrc_ring_indirect_offset()
634 return 0xc6; in lrc_ring_cmd_buf_cctl()
638 return 0xb6; in lrc_ring_cmd_buf_cctl()
640 return 0xaa; in lrc_ring_cmd_buf_cctl()
709 (ggtt_offset + wa_ctx->per_ctx.offset) | 0x01; in init_wa_bb_regs()
732 ASSIGN_CTX_PDP(ppgtt, regs, 0); in init_ppgtt_regs()
772 memset(regs, 0, PAGE_SIZE); in __lrc_init_regs()
831 shmem_read(engine->default_state, 0, in lrc_init_state()
838 memset(state, 0, PAGE_SIZE); in lrc_init_state()
864 obj = i915_gem_object_create_lmem(engine->i915, context_size, 0); in __lrc_alloc_state()
927 return 0; in lrc_alloc()
976 return 0; in lrc_pin()
1018 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1021 *cs++ = 0; in gen12_emit_timestamp_wa()
1026 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1027 *cs++ = i915_mmio_reg_offset(RING_CTX_TIMESTAMP(0)); in gen12_emit_timestamp_wa()
1032 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1033 *cs++ = i915_mmio_reg_offset(RING_CTX_TIMESTAMP(0)); in gen12_emit_timestamp_wa()
1046 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_restore_scratch()
1049 *cs++ = 0; in gen12_emit_restore_scratch()
1062 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_cmd_buf_wa()
1065 *cs++ = 0; in gen12_emit_cmd_buf_wa()
1070 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_cmd_buf_wa()
1071 *cs++ = i915_mmio_reg_offset(RING_CMD_BUF_CCTL(0)); in gen12_emit_cmd_buf_wa()
1140 * bits 0-11: flags, GEN8_CTX_* (cached in ctx->desc_template)
1144 * bits 55-63: group ID, currently unused and set to 0
1290 *batch++ = 0; in gen8_emit_flush_coherentl3_wa()
1294 *batch++ = 0x40400000 | GEN8_LQSC_FLUSH_COHERENT_LINES; in gen8_emit_flush_coherentl3_wa()
1299 0); in gen8_emit_flush_coherentl3_wa()
1305 *batch++ = 0; in gen8_emit_flush_coherentl3_wa()
1384 0), in gen9_init_indirectctx_bb()
1434 *batch++ = 0x00777000; in gen9_init_indirectctx_bb()
1435 *batch++ = 0; in gen9_init_indirectctx_bb()
1436 *batch++ = 0; in gen9_init_indirectctx_bb()
1437 *batch++ = 0; in gen9_init_indirectctx_bb()
1468 return 0; in lrc_create_wa_ctx()
1477 i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0); in lrc_fini_wa_ctx()
1502 wa_bb_fn[0] = gen9_init_indirectctx_bb; in lrc_init_wa_ctx()
1506 wa_bb_fn[0] = gen8_init_indirectctx_bb; in lrc_init_wa_ctx()
1534 err = i915_ggtt_pin(wa_ctx->vma, &ww, 0, PIN_HIGH); in lrc_init_wa_ctx()
1550 for (i = 0; i < ARRAY_SIZE(wa_bb_fn); i++) { in lrc_init_wa_ctx()
1563 __i915_gem_object_flush_map(wa_ctx->vma->obj, 0, batch_ptr - batch); in lrc_init_wa_ctx()
1585 memset(wa_ctx, 0, sizeof(*wa_ctx)); in lrc_init_wa_ctx()
1609 if (unlikely(dt < 0)) { in lrc_update_runtime()