Lines Matching full:engine
159 * intel_engine_context_size() - return the size of the context for an engine
161 * @class: engine class
163 * Each engine class may require a different amount of space for a context
166 * Return: size (in bytes) of an engine class specific context image
255 static void __sprint_engine_name(struct intel_engine_cs *engine) in __sprint_engine_name() argument
258 * Before we know what the uABI name for this engine will be, in __sprint_engine_name()
259 * we still would like to keep track of this engine in the debug logs. in __sprint_engine_name()
262 GEM_WARN_ON(snprintf(engine->name, sizeof(engine->name), "%s'%u", in __sprint_engine_name()
263 intel_engine_class_repr(engine->class), in __sprint_engine_name()
264 engine->instance) >= sizeof(engine->name)); in __sprint_engine_name()
267 void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask) in intel_engine_set_hwsp_writemask() argument
271 * per-engine HWSTAM until gen6. in intel_engine_set_hwsp_writemask()
273 if (GRAPHICS_VER(engine->i915) < 6 && engine->class != RENDER_CLASS) in intel_engine_set_hwsp_writemask()
276 if (GRAPHICS_VER(engine->i915) >= 3) in intel_engine_set_hwsp_writemask()
277 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
279 ENGINE_WRITE16(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
282 static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine) in intel_engine_sanitize_mmio() argument
285 intel_engine_set_hwsp_writemask(engine, ~0u); in intel_engine_sanitize_mmio()
288 static void nop_irq_handler(struct intel_engine_cs *engine, u16 iir) in nop_irq_handler() argument
297 struct intel_engine_cs *engine; in intel_engine_setup() local
305 if (GEM_DEBUG_WARN_ON(id >= ARRAY_SIZE(gt->engine))) in intel_engine_setup()
317 engine = kzalloc(sizeof(*engine), GFP_KERNEL); in intel_engine_setup()
318 if (!engine) in intel_engine_setup()
321 BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES); in intel_engine_setup()
323 engine->id = id; in intel_engine_setup()
324 engine->legacy_idx = INVALID_ENGINE; in intel_engine_setup()
325 engine->mask = BIT(id); in intel_engine_setup()
326 engine->i915 = i915; in intel_engine_setup()
327 engine->gt = gt; in intel_engine_setup()
328 engine->uncore = gt->uncore; in intel_engine_setup()
330 engine->guc_id = MAKE_GUC_ID(guc_class, info->instance); in intel_engine_setup()
331 engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases); in intel_engine_setup()
333 engine->irq_handler = nop_irq_handler; in intel_engine_setup()
335 engine->class = info->class; in intel_engine_setup()
336 engine->instance = info->instance; in intel_engine_setup()
337 __sprint_engine_name(engine); in intel_engine_setup()
339 engine->props.heartbeat_interval_ms = in intel_engine_setup()
341 engine->props.max_busywait_duration_ns = in intel_engine_setup()
343 engine->props.preempt_timeout_ms = in intel_engine_setup()
345 engine->props.stop_timeout_ms = in intel_engine_setup()
347 engine->props.timeslice_duration_ms = in intel_engine_setup()
351 if (GRAPHICS_VER(i915) == 12 && engine->class == RENDER_CLASS) in intel_engine_setup()
352 engine->props.preempt_timeout_ms = 0; in intel_engine_setup()
354 engine->defaults = engine->props; /* never to change again */ in intel_engine_setup()
356 engine->context_size = intel_engine_context_size(gt, engine->class); in intel_engine_setup()
357 if (WARN_ON(engine->context_size > BIT(20))) in intel_engine_setup()
358 engine->context_size = 0; in intel_engine_setup()
359 if (engine->context_size) in intel_engine_setup()
362 ewma__engine_latency_init(&engine->latency); in intel_engine_setup()
363 seqcount_init(&engine->stats.lock); in intel_engine_setup()
365 ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier); in intel_engine_setup()
368 intel_engine_sanitize_mmio(engine); in intel_engine_setup()
370 gt->engine_class[info->class][info->instance] = engine; in intel_engine_setup()
371 gt->engine[id] = engine; in intel_engine_setup()
376 static void __setup_engine_capabilities(struct intel_engine_cs *engine) in __setup_engine_capabilities() argument
378 struct drm_i915_private *i915 = engine->i915; in __setup_engine_capabilities()
380 if (engine->class == VIDEO_DECODE_CLASS) { in __setup_engine_capabilities()
382 * HEVC support is present on first engine instance in __setup_engine_capabilities()
386 (GRAPHICS_VER(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
387 engine->uabi_capabilities |= in __setup_engine_capabilities()
391 * SFC block is present only on even logical engine in __setup_engine_capabilities()
395 (engine->gt->info.vdbox_sfc_access & in __setup_engine_capabilities()
396 BIT(engine->instance))) || in __setup_engine_capabilities()
397 (GRAPHICS_VER(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
398 engine->uabi_capabilities |= in __setup_engine_capabilities()
400 } else if (engine->class == VIDEO_ENHANCEMENT_CLASS) { in __setup_engine_capabilities()
402 engine->uabi_capabilities |= in __setup_engine_capabilities()
409 struct intel_engine_cs *engine; in intel_setup_engine_capabilities() local
412 for_each_engine(engine, gt, id) in intel_setup_engine_capabilities()
413 __setup_engine_capabilities(engine); in intel_setup_engine_capabilities()
422 struct intel_engine_cs *engine; in intel_engines_release() local
426 * Before we release the resources held by engine, we must be certain in intel_engines_release()
439 for_each_engine(engine, gt, id) { in intel_engines_release()
440 if (!engine->release) in intel_engines_release()
443 intel_wakeref_wait_for_idle(&engine->wakeref); in intel_engines_release()
444 GEM_BUG_ON(intel_engine_pm_is_awake(engine)); in intel_engines_release()
446 engine->release(engine); in intel_engines_release()
447 engine->release = NULL; in intel_engines_release()
449 memset(&engine->reset, 0, sizeof(engine->reset)); in intel_engines_release()
453 void intel_engine_free_request_pool(struct intel_engine_cs *engine) in intel_engine_free_request_pool() argument
455 if (!engine->request_pool) in intel_engine_free_request_pool()
458 kmem_cache_free(i915_request_slab_cache(), engine->request_pool); in intel_engine_free_request_pool()
463 struct intel_engine_cs *engine; in intel_engines_free() local
469 for_each_engine(engine, gt, id) { in intel_engines_free()
470 intel_engine_free_request_pool(engine); in intel_engines_free()
471 kfree(engine); in intel_engines_free()
472 gt->engine[id] = NULL; in intel_engines_free()
501 * the blitter forcewake domain to read the engine fuses, but at the same time
504 * domains based on the full engine mask in the platform capabilities before
576 * intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers
630 void intel_engine_init_execlists(struct intel_engine_cs *engine) in intel_engine_init_execlists() argument
632 struct intel_engine_execlists * const execlists = &engine->execlists; in intel_engine_init_execlists()
643 static void cleanup_status_page(struct intel_engine_cs *engine) in cleanup_status_page() argument
648 intel_engine_set_hwsp_writemask(engine, ~0u); in cleanup_status_page()
650 vma = fetch_and_zero(&engine->status_page.vma); in cleanup_status_page()
654 if (!HWS_NEEDS_PHYSICAL(engine->i915)) in cleanup_status_page()
661 static int pin_ggtt_status_page(struct intel_engine_cs *engine, in pin_ggtt_status_page() argument
667 if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt)) in pin_ggtt_status_page()
686 static int init_status_page(struct intel_engine_cs *engine) in init_status_page() argument
694 INIT_LIST_HEAD(&engine->status_page.timelines); in init_status_page()
703 obj = i915_gem_object_create_internal(engine->i915, PAGE_SIZE); in init_status_page()
705 drm_err(&engine->i915->drm, in init_status_page()
712 vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL); in init_status_page()
721 if (!ret && !HWS_NEEDS_PHYSICAL(engine->i915)) in init_status_page()
722 ret = pin_ggtt_status_page(engine, &ww, vma); in init_status_page()
732 engine->status_page.addr = memset(vaddr, 0, PAGE_SIZE); in init_status_page()
733 engine->status_page.vma = vma; in init_status_page()
751 static int engine_setup_common(struct intel_engine_cs *engine) in engine_setup_common() argument
755 init_llist_head(&engine->barrier_tasks); in engine_setup_common()
757 err = init_status_page(engine); in engine_setup_common()
761 engine->breadcrumbs = intel_breadcrumbs_create(engine); in engine_setup_common()
762 if (!engine->breadcrumbs) { in engine_setup_common()
767 engine->sched_engine = i915_sched_engine_create(ENGINE_PHYSICAL); in engine_setup_common()
768 if (!engine->sched_engine) { in engine_setup_common()
772 engine->sched_engine->private_data = engine; in engine_setup_common()
774 err = intel_engine_init_cmd_parser(engine); in engine_setup_common()
778 intel_engine_init_execlists(engine); in engine_setup_common()
779 intel_engine_init__pm(engine); in engine_setup_common()
780 intel_engine_init_retire(engine); in engine_setup_common()
783 engine->sseu = in engine_setup_common()
784 intel_sseu_from_device_info(&engine->gt->info.sseu); in engine_setup_common()
786 intel_engine_init_workarounds(engine); in engine_setup_common()
787 intel_engine_init_whitelist(engine); in engine_setup_common()
788 intel_engine_init_ctx_wa(engine); in engine_setup_common()
790 if (GRAPHICS_VER(engine->i915) >= 12) in engine_setup_common()
791 engine->flags |= I915_ENGINE_HAS_RELATIVE_MMIO; in engine_setup_common()
796 i915_sched_engine_put(engine->sched_engine); in engine_setup_common()
798 intel_breadcrumbs_put(engine->breadcrumbs); in engine_setup_common()
800 cleanup_status_page(engine); in engine_setup_common()
812 struct intel_engine_cs *engine = ce->engine; in measure_breadcrumb_dw() local
816 GEM_BUG_ON(!engine->gt->scratch); in measure_breadcrumb_dw()
822 frame->rq.engine = engine; in measure_breadcrumb_dw()
836 spin_lock_irq(&engine->sched_engine->lock); in measure_breadcrumb_dw()
838 dw = engine->emit_fini_breadcrumb(&frame->rq, frame->cs) - frame->cs; in measure_breadcrumb_dw()
840 spin_unlock_irq(&engine->sched_engine->lock); in measure_breadcrumb_dw()
850 intel_engine_create_pinned_context(struct intel_engine_cs *engine, in intel_engine_create_pinned_context() argument
860 ce = intel_context_create(engine); in intel_engine_create_pinned_context()
891 struct intel_engine_cs *engine = ce->engine; in intel_engine_destroy_pinned_context() local
892 struct i915_vma *hwsp = engine->status_page.vma; in intel_engine_destroy_pinned_context()
905 create_kernel_context(struct intel_engine_cs *engine) in create_kernel_context() argument
909 return intel_engine_create_pinned_context(engine, engine->gt->vm, SZ_4K, in create_kernel_context()
916 * @engine: Engine to initialize.
918 * Initializes @engine@ structure members shared between legacy and execlists
921 * Typcally done at later stages of submission mode specific engine setup.
925 static int engine_init_common(struct intel_engine_cs *engine) in engine_init_common() argument
930 engine->set_default_submission(engine); in engine_init_common()
940 ce = create_kernel_context(engine); in engine_init_common()
948 engine->emit_fini_breadcrumb_dw = ret; in engine_init_common()
949 engine->kernel_context = ce; in engine_init_common()
960 int (*setup)(struct intel_engine_cs *engine); in intel_engines_init()
961 struct intel_engine_cs *engine; in intel_engines_init() local
976 for_each_engine(engine, gt, id) { in intel_engines_init()
977 err = engine_setup_common(engine); in intel_engines_init()
981 err = setup(engine); in intel_engines_init()
985 err = engine_init_common(engine); in intel_engines_init()
989 intel_engine_add_user(engine); in intel_engines_init()
996 * intel_engines_cleanup_common - cleans up the engine state created by
998 * @engine: Engine to cleanup.
1002 void intel_engine_cleanup_common(struct intel_engine_cs *engine) in intel_engine_cleanup_common() argument
1004 GEM_BUG_ON(!list_empty(&engine->sched_engine->requests)); in intel_engine_cleanup_common()
1006 i915_sched_engine_put(engine->sched_engine); in intel_engine_cleanup_common()
1007 intel_breadcrumbs_put(engine->breadcrumbs); in intel_engine_cleanup_common()
1009 intel_engine_fini_retire(engine); in intel_engine_cleanup_common()
1010 intel_engine_cleanup_cmd_parser(engine); in intel_engine_cleanup_common()
1012 if (engine->default_state) in intel_engine_cleanup_common()
1013 fput(engine->default_state); in intel_engine_cleanup_common()
1015 if (engine->kernel_context) in intel_engine_cleanup_common()
1016 intel_engine_destroy_pinned_context(engine->kernel_context); in intel_engine_cleanup_common()
1018 GEM_BUG_ON(!llist_empty(&engine->barrier_tasks)); in intel_engine_cleanup_common()
1019 cleanup_status_page(engine); in intel_engine_cleanup_common()
1021 intel_wa_list_free(&engine->ctx_wa_list); in intel_engine_cleanup_common()
1022 intel_wa_list_free(&engine->wa_list); in intel_engine_cleanup_common()
1023 intel_wa_list_free(&engine->whitelist); in intel_engine_cleanup_common()
1027 * intel_engine_resume - re-initializes the HW state of the engine
1028 * @engine: Engine to resume.
1032 int intel_engine_resume(struct intel_engine_cs *engine) in intel_engine_resume() argument
1034 intel_engine_apply_workarounds(engine); in intel_engine_resume()
1035 intel_engine_apply_whitelist(engine); in intel_engine_resume()
1037 return engine->resume(engine); in intel_engine_resume()
1040 u64 intel_engine_get_active_head(const struct intel_engine_cs *engine) in intel_engine_get_active_head() argument
1042 struct drm_i915_private *i915 = engine->i915; in intel_engine_get_active_head()
1047 acthd = ENGINE_READ64(engine, RING_ACTHD, RING_ACTHD_UDW); in intel_engine_get_active_head()
1049 acthd = ENGINE_READ(engine, RING_ACTHD); in intel_engine_get_active_head()
1051 acthd = ENGINE_READ(engine, ACTHD); in intel_engine_get_active_head()
1056 u64 intel_engine_get_last_batch_head(const struct intel_engine_cs *engine) in intel_engine_get_last_batch_head() argument
1060 if (GRAPHICS_VER(engine->i915) >= 8) in intel_engine_get_last_batch_head()
1061 bbaddr = ENGINE_READ64(engine, RING_BBADDR, RING_BBADDR_UDW); in intel_engine_get_last_batch_head()
1063 bbaddr = ENGINE_READ(engine, RING_BBADDR); in intel_engine_get_last_batch_head()
1068 static unsigned long stop_timeout(const struct intel_engine_cs *engine) in stop_timeout() argument
1075 * the engine to quiesce. We've stopped submission to the engine, and in stop_timeout()
1077 * leave the engine idle. So they should not be caught unaware by in stop_timeout()
1080 return READ_ONCE(engine->props.stop_timeout_ms); in stop_timeout()
1083 static int __intel_engine_stop_cs(struct intel_engine_cs *engine, in __intel_engine_stop_cs() argument
1087 struct intel_uncore *uncore = engine->uncore; in __intel_engine_stop_cs()
1088 const i915_reg_t mode = RING_MI_MODE(engine->mmio_base); in __intel_engine_stop_cs()
1092 err = __intel_wait_for_register_fw(engine->uncore, mode, in __intel_engine_stop_cs()
1103 int intel_engine_stop_cs(struct intel_engine_cs *engine) in intel_engine_stop_cs() argument
1107 if (GRAPHICS_VER(engine->i915) < 3) in intel_engine_stop_cs()
1110 ENGINE_TRACE(engine, "\n"); in intel_engine_stop_cs()
1111 if (__intel_engine_stop_cs(engine, 1000, stop_timeout(engine))) { in intel_engine_stop_cs()
1112 ENGINE_TRACE(engine, in intel_engine_stop_cs()
1114 ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR, in intel_engine_stop_cs()
1115 ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR); in intel_engine_stop_cs()
1122 if ((ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) != in intel_engine_stop_cs()
1123 (ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR)) in intel_engine_stop_cs()
1130 void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine) in intel_engine_cancel_stop_cs() argument
1132 ENGINE_TRACE(engine, "\n"); in intel_engine_cancel_stop_cs()
1134 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
1149 read_subslice_reg(const struct intel_engine_cs *engine, in read_subslice_reg() argument
1152 return intel_uncore_read_with_mcr_steering(engine->uncore, reg, in read_subslice_reg()
1157 void intel_engine_get_instdone(const struct intel_engine_cs *engine, in intel_engine_get_instdone() argument
1160 struct drm_i915_private *i915 = engine->i915; in intel_engine_get_instdone()
1161 const struct sseu_dev_info *sseu = &engine->gt->info.sseu; in intel_engine_get_instdone()
1162 struct intel_uncore *uncore = engine->uncore; in intel_engine_get_instdone()
1163 u32 mmio_base = engine->mmio_base; in intel_engine_get_instdone()
1174 if (engine->id != RCS0) in intel_engine_get_instdone()
1187 read_subslice_reg(engine, slice, subslice, in intel_engine_get_instdone()
1190 read_subslice_reg(engine, slice, subslice, in intel_engine_get_instdone()
1198 if (engine->id != RCS0) in intel_engine_get_instdone()
1214 if (engine->id == RCS0) in intel_engine_get_instdone()
1226 static bool ring_is_idle(struct intel_engine_cs *engine) in ring_is_idle() argument
1230 if (I915_SELFTEST_ONLY(!engine->mmio_base)) in ring_is_idle()
1233 if (!intel_engine_pm_get_if_awake(engine)) in ring_is_idle()
1237 if ((ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR) != in ring_is_idle()
1238 (ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR)) in ring_is_idle()
1242 if (GRAPHICS_VER(engine->i915) > 2 && in ring_is_idle()
1243 !(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE)) in ring_is_idle()
1246 intel_engine_pm_put(engine); in ring_is_idle()
1251 void __intel_engine_flush_submission(struct intel_engine_cs *engine, bool sync) in __intel_engine_flush_submission() argument
1253 struct tasklet_struct *t = &engine->sched_engine->tasklet; in __intel_engine_flush_submission()
1273 * intel_engine_is_idle() - Report if the engine has finished process all work
1274 * @engine: the intel_engine_cs
1277 * to hardware, and that the engine is idle.
1279 bool intel_engine_is_idle(struct intel_engine_cs *engine) in intel_engine_is_idle() argument
1282 if (intel_gt_is_wedged(engine->gt)) in intel_engine_is_idle()
1285 if (!intel_engine_pm_is_awake(engine)) in intel_engine_is_idle()
1289 intel_synchronize_hardirq(engine->i915); in intel_engine_is_idle()
1290 intel_engine_flush_submission(engine); in intel_engine_is_idle()
1293 if (!i915_sched_engine_is_empty(engine->sched_engine)) in intel_engine_is_idle()
1297 return ring_is_idle(engine); in intel_engine_is_idle()
1302 struct intel_engine_cs *engine; in intel_engines_are_idle() local
1316 for_each_engine(engine, gt, id) { in intel_engines_are_idle()
1317 if (!intel_engine_is_idle(engine)) in intel_engines_are_idle()
1324 bool intel_engine_irq_enable(struct intel_engine_cs *engine) in intel_engine_irq_enable() argument
1326 if (!engine->irq_enable) in intel_engine_irq_enable()
1330 spin_lock(&engine->gt->irq_lock); in intel_engine_irq_enable()
1331 engine->irq_enable(engine); in intel_engine_irq_enable()
1332 spin_unlock(&engine->gt->irq_lock); in intel_engine_irq_enable()
1337 void intel_engine_irq_disable(struct intel_engine_cs *engine) in intel_engine_irq_disable() argument
1339 if (!engine->irq_disable) in intel_engine_irq_disable()
1343 spin_lock(&engine->gt->irq_lock); in intel_engine_irq_disable()
1344 engine->irq_disable(engine); in intel_engine_irq_disable()
1345 spin_unlock(&engine->gt->irq_lock); in intel_engine_irq_disable()
1350 struct intel_engine_cs *engine; in intel_engines_reset_default_submission() local
1353 for_each_engine(engine, gt, id) { in intel_engines_reset_default_submission()
1354 if (engine->sanitize) in intel_engines_reset_default_submission()
1355 engine->sanitize(engine); in intel_engines_reset_default_submission()
1357 engine->set_default_submission(engine); in intel_engines_reset_default_submission()
1361 bool intel_engine_can_store_dword(struct intel_engine_cs *engine) in intel_engine_can_store_dword() argument
1363 switch (GRAPHICS_VER(engine->i915)) { in intel_engine_can_store_dword()
1368 return !(IS_I915G(engine->i915) || IS_I915GM(engine->i915)); in intel_engine_can_store_dword()
1370 return !IS_I965G(engine->i915); /* who knows! */ in intel_engine_can_store_dword()
1372 return engine->class != VIDEO_DECODE_CLASS; /* b0rked */ in intel_engine_can_store_dword()
1383 * Even though we are holding the engine->sched_engine->lock here, there in get_timeline()
1461 static void intel_engine_print_registers(struct intel_engine_cs *engine, in intel_engine_print_registers() argument
1464 struct drm_i915_private *dev_priv = engine->i915; in intel_engine_print_registers()
1465 struct intel_engine_execlists * const execlists = &engine->execlists; in intel_engine_print_registers()
1468 if (engine->id == RENDER_CLASS && IS_GRAPHICS_VER(dev_priv, 4, 7)) in intel_engine_print_registers()
1469 drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); in intel_engine_print_registers()
1472 ENGINE_READ(engine, RING_EXECLIST_STATUS_HI)); in intel_engine_print_registers()
1474 ENGINE_READ(engine, RING_EXECLIST_STATUS_LO)); in intel_engine_print_registers()
1477 ENGINE_READ(engine, RING_START)); in intel_engine_print_registers()
1479 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR); in intel_engine_print_registers()
1481 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR); in intel_engine_print_registers()
1483 ENGINE_READ(engine, RING_CTL), in intel_engine_print_registers()
1484 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : ""); in intel_engine_print_registers()
1485 if (GRAPHICS_VER(engine->i915) > 2) { in intel_engine_print_registers()
1487 ENGINE_READ(engine, RING_MI_MODE), in intel_engine_print_registers()
1488 ENGINE_READ(engine, RING_MI_MODE) & (MODE_IDLE) ? " [idle]" : ""); in intel_engine_print_registers()
1493 ENGINE_READ(engine, RING_IMR)); in intel_engine_print_registers()
1495 ENGINE_READ(engine, RING_ESR)); in intel_engine_print_registers()
1497 ENGINE_READ(engine, RING_EMR)); in intel_engine_print_registers()
1499 ENGINE_READ(engine, RING_EIR)); in intel_engine_print_registers()
1502 addr = intel_engine_get_active_head(engine); in intel_engine_print_registers()
1505 addr = intel_engine_get_last_batch_head(engine); in intel_engine_print_registers()
1509 addr = ENGINE_READ64(engine, RING_DMA_FADD, RING_DMA_FADD_UDW); in intel_engine_print_registers()
1511 addr = ENGINE_READ(engine, RING_DMA_FADD); in intel_engine_print_registers()
1513 addr = ENGINE_READ(engine, DMA_FADD_I8XX); in intel_engine_print_registers()
1518 ENGINE_READ(engine, RING_IPEIR)); in intel_engine_print_registers()
1520 ENGINE_READ(engine, RING_IPEHR)); in intel_engine_print_registers()
1522 drm_printf(m, "\tIPEIR: 0x%08x\n", ENGINE_READ(engine, IPEIR)); in intel_engine_print_registers()
1523 drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR)); in intel_engine_print_registers()
1526 if (intel_engine_uses_guc(engine)) { in intel_engine_print_registers()
1531 &engine->status_page.addr[I915_HWS_CSB_BUF0_INDEX]; in intel_engine_print_registers()
1538 &engine->sched_engine->tasklet.state)), in intel_engine_print_registers()
1539 enableddisabled(!atomic_read(&engine->sched_engine->tasklet.count)), in intel_engine_print_registers()
1540 repr_timer(&engine->execlists.preempt), in intel_engine_print_registers()
1541 repr_timer(&engine->execlists.timer)); in intel_engine_print_registers()
1547 ENGINE_READ(engine, RING_EXECLIST_STATUS_LO), in intel_engine_print_registers()
1548 ENGINE_READ(engine, RING_EXECLIST_STATUS_HI), in intel_engine_print_registers()
1563 i915_sched_engine_active_lock_bh(engine->sched_engine); in intel_engine_print_registers()
1594 i915_sched_engine_active_unlock_bh(engine->sched_engine); in intel_engine_print_registers()
1597 ENGINE_READ(engine, RING_PP_DIR_BASE)); in intel_engine_print_registers()
1599 ENGINE_READ(engine, RING_PP_DIR_BASE_READ)); in intel_engine_print_registers()
1601 ENGINE_READ(engine, RING_PP_DIR_DCLV)); in intel_engine_print_registers()
1654 static void print_properties(struct intel_engine_cs *engine, in print_properties() argument
1662 .offset = offsetof(typeof(engine->props), x), \ in print_properties()
1680 read_ul(&engine->props, p->offset), in print_properties()
1681 read_ul(&engine->defaults, p->offset)); in print_properties()
1732 msg = "\t\tactive on engine"; in intel_engine_dump_active_requests()
1740 static void engine_dump_active_requests(struct intel_engine_cs *engine, struct drm_printer *m) in engine_dump_active_requests() argument
1747 * No need for an engine->irq_seqno_barrier() before the seqno reads. in engine_dump_active_requests()
1753 lockdep_assert_held(&engine->sched_engine->lock); in engine_dump_active_requests()
1757 guc = intel_uc_uses_guc_submission(&engine->gt->uc); in engine_dump_active_requests()
1759 ce = intel_engine_get_hung_context(engine); in engine_dump_active_requests()
1763 hung_rq = intel_engine_execlist_find_hung_request(engine); in engine_dump_active_requests()
1770 intel_guc_dump_active_requests(engine, hung_rq, m); in engine_dump_active_requests()
1772 intel_engine_dump_active_requests(&engine->sched_engine->requests, in engine_dump_active_requests()
1776 void intel_engine_dump(struct intel_engine_cs *engine, in intel_engine_dump() argument
1780 struct i915_gpu_error * const error = &engine->i915->gpu_error; in intel_engine_dump()
1794 if (intel_gt_is_wedged(engine->gt)) in intel_engine_dump()
1797 drm_printf(m, "\tAwake? %d\n", atomic_read(&engine->wakeref.count)); in intel_engine_dump()
1799 yesno(!llist_empty(&engine->barrier_tasks))); in intel_engine_dump()
1801 ewma__engine_latency_read(&engine->latency)); in intel_engine_dump()
1802 if (intel_engine_supports_stats(engine)) in intel_engine_dump()
1804 ktime_to_ms(intel_engine_get_busy_time(engine, in intel_engine_dump()
1807 engine->fw_domain, READ_ONCE(engine->fw_active)); in intel_engine_dump()
1810 rq = READ_ONCE(engine->heartbeat.systole); in intel_engine_dump()
1816 i915_reset_engine_count(error, engine), in intel_engine_dump()
1818 print_properties(engine, m); in intel_engine_dump()
1820 spin_lock_irqsave(&engine->sched_engine->lock, flags); in intel_engine_dump()
1821 engine_dump_active_requests(engine, m); in intel_engine_dump()
1824 list_count(&engine->sched_engine->hold)); in intel_engine_dump()
1825 spin_unlock_irqrestore(&engine->sched_engine->lock, flags); in intel_engine_dump()
1827 drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base); in intel_engine_dump()
1828 wakeref = intel_runtime_pm_get_if_in_use(engine->uncore->rpm); in intel_engine_dump()
1830 intel_engine_print_registers(engine, m); in intel_engine_dump()
1831 intel_runtime_pm_put(engine->uncore->rpm, wakeref); in intel_engine_dump()
1836 intel_execlists_show_requests(engine, m, i915_request_show, 8); in intel_engine_dump()
1839 hexdump(m, engine->status_page.addr, PAGE_SIZE); in intel_engine_dump()
1841 drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine))); in intel_engine_dump()
1843 intel_engine_print_breadcrumbs(engine, m); in intel_engine_dump()
1846 static ktime_t __intel_engine_get_busy_time(struct intel_engine_cs *engine, in __intel_engine_get_busy_time() argument
1849 ktime_t total = engine->stats.total; in __intel_engine_get_busy_time()
1852 * If the engine is executing something at the moment in __intel_engine_get_busy_time()
1856 if (READ_ONCE(engine->stats.active)) in __intel_engine_get_busy_time()
1857 total = ktime_add(total, ktime_sub(*now, engine->stats.start)); in __intel_engine_get_busy_time()
1863 * intel_engine_get_busy_time() - Return current accumulated engine busyness
1864 * @engine: engine to report on
1867 * Returns accumulated time @engine was busy since engine stats were enabled.
1869 ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine, ktime_t *now) in intel_engine_get_busy_time() argument
1875 seq = read_seqcount_begin(&engine->stats.lock); in intel_engine_get_busy_time()
1876 total = __intel_engine_get_busy_time(engine, now); in intel_engine_get_busy_time()
1877 } while (read_seqcount_retry(&engine->stats.lock, seq)); in intel_engine_get_busy_time()
1897 intel_engine_execlist_find_hung_request(struct intel_engine_cs *engine) in intel_engine_execlist_find_hung_request() argument
1906 GEM_BUG_ON(intel_uc_uses_guc_submission(&engine->gt->uc)); in intel_engine_execlist_find_hung_request()
1909 * We are called by the error capture, reset and to dump engine in intel_engine_execlist_find_hung_request()
1915 * not need an engine->irq_seqno_barrier() before the seqno reads. in intel_engine_execlist_find_hung_request()
1919 lockdep_assert_held(&engine->sched_engine->lock); in intel_engine_execlist_find_hung_request()
1922 request = execlists_active(&engine->execlists); in intel_engine_execlist_find_hung_request()
1937 list_for_each_entry(request, &engine->sched_engine->requests, in intel_engine_execlist_find_hung_request()