61 		{ 7, 11, -8 }, { 8, 12, -10 }, { 9, 12, -10 }, { 10, 12, -12 },
62 		{ 10, 12, -12 }, { 11, 12, -12 }, { 13, 14, -12 }
67 		{ 0, 8, 0 }, { 3, 10, -2 }, { 7, 12, -2 }, { 8, 12, -4 },
69 		{ 11, 15, -8 }, { 12, 16, -10 }, { 13, 16, -10 },
70 		{ 14, 16, -12 }, { 14, 16, -12 }, { 15, 16, -12 },
71 		{ 17, 18, -12 }
74 	/* 6BPP/12BPC */
76 		{ 0, 12, 0 }, { 5, 14, -2 }, { 11, 16, -2 }, { 12, 16, -4 },
79 		{ 18, 20, -12 }, { 18, 20, -12 }, { 19, 20, -12 },
80 		{ 21, 22, -12 }
88 		{ 22, 24, -12 }, { 22, 24, -12 }, { 23, 24, -12 },
89 		{ 25, 26, -12 }
97 		{ 26, 28, -12 }, { 26, 28, -12 }, { 27, 28, -12 },
98 		{ 29, 30, -12 }
104 	{ 512, 12, 6144, 3, 12, 11, 11, {
107 		{ 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 }, { 5, 12, -12 },
108 		{ 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
112 	{ 512, 12, 6144, 7, 16, 15, 15, {
114 		{ 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
115 		{ 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
116 		{ 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
119 	/* 8BPP/12BPC */
120 	{ 512, 12, 6144, 11, 20, 19, 19, {
121 		{ 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
124 		{ 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
125 		{ 21, 23, -12 }
129 	{ 512, 12, 6144, 15, 24, 23, 23, {
130 		{ 0, 12, 0 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 },
133 		{ 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 },
134 		{ 24, 25, -12 }
138 	{ 512, 12, 6144, 19, 28, 27, 27, {
139 		{ 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 },
142 		{ 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 },
143 		{ 28, 29, -12 }
149 	{ 410, 15, 5632, 3, 12, 11, 11, {
153 		{ 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 }
159 		{ 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
161 		{ 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 }
164 	/* 10BPP/12BPC */
166 		{ 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
169 		{ 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 },
170 		{ 19, 20, -12 }
178 		{ 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 },
179 		{ 23, 24, -12 }
187 		{ 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 },
188 		{ 27, 28, -12 }
193 	/* 12BPP/8BPC */
194 	{ 341, 15, 2048, 3, 12, 11, 11, {
198 		{ 5, 12, -12 }, { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
201 	/* 12BPP/10BPC */
204 		{ 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
205 		{ 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
206 		{ 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
209 	/* 12BPP/12BPC */
211 		{ 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
214 		{ 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
215 		{ 21, 23, -12 }
218 	/* 12BPP/14BPC */
223 		{ 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 },
224 		{ 22, 23, -12 }
227 	/* 12BPP/16BPC */
232 		{ 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 },
233 		{ 26, 27, -12 }
239 	{ 273, 15, 2048, 3, 12, 11, 11, {
243 		{ 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 }
251 		{ 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 }
254 	/* 15BPP/12BPC */
257 		{ 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
258 		{ 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
259 		{ 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 },
260 		{ 16, 17, -12 }
268 		{ 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 },
269 		{ 20, 21, -12 }
274 		{ 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 },
277 		{ 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 },
278 		{ 24, 25, -12 }
294 	case 12:  in get_row_index_for_rc_params()
310 	case 12:  in get_column_index_for_rc_params()
348 	if (DISPLAY_VER(i915) >= 12)  in intel_dsc_source_support()
366 	if (DISPLAY_VER(i915) >= 12)  in is_pipe_dsc()
386 	int ofs_und6[] = { 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 };  in calculate_rc_params()
387 	int ofs_und8[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 };  in calculate_rc_params()
388 	int ofs_und12[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 };  in calculate_rc_params()
389 	int ofs_und15[] = { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 };  in calculate_rc_params()
395 			12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);  in calculate_rc_params()
400 	if (bpp >= 12)  in calculate_rc_params()
413 	rc->flatness_max_qp = 12 + qp_bpc_modifier;  in calculate_rc_params()
433 		} else if (bpp <= 12) {  in calculate_rc_params()
437 			res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);  in calculate_rc_params()
481 	 * For 6bpp, RC Buffer threshold 12 and 13 need a different value  in intel_dsc_compute_params()
485 		vdsc_cfg->rc_buf_thresh[12] = 0x7C;  in intel_dsc_compute_params()
561 	 *  - Display version 12 (except RKL) pipe A  in intel_dsc_power_domain()
567 	if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A)  in intel_dsc_power_domain()