102 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in i8xx_fbc_activate()
153 	const struct intel_fbc_reg_params *params = &i915->fbc.params;  in g4x_dpfc_ctl_limit()
154 	int limit = i915->fbc.limit;  in g4x_dpfc_ctl_limit()
174 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in g4x_fbc_activate()
212 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in i8xx_fbc_recompress()
223 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in i965_fbc_recompress()
235 	struct intel_fbc *fbc = &dev_priv->fbc;  in snb_fbc_recompress()  local
237 	trace_intel_fbc_nuke(fbc->crtc);  in snb_fbc_recompress()
255 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in ilk_fbc_activate()
306 	struct intel_fbc_reg_params *params = &dev_priv->fbc.params;  in gen7_fbc_activate()
338 	if (dev_priv->fbc.false_color)  in gen7_fbc_activate()
358 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_hw_activate()  local
360 	trace_intel_fbc_activate(fbc->crtc);  in intel_fbc_hw_activate()
362 	fbc->active = true;  in intel_fbc_hw_activate()
363 	fbc->activated = true;  in intel_fbc_hw_activate()
377 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_hw_deactivate()  local
379 	trace_intel_fbc_deactivate(fbc->crtc);  in intel_fbc_hw_deactivate()
381 	fbc->active = false;  in intel_fbc_hw_deactivate()
402 	return dev_priv->fbc.active;  in intel_fbc_is_active()
408 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_deactivate()  local
410 	drm_WARN_ON(&dev_priv->drm, !mutex_is_locked(&fbc->lock));  in intel_fbc_deactivate()
412 	if (fbc->active)  in intel_fbc_deactivate()
415 	fbc->no_fbc_reason = reason;  in intel_fbc_deactivate()
464 	struct intel_fbc *fbc = &dev_priv->fbc;  in find_compression_limit()  local
469 	ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb,  in find_compression_limit()
475 		ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb,  in find_compression_limit()
487 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_alloc_cfb()  local
491 		    drm_mm_node_allocated(&fbc->compressed_fb));  in intel_fbc_alloc_cfb()
493 		    drm_mm_node_allocated(&fbc->compressed_llb));  in intel_fbc_alloc_cfb()
496 		ret = i915_gem_stolen_insert_node(dev_priv, &fbc->compressed_llb,  in intel_fbc_alloc_cfb()
510 	fbc->limit = ret;  in intel_fbc_alloc_cfb()
514 		    fbc->compressed_fb.size, fbc->limit);  in intel_fbc_alloc_cfb()
519 	if (drm_mm_node_allocated(&fbc->compressed_llb))  in intel_fbc_alloc_cfb()
520 		i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb);  in intel_fbc_alloc_cfb()
529 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_program_cfb()  local
533 			       fbc->compressed_fb.start);  in intel_fbc_program_cfb()
536 			       fbc->compressed_fb.start);  in intel_fbc_program_cfb()
539 						 fbc->compressed_fb.start,  in intel_fbc_program_cfb()
542 						 fbc->compressed_llb.start,  in intel_fbc_program_cfb()
546 			       dev_priv->dsm.start + fbc->compressed_fb.start);  in intel_fbc_program_cfb()
548 			       dev_priv->dsm.start + fbc->compressed_llb.start);  in intel_fbc_program_cfb()
554 	struct intel_fbc *fbc = &dev_priv->fbc;  in __intel_fbc_cleanup_cfb()  local
559 	if (drm_mm_node_allocated(&fbc->compressed_llb))  in __intel_fbc_cleanup_cfb()
560 		i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb);  in __intel_fbc_cleanup_cfb()
561 	if (drm_mm_node_allocated(&fbc->compressed_fb))  in __intel_fbc_cleanup_cfb()
562 		i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb);  in __intel_fbc_cleanup_cfb()
567 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_cleanup_cfb()  local
572 	mutex_lock(&fbc->lock);  in intel_fbc_cleanup_cfb()
574 	mutex_unlock(&fbc->lock);  in intel_fbc_cleanup_cfb()
648 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_hw_tracking_covers_screen()  local
665 	intel_fbc_get_plane_source_size(&fbc->state_cache, &effective_w,  in intel_fbc_hw_tracking_covers_screen()
667 	effective_w += fbc->state_cache.plane.adjusted_x;  in intel_fbc_hw_tracking_covers_screen()
668 	effective_h += fbc->state_cache.plane.adjusted_y;  in intel_fbc_hw_tracking_covers_screen()
694 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_update_state_cache()  local
695 	struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_update_state_cache()
746 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_cfb_size_changed()  local
748 	return intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache) >  in intel_fbc_cfb_size_changed()
749 		fbc->compressed_fb.size * fbc->limit;  in intel_fbc_cfb_size_changed()
754 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_gen9_wa_cfb_stride()  local
755 	struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_gen9_wa_cfb_stride()
759 		return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->limit) * 8;  in intel_fbc_gen9_wa_cfb_stride()
766 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_gen9_wa_cfb_stride_changed()  local
768 	return fbc->params.gen9_wa_cfb_stride != intel_fbc_gen9_wa_cfb_stride(dev_priv);  in intel_fbc_gen9_wa_cfb_stride_changed()
773 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_can_enable()  local
776 		fbc->no_fbc_reason = "VGPU is active";  in intel_fbc_can_enable()
781 		fbc->no_fbc_reason = "disabled per module param or by default";  in intel_fbc_can_enable()
785 	if (fbc->underrun_detected) {  in intel_fbc_can_enable()
786 		fbc->no_fbc_reason = "underrun detected";  in intel_fbc_can_enable()
796 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_can_activate()  local
797 	struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_can_activate()
803 		fbc->no_fbc_reason = "primary plane not visible";  in intel_fbc_can_activate()
810 	if (fbc->underrun_detected) {  in intel_fbc_can_activate()
811 		fbc->no_fbc_reason = "underrun detected";  in intel_fbc_can_activate()
816 		fbc->no_fbc_reason = "incompatible mode";  in intel_fbc_can_activate()
821 		fbc->no_fbc_reason = "mode too large for compression";  in intel_fbc_can_activate()
843 		fbc->no_fbc_reason = "framebuffer not tiled or fenced";  in intel_fbc_can_activate()
848 		fbc->no_fbc_reason = "pixel format is invalid";  in intel_fbc_can_activate()
854 		fbc->no_fbc_reason = "rotation unsupported";  in intel_fbc_can_activate()
859 		fbc->no_fbc_reason = "tiling unsupported";  in intel_fbc_can_activate()
864 		fbc->no_fbc_reason = "framebuffer stride not supported";  in intel_fbc_can_activate()
870 		fbc->no_fbc_reason = "per-pixel alpha blending is incompatible with FBC";  in intel_fbc_can_activate()
877 		fbc->no_fbc_reason = "pixel rate is too big";  in intel_fbc_can_activate()
892 		fbc->no_fbc_reason = "CFB requirements changed";  in intel_fbc_can_activate()
902 	    (fbc->state_cache.plane.adjusted_y & 3)) {  in intel_fbc_can_activate()
903 		fbc->no_fbc_reason = "plane Y offset is misaligned";  in intel_fbc_can_activate()
910 		fbc->no_fbc_reason = "plane height + offset is non-modulo of 4";  in intel_fbc_can_activate()
919 	if (fbc->state_cache.psr2_active && DISPLAY_VER(dev_priv) >= 12) {  in intel_fbc_can_activate()
920 		fbc->no_fbc_reason = "not supported with PSR2";  in intel_fbc_can_activate()
931 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_get_reg_params()  local
932 	struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_get_reg_params()
962 	const struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_can_flip_nuke()  local
963 	const struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_can_flip_nuke()
964 	const struct intel_fbc_reg_params *params = &fbc->params;  in intel_fbc_can_flip_nuke()
1002 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_pre_update()  local
1009 	mutex_lock(&fbc->lock);  in intel_fbc_pre_update()
1011 	if (fbc->crtc != crtc)  in intel_fbc_pre_update()
1015 	fbc->flip_pending = true;  in intel_fbc_pre_update()
1033 		if (fbc->activated &&  in intel_fbc_pre_update()
1036 		fbc->activated = false;  in intel_fbc_pre_update()
1039 	mutex_unlock(&fbc->lock);  in intel_fbc_pre_update()
1053 	struct intel_fbc *fbc = &dev_priv->fbc;  in __intel_fbc_disable()  local
1054 	struct intel_crtc *crtc = fbc->crtc;  in __intel_fbc_disable()
1056 	drm_WARN_ON(&dev_priv->drm, !mutex_is_locked(&fbc->lock));  in __intel_fbc_disable()
1057 	drm_WARN_ON(&dev_priv->drm, !fbc->crtc);  in __intel_fbc_disable()
1058 	drm_WARN_ON(&dev_priv->drm, fbc->active);  in __intel_fbc_disable()
1065 	fbc->crtc = NULL;  in __intel_fbc_disable()
1071 	struct intel_fbc *fbc = &dev_priv->fbc;  in __intel_fbc_post_update()  local
1073 	drm_WARN_ON(&dev_priv->drm, !mutex_is_locked(&fbc->lock));  in __intel_fbc_post_update()
1075 	if (fbc->crtc != crtc)  in __intel_fbc_post_update()
1078 	fbc->flip_pending = false;  in __intel_fbc_post_update()
1087 	intel_fbc_get_reg_params(crtc, &fbc->params);  in __intel_fbc_post_update()
1092 	if (!fbc->busy_bits)  in __intel_fbc_post_update()
1105 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_post_update()  local
1110 	mutex_lock(&fbc->lock);  in intel_fbc_post_update()
1112 	mutex_unlock(&fbc->lock);  in intel_fbc_post_update()
1115 static unsigned int intel_fbc_get_frontbuffer_bit(struct intel_fbc *fbc)  in intel_fbc_get_frontbuffer_bit()  argument
1117 	if (fbc->crtc)  in intel_fbc_get_frontbuffer_bit()
1118 		return to_intel_plane(fbc->crtc->base.primary)->frontbuffer_bit;  in intel_fbc_get_frontbuffer_bit()
1120 		return fbc->possible_framebuffer_bits;  in intel_fbc_get_frontbuffer_bit()
1127 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_invalidate()  local
1135 	mutex_lock(&fbc->lock);  in intel_fbc_invalidate()
1137 	fbc->busy_bits |= intel_fbc_get_frontbuffer_bit(fbc) & frontbuffer_bits;  in intel_fbc_invalidate()
1139 	if (fbc->crtc && fbc->busy_bits)  in intel_fbc_invalidate()
1142 	mutex_unlock(&fbc->lock);  in intel_fbc_invalidate()
1148 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_flush()  local
1161 	mutex_lock(&fbc->lock);  in intel_fbc_flush()
1163 	fbc->busy_bits &= ~frontbuffer_bits;  in intel_fbc_flush()
1168 	if (!fbc->busy_bits && fbc->crtc &&  in intel_fbc_flush()
1169 	    (frontbuffer_bits & intel_fbc_get_frontbuffer_bit(fbc))) {  in intel_fbc_flush()
1170 		if (fbc->active)  in intel_fbc_flush()
1172 		else if (!fbc->flip_pending)  in intel_fbc_flush()
1173 			__intel_fbc_post_update(fbc->crtc);  in intel_fbc_flush()
1177 	mutex_unlock(&fbc->lock);  in intel_fbc_flush()
1195 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_choose_crtc()  local
1201 	mutex_lock(&fbc->lock);  in intel_fbc_choose_crtc()
1204 	if (fbc->crtc &&  in intel_fbc_choose_crtc()
1205 	    !intel_atomic_get_new_crtc_state(state, fbc->crtc))  in intel_fbc_choose_crtc()
1233 		fbc->no_fbc_reason = "no suitable CRTC for FBC";  in intel_fbc_choose_crtc()
1236 	mutex_unlock(&fbc->lock);  in intel_fbc_choose_crtc()
1258 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_enable()  local
1259 	struct intel_fbc_state_cache *cache = &fbc->state_cache;  in intel_fbc_enable()
1264 	mutex_lock(&fbc->lock);  in intel_fbc_enable()
1266 	if (fbc->crtc) {  in intel_fbc_enable()
1267 		if (fbc->crtc != crtc ||  in intel_fbc_enable()
1275 	drm_WARN_ON(&dev_priv->drm, fbc->active);  in intel_fbc_enable()
1287 		fbc->no_fbc_reason = "not enough stolen memory";  in intel_fbc_enable()
1295 	fbc->no_fbc_reason = "FBC enabled but not active yet\n";  in intel_fbc_enable()
1297 	fbc->crtc = crtc;  in intel_fbc_enable()
1301 	mutex_unlock(&fbc->lock);  in intel_fbc_enable()
1314 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_disable()  local
1319 	mutex_lock(&fbc->lock);  in intel_fbc_disable()
1320 	if (fbc->crtc == crtc)  in intel_fbc_disable()
1322 	mutex_unlock(&fbc->lock);  in intel_fbc_disable()
1333 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_global_disable()  local
1338 	mutex_lock(&fbc->lock);  in intel_fbc_global_disable()
1339 	if (fbc->crtc) {  in intel_fbc_global_disable()
1340 		drm_WARN_ON(&dev_priv->drm, fbc->crtc->active);  in intel_fbc_global_disable()
1343 	mutex_unlock(&fbc->lock);  in intel_fbc_global_disable()
1349 		container_of(work, struct drm_i915_private, fbc.underrun_work);  in intel_fbc_underrun_work_fn()
1350 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_underrun_work_fn()  local
1352 	mutex_lock(&fbc->lock);  in intel_fbc_underrun_work_fn()
1355 	if (fbc->underrun_detected || !fbc->crtc)  in intel_fbc_underrun_work_fn()
1359 	fbc->underrun_detected = true;  in intel_fbc_underrun_work_fn()
1363 	mutex_unlock(&fbc->lock);  in intel_fbc_underrun_work_fn()
1377 	cancel_work_sync(&dev_priv->fbc.underrun_work);  in intel_fbc_reset_underrun()
1379 	ret = mutex_lock_interruptible(&dev_priv->fbc.lock);  in intel_fbc_reset_underrun()
1383 	if (dev_priv->fbc.underrun_detected) {  in intel_fbc_reset_underrun()
1386 		dev_priv->fbc.no_fbc_reason = "FIFO underrun cleared";  in intel_fbc_reset_underrun()
1389 	dev_priv->fbc.underrun_detected = false;  in intel_fbc_reset_underrun()
1390 	mutex_unlock(&dev_priv->fbc.lock);  in intel_fbc_reset_underrun()
1411 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_handle_fifo_underrun_irq()  local
1422 	if (READ_ONCE(fbc->underrun_detected))  in intel_fbc_handle_fifo_underrun_irq()
1425 	schedule_work(&fbc->underrun_work);  in intel_fbc_handle_fifo_underrun_irq()
1472 	struct intel_fbc *fbc = &dev_priv->fbc;  in intel_fbc_init()  local
1474 	INIT_WORK(&fbc->underrun_work, intel_fbc_underrun_work_fn);  in intel_fbc_init()
1475 	mutex_init(&fbc->lock);  in intel_fbc_init()
1476 	fbc->active = false;  in intel_fbc_init()
1489 		fbc->no_fbc_reason = "unsupported by this chipset";  in intel_fbc_init()