19 	} dot, vco, n, m, m1, m2, p, p1;  member
27 	.dot = { .min = 25000, .max = 350000 },
40 	.dot = { .min = 25000, .max = 350000 },
53 	.dot = { .min = 25000, .max = 350000 },
66 	.dot = { .min = 20000, .max = 400000 },
79 	.dot = { .min = 20000, .max = 400000 },
93 	.dot = { .min = 25000, .max = 270000 },
108 	.dot = { .min = 22000, .max = 400000 },
121 	.dot = { .min = 20000, .max = 115000 },
135 	.dot = { .min = 80000, .max = 224000 },
149 	.dot = { .min = 20000, .max = 400000},
164 	.dot = { .min = 20000, .max = 400000 },
182 	.dot = { .min = 25000, .max = 350000 },
195 	.dot = { .min = 25000, .max = 350000 },
208 	.dot = { .min = 25000, .max = 350000 },
222 	.dot = { .min = 25000, .max = 350000 },
235 	.dot = { .min = 25000, .max = 350000 },
254 	.dot = { .min = 25000 * 5, .max = 270000 * 5 },
270 	.dot = { .min = 25000 * 5, .max = 540000 * 5},
281 	.dot = { .min = 0, .max = INT_MAX },
307 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in pnv_calc_dpll_params()
309 	return clock->dot;  in pnv_calc_dpll_params()
324 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in i9xx_calc_dpll_params()
326 	return clock->dot;  in i9xx_calc_dpll_params()
336 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in vlv_calc_dpll_params()
338 	return clock->dot / 5;  in vlv_calc_dpll_params()
349 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in chv_calc_dpll_params()
351 	return clock->dot / 5;  in chv_calc_dpll_params()
387 	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)  in intel_pll_is_valid()
463 					this_err = abs(clock.dot - target);  in i9xx_find_best_dpll()
519 					this_err = abs(clock.dot - target);  in pnv_find_best_dpll()
577 					this_err = abs(clock.dot - target);  in g4x_find_best_dpll()
615 				abs(target_freq - calculated_clock->dot),  in vlv_PLL_is_optimal()