359 			       const struct intel_limit *limit,  in intel_pll_is_valid()  argument
362 	if (clock->n < limit->n.min || limit->n.max < clock->n)  in intel_pll_is_valid()
364 	if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)  in intel_pll_is_valid()
366 	if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)  in intel_pll_is_valid()
368 	if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)  in intel_pll_is_valid()
376 		if (clock->p < limit->p.min || limit->p.max < clock->p)  in intel_pll_is_valid()
378 		if (clock->m < limit->m.min || limit->m.max < clock->m)  in intel_pll_is_valid()
382 	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)  in intel_pll_is_valid()
387 	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)  in intel_pll_is_valid()
394 i9xx_select_p2_div(const struct intel_limit *limit,  in i9xx_select_p2_div()  argument
407 			return limit->p2.p2_fast;  in i9xx_select_p2_div()
409 			return limit->p2.p2_slow;  in i9xx_select_p2_div()
411 		if (target < limit->p2.dot_limit)  in i9xx_select_p2_div()
412 			return limit->p2.p2_slow;  in i9xx_select_p2_div()
414 			return limit->p2.p2_fast;  in i9xx_select_p2_div()
429 i9xx_find_best_dpll(const struct intel_limit *limit,  in i9xx_find_best_dpll()  argument
440 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in i9xx_find_best_dpll()
442 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in i9xx_find_best_dpll()
444 		for (clock.m2 = limit->m2.min;  in i9xx_find_best_dpll()
445 		     clock.m2 <= limit->m2.max; clock.m2++) {  in i9xx_find_best_dpll()
448 			for (clock.n = limit->n.min;  in i9xx_find_best_dpll()
449 			     clock.n <= limit->n.max; clock.n++) {  in i9xx_find_best_dpll()
450 				for (clock.p1 = limit->p1.min;  in i9xx_find_best_dpll()
451 					clock.p1 <= limit->p1.max; clock.p1++) {  in i9xx_find_best_dpll()
456 								limit,  in i9xx_find_best_dpll()
487 pnv_find_best_dpll(const struct intel_limit *limit,  in pnv_find_best_dpll()  argument
498 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in pnv_find_best_dpll()
500 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in pnv_find_best_dpll()
502 		for (clock.m2 = limit->m2.min;  in pnv_find_best_dpll()
503 		     clock.m2 <= limit->m2.max; clock.m2++) {  in pnv_find_best_dpll()
504 			for (clock.n = limit->n.min;  in pnv_find_best_dpll()
505 			     clock.n <= limit->n.max; clock.n++) {  in pnv_find_best_dpll()
506 				for (clock.p1 = limit->p1.min;  in pnv_find_best_dpll()
507 					clock.p1 <= limit->p1.max; clock.p1++) {  in pnv_find_best_dpll()
512 								limit,  in pnv_find_best_dpll()
543 g4x_find_best_dpll(const struct intel_limit *limit,  in g4x_find_best_dpll()  argument
557 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in g4x_find_best_dpll()
559 	max_n = limit->n.max;  in g4x_find_best_dpll()
561 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {  in g4x_find_best_dpll()
563 		for (clock.m1 = limit->m1.max;  in g4x_find_best_dpll()
564 		     clock.m1 >= limit->m1.min; clock.m1--) {  in g4x_find_best_dpll()
565 			for (clock.m2 = limit->m2.max;  in g4x_find_best_dpll()
566 			     clock.m2 >= limit->m2.min; clock.m2--) {  in g4x_find_best_dpll()
567 				for (clock.p1 = limit->p1.max;  in g4x_find_best_dpll()
568 				     clock.p1 >= limit->p1.min; clock.p1--) {  in g4x_find_best_dpll()
573 								limit,  in g4x_find_best_dpll()
637 vlv_find_best_dpll(const struct intel_limit *limit,  in vlv_find_best_dpll()  argument
647 	int max_n = min(limit->n.max, refclk / 19200);  in vlv_find_best_dpll()
655 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {  in vlv_find_best_dpll()
656 		for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {  in vlv_find_best_dpll()
657 			for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow;  in vlv_find_best_dpll()
661 				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {  in vlv_find_best_dpll()
670 								limit,  in vlv_find_best_dpll()
697 chv_find_best_dpll(const struct intel_limit *limit,  in chv_find_best_dpll()  argument
721 	for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {  in chv_find_best_dpll()
722 		for (clock.p2 = limit->p2.p2_fast;  in chv_find_best_dpll()
723 				clock.p2 >= limit->p2.p2_slow;  in chv_find_best_dpll()
739 			if (!intel_pll_is_valid(to_i915(dev), limit, &clock))  in chv_find_best_dpll()
759 	const struct intel_limit *limit = &intel_limits_bxt;  in bxt_find_best_dpll()  local
761 	return chv_find_best_dpll(limit, crtc_state,  in bxt_find_best_dpll()
1009 	 * We'll limit this to IVB with 3 pipes, since it has only two  in ilk_compute_dpll()
1059 	const struct intel_limit *limit;  in ilk_crtc_compute_clock()  local
1079 				limit = &ilk_limits_dual_lvds_100m;  in ilk_crtc_compute_clock()
1081 				limit = &ilk_limits_dual_lvds;  in ilk_crtc_compute_clock()
1084 				limit = &ilk_limits_single_lvds_100m;  in ilk_crtc_compute_clock()
1086 				limit = &ilk_limits_single_lvds;  in ilk_crtc_compute_clock()
1089 		limit = &ilk_limits_dac;  in ilk_crtc_compute_clock()
1093 	    !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in ilk_crtc_compute_clock()
1149 	const struct intel_limit *limit = &intel_limits_chv;  in chv_crtc_compute_clock()  local
1156 	    !chv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in chv_crtc_compute_clock()
1171 	const struct intel_limit *limit = &intel_limits_vlv;  in vlv_crtc_compute_clock()  local
1178 	    !vlv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in vlv_crtc_compute_clock()
1193 	const struct intel_limit *limit;  in g4x_crtc_compute_clock()  local
1208 			limit = &intel_limits_g4x_dual_channel_lvds;  in g4x_crtc_compute_clock()
1210 			limit = &intel_limits_g4x_single_channel_lvds;  in g4x_crtc_compute_clock()
1213 		limit = &intel_limits_g4x_hdmi;  in g4x_crtc_compute_clock()
1215 		limit = &intel_limits_g4x_sdvo;  in g4x_crtc_compute_clock()
1218 		limit = &intel_limits_i9xx_sdvo;  in g4x_crtc_compute_clock()
1222 	    !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in g4x_crtc_compute_clock()
1239 	const struct intel_limit *limit;  in pnv_crtc_compute_clock()  local
1253 		limit = &pnv_limits_lvds;  in pnv_crtc_compute_clock()
1255 		limit = &pnv_limits_sdvo;  in pnv_crtc_compute_clock()
1259 	    !pnv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in pnv_crtc_compute_clock()
1276 	const struct intel_limit *limit;  in i9xx_crtc_compute_clock()  local
1290 		limit = &intel_limits_i9xx_lvds;  in i9xx_crtc_compute_clock()
1292 		limit = &intel_limits_i9xx_sdvo;  in i9xx_crtc_compute_clock()
1296 	    !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in i9xx_crtc_compute_clock()
1313 	const struct intel_limit *limit;  in i8xx_crtc_compute_clock()  local
1327 		limit = &intel_limits_i8xx_lvds;  in i8xx_crtc_compute_clock()
1329 		limit = &intel_limits_i8xx_dvo;  in i8xx_crtc_compute_clock()
1331 		limit = &intel_limits_i8xx_dac;  in i8xx_crtc_compute_clock()
1335 	    !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in i8xx_crtc_compute_clock()