33  * DOC: DMC Firmware Support
35  * From gen9 onwards we have newly added DMC (Display microcontroller) in display
101 	/* 0x09 for DMC */
104 	/* Includes the DMC specific header in dwords */
119 	/* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */
161 	/* DMC container header length in dwords */
177 	/* DMC binary header length */
217 	/* DMC RAM start MMIO address */
242 	return i915->dmc.dmc_info[DMC_FW_MAIN].payload;  in intel_dmc_has_payload()
278  * DMC firmware is read from a .bin file and kept in internal memory one time.
284 	struct intel_dmc *dmc = &dev_priv->dmc;  in intel_dmc_load_program()  local
289 			"No DMC support available for this platform\n");  in intel_dmc_load_program()
293 	if (!dev_priv->dmc.dmc_info[DMC_FW_MAIN].payload) {  in intel_dmc_load_program()
304 		for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) {  in intel_dmc_load_program()
306 					      DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),  in intel_dmc_load_program()
307 					      dmc->dmc_info[id].payload[i]);  in intel_dmc_load_program()
314 		for (i = 0; i < dmc->dmc_info[id].mmio_count; i++) {  in intel_dmc_load_program()
315 			intel_de_write(dev_priv, dmc->dmc_info[id].mmioaddr[i],  in intel_dmc_load_program()
316 				       dmc->dmc_info[id].mmiodata[i]);  in intel_dmc_load_program()
320 	dev_priv->dmc.dc_state = 0;  in intel_dmc_load_program()
346 static void dmc_set_fw_offset(struct intel_dmc *dmc,  in dmc_set_fw_offset()  argument
354 	struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);  in dmc_set_fw_offset()
368 		if (dmc->dmc_info[id].present)  in dmc_set_fw_offset()
372 			dmc->dmc_info[id].present = true;  in dmc_set_fw_offset()
373 			dmc->dmc_info[id].dmc_offset = fw_info[i].offset;  in dmc_set_fw_offset()
378 static u32 parse_dmc_fw_header(struct intel_dmc *dmc,  in parse_dmc_fw_header()  argument
382 	struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);  in parse_dmc_fw_header()
383 	struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id];  in parse_dmc_fw_header()
430 		drm_err(&i915->drm, "Unknown DMC fw header version: %u\n",  in parse_dmc_fw_header()
436 		drm_err(&i915->drm, "DMC firmware has wrong dmc header length "  in parse_dmc_fw_header()
441 	/* Cache the dmc header info. */  in parse_dmc_fw_header()
443 		drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count);  in parse_dmc_fw_header()
461 	if (payload_size > dmc->max_fw_size) {  in parse_dmc_fw_header()
462 		drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size);  in parse_dmc_fw_header()
477 	drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");  in parse_dmc_fw_header()
482 parse_dmc_fw_package(struct intel_dmc *dmc,  in parse_dmc_fw_package()  argument
487 	struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);  in parse_dmc_fw_package()
500 		drm_err(&i915->drm, "DMC firmware has unknown header version %u\n",  in parse_dmc_fw_package()
514 		drm_err(&i915->drm, "DMC firmware has wrong package header length "  in parse_dmc_fw_package()
525 	dmc_set_fw_offset(dmc, fw_info, num_entries, si,  in parse_dmc_fw_package()
532 	drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");  in parse_dmc_fw_package()
537 static u32 parse_dmc_fw_css(struct intel_dmc *dmc,  in parse_dmc_fw_css()  argument
541 	struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);  in parse_dmc_fw_css()
544 		drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");  in parse_dmc_fw_css()
550 		drm_err(&i915->drm, "DMC firmware has wrong CSS header length "  in parse_dmc_fw_css()
556 	if (dmc->required_version &&  in parse_dmc_fw_css()
557 	    css_header->version != dmc->required_version) {  in parse_dmc_fw_css()
558 		drm_info(&i915->drm, "Refusing to load DMC firmware v%u.%u,"  in parse_dmc_fw_css()
562 			 DMC_VERSION_MAJOR(dmc->required_version),  in parse_dmc_fw_css()
563 			 DMC_VERSION_MINOR(dmc->required_version));  in parse_dmc_fw_css()
567 	dmc->version = css_header->version;  in parse_dmc_fw_css()
578 	struct intel_dmc *dmc = &dev_priv->dmc;  in parse_dmc_fw()  local
590 	r = parse_dmc_fw_css(dmc, css_header, fw->size);  in parse_dmc_fw()
598 	r = parse_dmc_fw_package(dmc, package_header, si, fw->size - readcount);  in parse_dmc_fw()
605 		if (!dev_priv->dmc.dmc_info[id].present)  in parse_dmc_fw()
608 		offset = readcount + dmc->dmc_info[id].dmc_offset * 4;  in parse_dmc_fw()
615 		parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, id);  in parse_dmc_fw()
621 	drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref);  in intel_dmc_runtime_pm_get()
622 	dev_priv->dmc.wakeref =  in intel_dmc_runtime_pm_get()
629 		fetch_and_zero(&dev_priv->dmc.wakeref);  in intel_dmc_runtime_pm_put()
637 	struct intel_dmc *dmc;  in dmc_load_work_fn()  local
640 	dev_priv = container_of(work, typeof(*dev_priv), dmc.work);  in dmc_load_work_fn()
641 	dmc = &dev_priv->dmc;  in dmc_load_work_fn()
643 	request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev);  in dmc_load_work_fn()
651 			 "Finished loading DMC firmware %s (v%u.%u)\n",  in dmc_load_work_fn()
652 			 dev_priv->dmc.fw_path, DMC_VERSION_MAJOR(dmc->version),  in dmc_load_work_fn()
653 			 DMC_VERSION_MINOR(dmc->version));  in dmc_load_work_fn()
656 			   "Failed to load DMC firmware %s."  in dmc_load_work_fn()
658 			   dmc->fw_path);  in dmc_load_work_fn()
659 		drm_notice(&dev_priv->drm, "DMC firmware homepage: %s",  in dmc_load_work_fn()
675 	struct intel_dmc *dmc = &dev_priv->dmc;  in intel_dmc_ucode_init()  local
677 	INIT_WORK(&dev_priv->dmc.work, dmc_load_work_fn);  in intel_dmc_ucode_init()
683 	 * Obtain a runtime pm reference, until DMC is loaded, to avoid entering  in intel_dmc_ucode_init()
687 	 * suspend as runtime suspend *requires* a working DMC for whatever  in intel_dmc_ucode_init()
693 		dmc->fw_path = ADLP_DMC_PATH;  in intel_dmc_ucode_init()
694 		dmc->required_version = ADLP_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
695 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
697 		dmc->fw_path = ADLS_DMC_PATH;  in intel_dmc_ucode_init()
698 		dmc->required_version = ADLS_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
699 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
701 		dmc->fw_path = DG1_DMC_PATH;  in intel_dmc_ucode_init()
702 		dmc->required_version = DG1_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
703 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
705 		dmc->fw_path = RKL_DMC_PATH;  in intel_dmc_ucode_init()
706 		dmc->required_version = RKL_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
707 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
709 		dmc->fw_path = TGL_DMC_PATH;  in intel_dmc_ucode_init()
710 		dmc->required_version = TGL_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
711 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
713 		dmc->fw_path = ICL_DMC_PATH;  in intel_dmc_ucode_init()
714 		dmc->required_version = ICL_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
715 		dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
717 		dmc->fw_path = GLK_DMC_PATH;  in intel_dmc_ucode_init()
718 		dmc->required_version = GLK_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
719 		dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
723 		dmc->fw_path = KBL_DMC_PATH;  in intel_dmc_ucode_init()
724 		dmc->required_version = KBL_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
725 		dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
727 		dmc->fw_path = SKL_DMC_PATH;  in intel_dmc_ucode_init()
728 		dmc->required_version = SKL_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
729 		dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
731 		dmc->fw_path = BXT_DMC_PATH;  in intel_dmc_ucode_init()
732 		dmc->required_version = BXT_DMC_VERSION_REQUIRED;  in intel_dmc_ucode_init()
733 		dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE;  in intel_dmc_ucode_init()
738 			dmc->fw_path = NULL;  in intel_dmc_ucode_init()
740 				 "Disabling DMC firmware and runtime PM\n");  in intel_dmc_ucode_init()
744 		dmc->fw_path = dev_priv->params.dmc_firmware_path;  in intel_dmc_ucode_init()
746 		dmc->required_version = 0;  in intel_dmc_ucode_init()
749 	if (!dmc->fw_path) {  in intel_dmc_ucode_init()
751 			    "No known DMC firmware for platform, disabling runtime PM\n");  in intel_dmc_ucode_init()
755 	drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);  in intel_dmc_ucode_init()
756 	schedule_work(&dev_priv->dmc.work);  in intel_dmc_ucode_init()
760  * intel_dmc_ucode_suspend() - prepare DMC firmware before system suspend
763  * Prepare the DMC firmware before entering system suspend. This includes
772 	flush_work(&dev_priv->dmc.work);  in intel_dmc_ucode_suspend()
774 	/* Drop the reference held in case DMC isn't loaded. */  in intel_dmc_ucode_suspend()
780  * intel_dmc_ucode_resume() - init DMC firmware during system resume
783  * Reinitialize the DMC firmware during system resume, reacquiring any
792 	 * Reacquire the reference to keep RPM disabled in case DMC isn't  in intel_dmc_ucode_resume()
800  * intel_dmc_ucode_fini() - unload the DMC firmware.
814 	drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref);  in intel_dmc_ucode_fini()
817 		kfree(dev_priv->dmc.dmc_info[id].payload);  in intel_dmc_ucode_fini()