4335 	if (crtc_state->pipe_bpp > 24)  in hsw_crtc_state_ips_capable()
4946 		if (crtc_state->dither && crtc_state->pipe_bpp != 30)  in i9xx_set_pipeconf()
4950 		switch (crtc_state->pipe_bpp) {  in i9xx_set_pipeconf()
5152 			pipe_config->pipe_bpp = 18;  in i9xx_get_pipe_config()
5155 			pipe_config->pipe_bpp = 24;  in i9xx_get_pipe_config()
5158 			pipe_config->pipe_bpp = 30;  in i9xx_get_pipe_config()
5761 	switch (crtc_state->pipe_bpp) {  in ilk_set_pipeconf()
5842 	switch (crtc_state->pipe_bpp) {  in bdw_set_pipemisc()
5858 		MISSING_CASE(crtc_state->pipe_bpp);  in bdw_set_pipemisc()
6119 		pipe_config->pipe_bpp = 18;  in ilk_get_pipe_config()
6122 		pipe_config->pipe_bpp = 24;  in ilk_get_pipe_config()
6125 		pipe_config->pipe_bpp = 30;  in ilk_get_pipe_config()
6128 		pipe_config->pipe_bpp = 36;  in ilk_get_pipe_config()
7473 			conn_state->max_bpc = (crtc_state->pipe_bpp ?: 24) / 3;  in intel_modeset_update_connector_atomic_state()
7511 	if (bpp < pipe_config->pipe_bpp) {  in compute_sink_pipe_bpp()
7518 			    pipe_config->pipe_bpp);  in compute_sink_pipe_bpp()
7520 		pipe_config->pipe_bpp = bpp;  in compute_sink_pipe_bpp()
7544 	pipe_config->pipe_bpp = bpp;  in compute_baseline_pipe_bpp()
7723 		    pipe_config->pipe_bpp, pipe_config->dither);  in intel_dump_pipe_config()
8095 	base_bpp = pipe_config->pipe_bpp;  in intel_modeset_pipe_config()
8193 	pipe_config->dither = (pipe_config->pipe_bpp == 6*3) &&  in intel_modeset_pipe_config()
8197 		    base_bpp, pipe_config->pipe_bpp, pipe_config->dither);  in intel_modeset_pipe_config()
8774 			PIPE_CONF_CHECK_I(pipe_bpp);  in intel_pipe_config_compare()