Lines Matching +full:vga +full:- +full:connector
2 * Copyright © 2006-2007 Intel Corporation
59 /* DPMS state is stored in the connector, which we need in the
61 struct intel_connector *connector; member
71 static struct intel_crt *intel_attached_crt(struct intel_connector *connector) in intel_attached_crt() argument
73 return intel_encoder_to_crt(intel_attached_encoder(connector)); in intel_attached_crt()
95 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state()
101 encoder->power_domain); in intel_crt_get_hw_state()
105 ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe); in intel_crt_get_hw_state()
107 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state()
114 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_flags()
118 tmp = intel_de_read(dev_priv, crt->adpa_reg); in intel_crt_get_flags()
136 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
138 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
140 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
146 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_crt_get_config()
150 pipe_config->hw.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
154 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
156 pipe_config->hw.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv); in hsw_crt_get_config()
165 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_set_dpms()
167 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crt_set_dpms()
168 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_crt_set_dpms()
176 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_crt_set_dpms()
178 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_crt_set_dpms()
185 adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe); in intel_crt_set_dpms()
187 adpa |= ADPA_PIPE_SEL(crtc->pipe); in intel_crt_set_dpms()
190 intel_de_write(dev_priv, BCLRPAT(crtc->pipe), 0); in intel_crt_set_dpms()
207 intel_de_write(dev_priv, crt->adpa_reg, adpa); in intel_crt_set_dpms()
238 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_disable_crt()
240 drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder); in hsw_disable_crt()
250 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_post_disable_crt()
269 drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder); in hsw_post_disable_crt()
279 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_pre_pll_enable_crt()
281 drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder); in hsw_pre_pll_enable_crt()
291 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_pre_enable_crt()
292 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_pre_enable_crt()
293 enum pipe pipe = crtc->pipe; in hsw_pre_enable_crt()
295 drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder); in hsw_pre_enable_crt()
309 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_enable_crt()
310 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_enable_crt()
311 enum pipe pipe = crtc->pipe; in hsw_enable_crt()
313 drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder); in hsw_enable_crt()
340 intel_crt_mode_valid(struct drm_connector *connector, in intel_crt_mode_valid() argument
343 struct drm_device *dev = connector->dev; in intel_crt_mode_valid()
345 int max_dotclk = dev_priv->max_dotclk_freq; in intel_crt_mode_valid()
348 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_crt_mode_valid()
351 if (mode->clock < 25000) in intel_crt_mode_valid()
366 if (mode->clock > max_clock) in intel_crt_mode_valid()
369 if (mode->clock > max_dotclk) in intel_crt_mode_valid()
374 ilk_get_lanes_required(mode->clock, 270000, 24) > 2) in intel_crt_mode_valid()
378 if (mode->hdisplay > 4096) in intel_crt_mode_valid()
389 &pipe_config->hw.adjusted_mode; in intel_crt_compute_config()
391 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_crt_compute_config()
392 return -EINVAL; in intel_crt_compute_config()
394 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_crt_compute_config()
404 &pipe_config->hw.adjusted_mode; in pch_crt_compute_config()
406 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in pch_crt_compute_config()
407 return -EINVAL; in pch_crt_compute_config()
409 pipe_config->has_pch_encoder = true; in pch_crt_compute_config()
410 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in pch_crt_compute_config()
419 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_crt_compute_config()
421 &pipe_config->hw.adjusted_mode; in hsw_crt_compute_config()
423 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in hsw_crt_compute_config()
424 return -EINVAL; in hsw_crt_compute_config()
427 if (adjusted_mode->crtc_hdisplay > 4096 || in hsw_crt_compute_config()
428 adjusted_mode->crtc_hblank_start > 4096) in hsw_crt_compute_config()
429 return -EINVAL; in hsw_crt_compute_config()
431 pipe_config->has_pch_encoder = true; in hsw_crt_compute_config()
432 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in hsw_crt_compute_config()
436 if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) { in hsw_crt_compute_config()
437 drm_dbg_kms(&dev_priv->drm, in hsw_crt_compute_config()
439 return -EINVAL; in hsw_crt_compute_config()
442 pipe_config->pipe_bpp = 24; in hsw_crt_compute_config()
446 pipe_config->port_clock = 135000 * 2; in hsw_crt_compute_config()
451 static bool ilk_crt_detect_hotplug(struct drm_connector *connector) in ilk_crt_detect_hotplug() argument
453 struct drm_device *dev = connector->dev; in ilk_crt_detect_hotplug()
454 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in ilk_crt_detect_hotplug()
460 if (crt->force_hotplug_required) { in ilk_crt_detect_hotplug()
464 crt->force_hotplug_required = false; in ilk_crt_detect_hotplug()
466 save_adpa = adpa = intel_de_read(dev_priv, crt->adpa_reg); in ilk_crt_detect_hotplug()
467 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
474 intel_de_write(dev_priv, crt->adpa_reg, adpa); in ilk_crt_detect_hotplug()
477 crt->adpa_reg, in ilk_crt_detect_hotplug()
480 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
484 intel_de_write(dev_priv, crt->adpa_reg, save_adpa); in ilk_crt_detect_hotplug()
485 intel_de_posting_read(dev_priv, crt->adpa_reg); in ilk_crt_detect_hotplug()
490 adpa = intel_de_read(dev_priv, crt->adpa_reg); in ilk_crt_detect_hotplug()
495 drm_dbg_kms(&dev_priv->drm, "ironlake hotplug adpa=0x%x, result %d\n", in ilk_crt_detect_hotplug()
501 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) in valleyview_crt_detect_hotplug() argument
503 struct drm_device *dev = connector->dev; in valleyview_crt_detect_hotplug()
504 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in valleyview_crt_detect_hotplug()
514 * - We enable power wells and reset the ADPA in valleyview_crt_detect_hotplug()
515 * - output_poll_exec does force probe on VGA, triggering a hpd in valleyview_crt_detect_hotplug()
516 * - HPD handler waits for poll to unlock dev->mode_config.mutex in valleyview_crt_detect_hotplug()
517 * - output_poll_exec shuts off the ADPA, unlocks in valleyview_crt_detect_hotplug()
518 * dev->mode_config.mutex in valleyview_crt_detect_hotplug()
519 * - HPD handler runs, resets ADPA and brings us back to the start in valleyview_crt_detect_hotplug()
523 reenable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin); in valleyview_crt_detect_hotplug()
525 save_adpa = adpa = intel_de_read(dev_priv, crt->adpa_reg); in valleyview_crt_detect_hotplug()
526 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
531 intel_de_write(dev_priv, crt->adpa_reg, adpa); in valleyview_crt_detect_hotplug()
533 if (intel_de_wait_for_clear(dev_priv, crt->adpa_reg, in valleyview_crt_detect_hotplug()
535 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
537 intel_de_write(dev_priv, crt->adpa_reg, save_adpa); in valleyview_crt_detect_hotplug()
541 adpa = intel_de_read(dev_priv, crt->adpa_reg); in valleyview_crt_detect_hotplug()
547 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
551 intel_hpd_enable(dev_priv, crt->base.hpd_pin); in valleyview_crt_detect_hotplug()
556 static bool intel_crt_detect_hotplug(struct drm_connector *connector) in intel_crt_detect_hotplug() argument
558 struct drm_device *dev = connector->dev; in intel_crt_detect_hotplug()
565 return ilk_crt_detect_hotplug(connector); in intel_crt_detect_hotplug()
568 return valleyview_crt_detect_hotplug(connector); in intel_crt_detect_hotplug()
588 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_hotplug()
604 static struct edid *intel_crt_get_edid(struct drm_connector *connector, in intel_crt_get_edid() argument
609 edid = drm_get_edid(connector, i2c); in intel_crt_get_edid()
612 drm_dbg_kms(connector->dev, in intel_crt_get_edid()
613 "CRT GMBUS EDID read failed, retry using GPIO bit-banging\n"); in intel_crt_get_edid()
615 edid = drm_get_edid(connector, i2c); in intel_crt_get_edid()
623 static int intel_crt_ddc_get_modes(struct drm_connector *connector, in intel_crt_ddc_get_modes() argument
629 edid = intel_crt_get_edid(connector, adapter); in intel_crt_ddc_get_modes()
633 ret = intel_connector_update_modes(connector, edid); in intel_crt_ddc_get_modes()
639 static bool intel_crt_detect_ddc(struct drm_connector *connector) in intel_crt_detect_ddc() argument
641 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in intel_crt_detect_ddc()
642 struct drm_i915_private *dev_priv = to_i915(crt->base.base.dev); in intel_crt_detect_ddc()
647 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG); in intel_crt_detect_ddc()
649 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin); in intel_crt_detect_ddc()
650 edid = intel_crt_get_edid(connector, i2c); in intel_crt_detect_ddc()
653 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; in intel_crt_detect_ddc()
656 * This may be a DVI-I connector with a shared DDC in intel_crt_detect_ddc()
661 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc()
665 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc()
669 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc()
681 struct drm_device *dev = crt->base.base.dev; in intel_crt_load_detect()
683 struct intel_uncore *uncore = &dev_priv->uncore; in intel_crt_load_detect()
695 drm_dbg_kms(&dev_priv->drm, "starting load-detect on CRT\n"); in intel_crt_load_detect()
747 (vblank_start - 1) | in intel_crt_load_detect()
748 ((vblank_end - 1) << 16)); in intel_crt_load_detect()
752 if (vblank_start - vactive >= vtotal - vblank_end) in intel_crt_load_detect()
772 /* Read the ST00 VGA status register */ in intel_crt_load_detect()
800 DRM_DEBUG_DRIVER("Skipping CRT detection for %s\n", id->ident); in intel_spurious_crt_detect_dmi_callback()
815 .ident = "Intel DZ77BH-55K",
818 DMI_MATCH(DMI_BOARD_NAME, "DZ77BH-55K"),
825 intel_crt_detect(struct drm_connector *connector, in intel_crt_detect() argument
829 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_crt_detect()
830 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in intel_crt_detect()
831 struct intel_encoder *intel_encoder = &crt->base; in intel_crt_detect()
836 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] force=%d\n", in intel_crt_detect()
837 connector->base.id, connector->name, in intel_crt_detect()
843 if (dev_priv->params.load_detect_test) { in intel_crt_detect()
845 intel_encoder->power_domain); in intel_crt_detect()
849 /* Skip machines without VGA that falsely report hotplug events */ in intel_crt_detect()
854 intel_encoder->power_domain); in intel_crt_detect()
861 if (intel_crt_detect_hotplug(connector)) { in intel_crt_detect()
862 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect()
867 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect()
871 if (intel_crt_detect_ddc(connector)) { in intel_crt_detect()
887 status = connector->status; in intel_crt_detect()
891 /* for pre-945g platforms use load detect */ in intel_crt_detect()
892 ret = intel_get_load_detect_pipe(connector, &tmp, ctx); in intel_crt_detect()
894 if (intel_crt_detect_ddc(connector)) in intel_crt_detect()
898 to_intel_crtc(connector->state->crtc)->pipe); in intel_crt_detect()
899 else if (dev_priv->params.load_detect_test) in intel_crt_detect()
903 intel_release_load_detect_pipe(connector, &tmp, ctx); in intel_crt_detect()
911 intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref); in intel_crt_detect()
922 static int intel_crt_get_modes(struct drm_connector *connector) in intel_crt_get_modes() argument
924 struct drm_device *dev = connector->dev; in intel_crt_get_modes()
926 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in intel_crt_get_modes()
927 struct intel_encoder *intel_encoder = &crt->base; in intel_crt_get_modes()
933 intel_encoder->power_domain); in intel_crt_get_modes()
935 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin); in intel_crt_get_modes()
936 ret = intel_crt_ddc_get_modes(connector, i2c); in intel_crt_get_modes()
940 /* Try to probe digital port for output in DVI-I -> VGA mode. */ in intel_crt_get_modes()
942 ret = intel_crt_ddc_get_modes(connector, i2c); in intel_crt_get_modes()
945 intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref); in intel_crt_get_modes()
952 struct drm_i915_private *dev_priv = to_i915(encoder->dev); in intel_crt_reset()
958 adpa = intel_de_read(dev_priv, crt->adpa_reg); in intel_crt_reset()
961 intel_de_write(dev_priv, crt->adpa_reg, adpa); in intel_crt_reset()
962 intel_de_posting_read(dev_priv, crt->adpa_reg); in intel_crt_reset()
964 drm_dbg_kms(&dev_priv->drm, "crt adpa set to 0x%x\n", adpa); in intel_crt_reset()
965 crt->force_hotplug_required = true; in intel_crt_reset()
996 struct drm_connector *connector; in intel_crt_init() local
1036 connector = &intel_connector->base; in intel_crt_init()
1037 crt->connector = intel_connector; in intel_crt_init()
1038 drm_connector_init(&dev_priv->drm, &intel_connector->base, in intel_crt_init()
1041 drm_encoder_init(&dev_priv->drm, &crt->base.base, &intel_crt_enc_funcs, in intel_crt_init()
1044 intel_connector_attach_encoder(intel_connector, &crt->base); in intel_crt_init()
1046 crt->base.type = INTEL_OUTPUT_ANALOG; in intel_crt_init()
1047 crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI); in intel_crt_init()
1049 crt->base.pipe_mask = BIT(PIPE_A); in intel_crt_init()
1051 crt->base.pipe_mask = ~0; in intel_crt_init()
1054 connector->interlace_allowed = 0; in intel_crt_init()
1056 connector->interlace_allowed = 1; in intel_crt_init()
1057 connector->doublescan_allowed = 0; in intel_crt_init()
1059 crt->adpa_reg = adpa_reg; in intel_crt_init()
1061 crt->base.power_domain = POWER_DOMAIN_PORT_CRT; in intel_crt_init()
1065 crt->base.hpd_pin = HPD_CRT; in intel_crt_init()
1066 crt->base.hotplug = intel_encoder_hotplug; in intel_crt_init()
1067 intel_connector->polled = DRM_CONNECTOR_POLL_HPD; in intel_crt_init()
1069 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; in intel_crt_init()
1073 crt->base.port = PORT_E; in intel_crt_init()
1074 crt->base.get_config = hsw_crt_get_config; in intel_crt_init()
1075 crt->base.get_hw_state = intel_ddi_get_hw_state; in intel_crt_init()
1076 crt->base.compute_config = hsw_crt_compute_config; in intel_crt_init()
1077 crt->base.pre_pll_enable = hsw_pre_pll_enable_crt; in intel_crt_init()
1078 crt->base.pre_enable = hsw_pre_enable_crt; in intel_crt_init()
1079 crt->base.enable = hsw_enable_crt; in intel_crt_init()
1080 crt->base.disable = hsw_disable_crt; in intel_crt_init()
1081 crt->base.post_disable = hsw_post_disable_crt; in intel_crt_init()
1082 crt->base.enable_clock = hsw_ddi_enable_clock; in intel_crt_init()
1083 crt->base.disable_clock = hsw_ddi_disable_clock; in intel_crt_init()
1084 crt->base.is_clock_enabled = hsw_ddi_is_clock_enabled; in intel_crt_init()
1086 intel_ddi_buf_trans_init(&crt->base); in intel_crt_init()
1089 crt->base.compute_config = pch_crt_compute_config; in intel_crt_init()
1090 crt->base.disable = pch_disable_crt; in intel_crt_init()
1091 crt->base.post_disable = pch_post_disable_crt; in intel_crt_init()
1093 crt->base.compute_config = intel_crt_compute_config; in intel_crt_init()
1094 crt->base.disable = intel_disable_crt; in intel_crt_init()
1096 crt->base.port = PORT_NONE; in intel_crt_init()
1097 crt->base.get_config = intel_crt_get_config; in intel_crt_init()
1098 crt->base.get_hw_state = intel_crt_get_hw_state; in intel_crt_init()
1099 crt->base.enable = intel_enable_crt; in intel_crt_init()
1101 intel_connector->get_hw_state = intel_connector_get_hw_state; in intel_crt_init()
1103 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); in intel_crt_init()
1114 dev_priv->fdi_rx_config = intel_de_read(dev_priv, in intel_crt_init()
1118 intel_crt_reset(&crt->base.base); in intel_crt_init()