38  * are two main clocks involved that aren't directly related to the actual
39  * pixel clock or any symbol/bit clock of the actual output port. These
466 		 * Specs are full of misinformation, but testing on actual  in vlv_calc_voltage_level()
1999 	if (!intel_cdclk_changed(&old_cdclk_state->actual,  in intel_set_cdclk_pre_plane_update()
2000 				 &new_cdclk_state->actual))  in intel_set_cdclk_pre_plane_update()
2004 	    old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) {  in intel_set_cdclk_pre_plane_update()
2007 		intel_set_cdclk(dev_priv, &new_cdclk_state->actual, pipe);  in intel_set_cdclk_pre_plane_update()
2028 	if (!intel_cdclk_changed(&old_cdclk_state->actual,  in intel_set_cdclk_post_plane_update()
2029 				 &new_cdclk_state->actual))  in intel_set_cdclk_post_plane_update()
2033 	    old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) {  in intel_set_cdclk_post_plane_update()
2036 		intel_set_cdclk(dev_priv, &new_cdclk_state->actual, pipe);  in intel_set_cdclk_post_plane_update()
2283 		cdclk_state->actual.cdclk = cdclk;  in vlv_modeset_calc_cdclk()
2284 		cdclk_state->actual.voltage_level =  in vlv_modeset_calc_cdclk()
2287 		cdclk_state->actual = cdclk_state->logical;  in vlv_modeset_calc_cdclk()
2314 		cdclk_state->actual.cdclk = cdclk;  in bdw_modeset_calc_cdclk()
2315 		cdclk_state->actual.voltage_level =  in bdw_modeset_calc_cdclk()
2318 		cdclk_state->actual = cdclk_state->logical;  in bdw_modeset_calc_cdclk()
2385 		cdclk_state->actual.vco = vco;  in skl_modeset_calc_cdclk()
2386 		cdclk_state->actual.cdclk = cdclk;  in skl_modeset_calc_cdclk()
2387 		cdclk_state->actual.voltage_level =  in skl_modeset_calc_cdclk()
2390 		cdclk_state->actual = cdclk_state->logical;  in skl_modeset_calc_cdclk()
2423 		cdclk_state->actual.vco = vco;  in bxt_modeset_calc_cdclk()
2424 		cdclk_state->actual.cdclk = cdclk;  in bxt_modeset_calc_cdclk()
2425 		cdclk_state->actual.voltage_level =  in bxt_modeset_calc_cdclk()
2428 		cdclk_state->actual = cdclk_state->logical;  in bxt_modeset_calc_cdclk()
2441 	 * the actual cdclk frequency.  in fixed_modeset_calc_cdclk()
2522 	if (intel_cdclk_changed(&old_cdclk_state->actual,  in intel_modeset_calc_cdclk()
2523 				&new_cdclk_state->actual)) {  in intel_modeset_calc_cdclk()
2526 		 * if the actual hw needs to be poked.  in intel_modeset_calc_cdclk()
2544 					&old_cdclk_state->actual,  in intel_modeset_calc_cdclk()
2545 					&new_cdclk_state->actual)) {  in intel_modeset_calc_cdclk()
2561 				  &old_cdclk_state->actual,  in intel_modeset_calc_cdclk()
2562 				  &new_cdclk_state->actual)) {  in intel_modeset_calc_cdclk()
2571 	} else if (intel_cdclk_needs_modeset(&old_cdclk_state->actual,  in intel_modeset_calc_cdclk()
2572 					     &new_cdclk_state->actual)) {  in intel_modeset_calc_cdclk()
2583 		    "New cdclk calculated to be logical %u kHz, actual %u kHz\n",  in intel_modeset_calc_cdclk()
2585 		    new_cdclk_state->actual.cdclk);  in intel_modeset_calc_cdclk()
2587 		    "New voltage level calculated to be logical %u, actual %u\n",  in intel_modeset_calc_cdclk()
2589 		    new_cdclk_state->actual.voltage_level);  in intel_modeset_calc_cdclk()
2772 	 * straps, not the actual FSB frequency. Some BIOSen  in i9xx_hrawclk()
2774 	 * read out the actual FSB frequency but sadly we  in i9xx_hrawclk()