Lines Matching full:plane
19 /* Primary plane formats for gen <= 3 */
27 /* Primary plane formats for ivb (no fp16 due to hw issue) */
37 /* Primary plane formats for gen >= 4, except ivb */
48 /* Primary plane formats for vlv/chv */
139 static bool i9xx_plane_has_windowing(struct intel_plane *plane) in i9xx_plane_has_windowing() argument
141 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_has_windowing()
142 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_has_windowing()
159 to_i915(plane_state->uapi.plane->dev); in i9xx_plane_ctl()
231 to_i915(plane_state->uapi.plane->dev); in i9xx_check_plane_surface()
261 * When using an X-tiled surface the plane starts to in i9xx_check_plane_surface()
326 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in i9xx_plane_check() local
336 i9xx_plane_has_windowing(plane)); in i9xx_plane_check()
383 * of cdclk when the sprite plane is enabled on the in i9xx_plane_ratio()
421 static void i9xx_update_plane(struct intel_plane *plane, in i9xx_update_plane() argument
425 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_update_plane()
426 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_update_plane()
481 * The control register self-arms if the plane was previously in i9xx_update_plane()
482 * disabled. Try to make the plane enable atomic by writing in i9xx_update_plane()
496 static void i9xx_disable_plane(struct intel_plane *plane, in i9xx_disable_plane() argument
499 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_disable_plane()
500 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_disable_plane()
507 * well, so we must configure them even if the plane in i9xx_disable_plane()
528 g4x_primary_async_flip(struct intel_plane *plane, in g4x_primary_async_flip() argument
533 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in g4x_primary_async_flip()
536 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in g4x_primary_async_flip()
550 vlv_primary_async_flip(struct intel_plane *plane, in vlv_primary_async_flip() argument
555 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in vlv_primary_async_flip()
557 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in vlv_primary_async_flip()
567 bdw_primary_enable_flip_done(struct intel_plane *plane) in bdw_primary_enable_flip_done() argument
569 struct drm_i915_private *i915 = to_i915(plane->base.dev); in bdw_primary_enable_flip_done()
570 enum pipe pipe = plane->pipe; in bdw_primary_enable_flip_done()
578 bdw_primary_disable_flip_done(struct intel_plane *plane) in bdw_primary_disable_flip_done() argument
580 struct drm_i915_private *i915 = to_i915(plane->base.dev); in bdw_primary_disable_flip_done()
581 enum pipe pipe = plane->pipe; in bdw_primary_disable_flip_done()
589 ivb_primary_enable_flip_done(struct intel_plane *plane) in ivb_primary_enable_flip_done() argument
591 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ivb_primary_enable_flip_done()
594 ilk_enable_display_irq(i915, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); in ivb_primary_enable_flip_done()
599 ivb_primary_disable_flip_done(struct intel_plane *plane) in ivb_primary_disable_flip_done() argument
601 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ivb_primary_disable_flip_done()
604 ilk_disable_display_irq(i915, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); in ivb_primary_disable_flip_done()
609 ilk_primary_enable_flip_done(struct intel_plane *plane) in ilk_primary_enable_flip_done() argument
611 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ilk_primary_enable_flip_done()
614 ilk_enable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); in ilk_primary_enable_flip_done()
619 ilk_primary_disable_flip_done(struct intel_plane *plane) in ilk_primary_disable_flip_done() argument
621 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ilk_primary_disable_flip_done()
624 ilk_disable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); in ilk_primary_disable_flip_done()
629 vlv_primary_enable_flip_done(struct intel_plane *plane) in vlv_primary_enable_flip_done() argument
631 struct drm_i915_private *i915 = to_i915(plane->base.dev); in vlv_primary_enable_flip_done()
632 enum pipe pipe = plane->pipe; in vlv_primary_enable_flip_done()
640 vlv_primary_disable_flip_done(struct intel_plane *plane) in vlv_primary_disable_flip_done() argument
642 struct drm_i915_private *i915 = to_i915(plane->base.dev); in vlv_primary_disable_flip_done()
643 enum pipe pipe = plane->pipe; in vlv_primary_disable_flip_done()
650 static bool i9xx_plane_get_hw_state(struct intel_plane *plane, in i9xx_plane_get_hw_state() argument
653 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_get_hw_state()
655 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_get_hw_state()
665 power_domain = POWER_DOMAIN_PIPE(plane->pipe); in i9xx_plane_get_hw_state()
675 *pipe = plane->pipe; in i9xx_plane_get_hw_state()
686 hsw_primary_max_stride(struct intel_plane *plane, in hsw_primary_max_stride() argument
698 ilk_primary_max_stride(struct intel_plane *plane, in ilk_primary_max_stride() argument
713 i965_plane_max_stride(struct intel_plane *plane, in i965_plane_max_stride() argument
728 i9xx_plane_max_stride(struct intel_plane *plane, in i9xx_plane_max_stride() argument
732 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_max_stride()
740 if (plane->i9xx_plane == PLANE_C) in i9xx_plane_max_stride()
768 struct intel_plane *plane; in intel_primary_plane_create() local
775 plane = intel_plane_alloc(); in intel_primary_plane_create()
776 if (IS_ERR(plane)) in intel_primary_plane_create()
777 return plane; in intel_primary_plane_create()
779 plane->pipe = pipe; in intel_primary_plane_create()
781 * On gen2/3 only plane A can do FBC, but the panel fitter and LVDS in intel_primary_plane_create()
782 * port is hooked to pipe B. Hence we want plane A feeding pipe B. in intel_primary_plane_create()
786 plane->i9xx_plane = (enum i9xx_plane_id) !pipe; in intel_primary_plane_create()
788 plane->i9xx_plane = (enum i9xx_plane_id) pipe; in intel_primary_plane_create()
789 plane->id = PLANE_PRIMARY; in intel_primary_plane_create()
790 plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id); in intel_primary_plane_create()
792 plane->has_fbc = i9xx_plane_has_fbc(dev_priv, plane->i9xx_plane); in intel_primary_plane_create()
793 if (plane->has_fbc) { in intel_primary_plane_create()
796 fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; in intel_primary_plane_create()
805 * "Workaround : When using the 64-bit format, the plane in intel_primary_plane_create()
809 * multiply the plane output by four." in intel_primary_plane_create()
811 * There is no dedicated plane gamma for the primary plane, in intel_primary_plane_create()
834 plane->min_cdclk = vlv_plane_min_cdclk; in intel_primary_plane_create()
836 plane->min_cdclk = hsw_plane_min_cdclk; in intel_primary_plane_create()
838 plane->min_cdclk = ivb_plane_min_cdclk; in intel_primary_plane_create()
840 plane->min_cdclk = i9xx_plane_min_cdclk; in intel_primary_plane_create()
844 plane->max_stride = i965_plane_max_stride; in intel_primary_plane_create()
846 plane->max_stride = i9xx_plane_max_stride; in intel_primary_plane_create()
849 plane->max_stride = hsw_primary_max_stride; in intel_primary_plane_create()
851 plane->max_stride = ilk_primary_max_stride; in intel_primary_plane_create()
854 plane->update_plane = i9xx_update_plane; in intel_primary_plane_create()
855 plane->disable_plane = i9xx_disable_plane; in intel_primary_plane_create()
856 plane->get_hw_state = i9xx_plane_get_hw_state; in intel_primary_plane_create()
857 plane->check_plane = i9xx_plane_check; in intel_primary_plane_create()
860 plane->async_flip = vlv_primary_async_flip; in intel_primary_plane_create()
861 plane->enable_flip_done = vlv_primary_enable_flip_done; in intel_primary_plane_create()
862 plane->disable_flip_done = vlv_primary_disable_flip_done; in intel_primary_plane_create()
864 plane->need_async_flip_disable_wa = true; in intel_primary_plane_create()
865 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
866 plane->enable_flip_done = bdw_primary_enable_flip_done; in intel_primary_plane_create()
867 plane->disable_flip_done = bdw_primary_disable_flip_done; in intel_primary_plane_create()
869 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
870 plane->enable_flip_done = ivb_primary_enable_flip_done; in intel_primary_plane_create()
871 plane->disable_flip_done = ivb_primary_disable_flip_done; in intel_primary_plane_create()
873 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
874 plane->enable_flip_done = ilk_primary_enable_flip_done; in intel_primary_plane_create()
875 plane->disable_flip_done = ilk_primary_disable_flip_done; in intel_primary_plane_create()
879 ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, in intel_primary_plane_create()
886 ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, in intel_primary_plane_create()
891 "plane %c", in intel_primary_plane_create()
892 plane_name(plane->i9xx_plane)); in intel_primary_plane_create()
908 drm_plane_create_rotation_property(&plane->base, in intel_primary_plane_create()
913 drm_plane_create_zpos_immutable_property(&plane->base, zpos); in intel_primary_plane_create()
915 intel_plane_helper_add(plane); in intel_primary_plane_create()
917 return plane; in intel_primary_plane_create()
920 intel_plane_free(plane); in intel_primary_plane_create()
964 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in i9xx_get_initial_plane_config() local
965 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_get_initial_plane_config()
973 if (!plane->get_hw_state(plane, &pipe)) in i9xx_get_initial_plane_config()
1037 crtc->base.name, plane->base.name, fb->width, fb->height, in i9xx_get_initial_plane_config()