987 	u32 signal_levels = 0;  in g4x_signal_levels()  local
992 		signal_levels |= DP_VOLTAGE_0_4;  in g4x_signal_levels()
995 		signal_levels |= DP_VOLTAGE_0_6;  in g4x_signal_levels()
998 		signal_levels |= DP_VOLTAGE_0_8;  in g4x_signal_levels()
1001 		signal_levels |= DP_VOLTAGE_1_2;  in g4x_signal_levels()
1007 		signal_levels |= DP_PRE_EMPHASIS_0;  in g4x_signal_levels()
1010 		signal_levels |= DP_PRE_EMPHASIS_3_5;  in g4x_signal_levels()
1013 		signal_levels |= DP_PRE_EMPHASIS_6;  in g4x_signal_levels()
1016 		signal_levels |= DP_PRE_EMPHASIS_9_5;  in g4x_signal_levels()
1019 	return signal_levels;  in g4x_signal_levels()
1028 	u32 signal_levels;  in g4x_set_signal_levels()  local
1030 	signal_levels = g4x_signal_levels(train_set);  in g4x_set_signal_levels()
1033 		    signal_levels);  in g4x_set_signal_levels()
1036 	intel_dp->DP |= signal_levels;  in g4x_set_signal_levels()
1045 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in snb_cpu_edp_signal_levels()  local
1048 	switch (signal_levels) {  in snb_cpu_edp_signal_levels()
1064 		MISSING_CASE(signal_levels);  in snb_cpu_edp_signal_levels()
1075 	u32 signal_levels;  in snb_cpu_edp_set_signal_levels()  local
1077 	signal_levels = snb_cpu_edp_signal_levels(train_set);  in snb_cpu_edp_set_signal_levels()
1080 		    signal_levels);  in snb_cpu_edp_set_signal_levels()
1083 	intel_dp->DP |= signal_levels;  in snb_cpu_edp_set_signal_levels()
1092 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in ivb_cpu_edp_signal_levels()  local
1095 	switch (signal_levels) {  in ivb_cpu_edp_signal_levels()
1115 		MISSING_CASE(signal_levels);  in ivb_cpu_edp_signal_levels()
1126 	u32 signal_levels;  in ivb_cpu_edp_set_signal_levels()  local
1128 	signal_levels = ivb_cpu_edp_signal_levels(train_set);  in ivb_cpu_edp_set_signal_levels()
1131 		    signal_levels);  in ivb_cpu_edp_set_signal_levels()
1134 	intel_dp->DP |= signal_levels;  in ivb_cpu_edp_set_signal_levels()