Lines Matching +full:vcca +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0
117 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
118 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
119 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
120 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
135 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
141 * serves double-duty of keeping track of the direction and
147 * each other's read-modify-write.
196 regmap_write(pdata->regmap, reg, val & 0xFF); in ti_sn65dsi86_write_u16()
197 regmap_write(pdata->regmap, reg + 1, val >> 8); in ti_sn65dsi86_write_u16()
204 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_get_dsi_freq()
206 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
207 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
208 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
238 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
239 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
242 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
254 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
260 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
270 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn65dsi86_enable_comms()
281 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn65dsi86_enable_comms()
284 pdata->comms_enabled = true; in ti_sn65dsi86_enable_comms()
286 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
291 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
293 pdata->comms_enabled = false; in ti_sn65dsi86_disable_comms()
294 clk_disable_unprepare(pdata->refclk); in ti_sn65dsi86_disable_comms()
296 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
304 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_resume()
313 gpiod_set_value(pdata->enable_gpio, 1); in ti_sn65dsi86_resume()
322 if (pdata->refclk) in ti_sn65dsi86_resume()
333 if (pdata->refclk) in ti_sn65dsi86_suspend()
336 gpiod_set_value(pdata->enable_gpio, 0); in ti_sn65dsi86_suspend()
338 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_suspend()
353 struct ti_sn65dsi86 *pdata = s->private; in status_show()
358 pm_runtime_get_sync(pdata->dev); in status_show()
362 regmap_read(pdata->regmap, reg, &val); in status_show()
366 pm_runtime_put_autosuspend(pdata->dev); in status_show()
380 struct device *dev = pdata->dev; in ti_sn65dsi86_debugfs_init()
400 /* -----------------------------------------------------------------------------
415 * AUX bus docs say that a non-NULL release is mandatory, but it makes no
425 struct device *dev = pdata->dev; in ti_sn65dsi86_add_aux_device()
428 aux->name = name; in ti_sn65dsi86_add_aux_device()
429 aux->dev.parent = dev; in ti_sn65dsi86_add_aux_device()
430 aux->dev.release = ti_sn65dsi86_noop; in ti_sn65dsi86_add_aux_device()
431 device_set_of_node_from_dev(&aux->dev, dev); in ti_sn65dsi86_add_aux_device()
447 /* -----------------------------------------------------------------------------
460 u32 request = msg->request & ~(DP_AUX_I2C_MOT | DP_AUX_I2C_WRITE_STATUS_UPDATE); in ti_sn_aux_transfer()
461 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
462 u8 *buf = msg->buffer; in ti_sn_aux_transfer()
463 unsigned int len = msg->size; in ti_sn_aux_transfer()
466 u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; in ti_sn_aux_transfer()
469 return -EINVAL; in ti_sn_aux_transfer()
471 pm_runtime_get_sync(pdata->dev); in ti_sn_aux_transfer()
472 mutex_lock(&pdata->comms_mutex); in ti_sn_aux_transfer()
477 * do it. Fail right away. This prevents non-refclk users from reading in ti_sn_aux_transfer()
480 if (!pdata->comms_enabled) { in ti_sn_aux_transfer()
481 ret = -EIO; in ti_sn_aux_transfer()
490 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
492 msg->reply = 0; in ti_sn_aux_transfer()
495 ret = -EINVAL; in ti_sn_aux_transfer()
500 put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, in ti_sn_aux_transfer()
502 regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, in ti_sn_aux_transfer()
506 regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); in ti_sn_aux_transfer()
509 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
514 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
517 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
522 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
532 ret = -ETIMEDOUT; in ti_sn_aux_transfer()
537 ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &len); in ti_sn_aux_transfer()
544 msg->reply |= DP_AUX_I2C_REPLY_NACK; in ti_sn_aux_transfer()
548 msg->reply |= DP_AUX_NATIVE_REPLY_NACK; in ti_sn_aux_transfer()
556 ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); in ti_sn_aux_transfer()
559 mutex_unlock(&pdata->comms_mutex); in ti_sn_aux_transfer()
560 pm_runtime_mark_last_busy(pdata->dev); in ti_sn_aux_transfer()
561 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_aux_transfer()
571 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_aux_probe()
574 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_aux_probe()
575 pdata->aux.dev = &adev->dev; in ti_sn_aux_probe()
576 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_aux_probe()
577 drm_dp_aux_init(&pdata->aux); in ti_sn_aux_probe()
579 ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux); in ti_sn_aux_probe()
587 return ti_sn65dsi86_add_aux_device(pdata, &pdata->bridge_aux, "bridge"); in ti_sn_aux_probe()
601 /* -----------------------------------------------------------------------------
615 return drm_bridge_get_modes(pdata->next_bridge, connector); in ti_sn_bridge_connector_get_modes()
623 if (mode->clock > 594000) in ti_sn_bridge_connector_mode_valid()
646 ret = drm_connector_init(pdata->bridge.dev, &pdata->connector, in ti_sn_bridge_connector_init()
654 drm_connector_helper_add(&pdata->connector, in ti_sn_bridge_connector_init()
656 drm_connector_attach_encoder(&pdata->connector, pdata->bridge.encoder); in ti_sn_bridge_connector_init()
661 /*------------------------------------------------------------------------------
684 return -EINVAL; in ti_sn_bridge_attach()
687 pdata->aux.drm_dev = bridge->dev; in ti_sn_bridge_attach()
688 ret = drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_attach()
690 drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n", ret); in ti_sn_bridge_attach()
709 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_bridge_attach()
712 ret = -ENODEV; in ti_sn_bridge_attach()
724 dsi->lanes = 4; in ti_sn_bridge_attach()
725 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_bridge_attach()
726 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_bridge_attach()
729 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_attach()
730 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_bridge_attach()
731 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_attach()
733 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_bridge_attach()
740 pdata->dsi = dsi; in ti_sn_bridge_attach()
746 ret = drm_bridge_attach(bridge->encoder, pdata->next_bridge, in ti_sn_bridge_attach()
747 &pdata->bridge, flags); in ti_sn_bridge_attach()
758 drm_connector_cleanup(&pdata->connector); in ti_sn_bridge_attach()
760 drm_dp_aux_unregister(&pdata->aux); in ti_sn_bridge_attach()
766 drm_dp_aux_unregister(&bridge_to_ti_sn65dsi86(bridge)->aux); in ti_sn_bridge_detach()
774 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_disable()
782 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_dsi_rate()
785 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
786 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
787 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
791 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
792 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
797 if (pdata->connector.display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
817 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_calc_min_dp_rate_idx()
820 bit_rate_khz = mode->clock * ti_sn_bridge_get_bpp(pdata); in ti_sn_bridge_calc_min_dp_rate_idx()
824 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
826 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
842 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
844 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
853 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
857 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
883 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
888 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
890 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
898 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
919 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_video_timings()
922 if (mode->flags & DRM_MODE_FLAG_PHSYNC) in ti_sn_bridge_set_video_timings()
924 if (mode->flags & DRM_MODE_FLAG_PVSYNC) in ti_sn_bridge_set_video_timings()
928 mode->hdisplay); in ti_sn_bridge_set_video_timings()
930 mode->vdisplay); in ti_sn_bridge_set_video_timings()
931 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
932 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
933 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
934 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
936 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
937 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
938 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
939 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
942 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
943 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
944 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
945 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
947 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
948 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
949 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
950 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
960 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
962 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
978 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
982 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
984 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
1000 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
1001 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
1009 ret = -EIO; in ti_sn_link_training()
1018 DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i); in ti_sn_link_training()
1023 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
1035 int ret = -EINVAL; in ti_sn_bridge_enable()
1039 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_enable()
1042 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_enable()
1043 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_enable()
1046 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_enable()
1047 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_enable()
1048 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_enable()
1059 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_enable()
1064 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_enable()
1067 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_enable()
1068 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_enable()
1085 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_enable()
1093 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_enable()
1101 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_pre_enable()
1103 if (!pdata->refclk) in ti_sn_bridge_pre_enable()
1115 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_post_disable()
1117 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); in ti_sn_bridge_post_disable()
1119 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_post_disable()
1121 if (!pdata->refclk) in ti_sn_bridge_post_disable()
1124 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_post_disable()
1151 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1157 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1158 dp_lanes = of_property_count_u32_elems(endpoint, "data-lanes"); in ti_sn_bridge_parse_lanes()
1160 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1162 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1171 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1174 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1180 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1181 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1182 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1187 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
1189 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
1191 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
1193 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
1202 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_probe()
1203 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_probe()
1209 return dev_err_probe(&adev->dev, ret, in ti_sn_bridge_probe()
1212 pdata->next_bridge = devm_drm_panel_bridge_add(pdata->dev, panel); in ti_sn_bridge_probe()
1213 if (IS_ERR(pdata->next_bridge)) { in ti_sn_bridge_probe()
1215 return PTR_ERR(pdata->next_bridge); in ti_sn_bridge_probe()
1224 pdata->bridge.funcs = &ti_sn_bridge_funcs; in ti_sn_bridge_probe()
1225 pdata->bridge.of_node = np; in ti_sn_bridge_probe()
1227 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1234 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_remove()
1239 if (pdata->dsi) { in ti_sn_bridge_remove()
1240 mipi_dsi_detach(pdata->dsi); in ti_sn_bridge_remove()
1241 mipi_dsi_device_unregister(pdata->dsi); in ti_sn_bridge_remove()
1244 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1246 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1261 /* -----------------------------------------------------------------------------
1271 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
1272 return -EINVAL; in tn_sn_bridge_of_xlate()
1274 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
1275 return -EINVAL; in tn_sn_bridge_of_xlate()
1278 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
1280 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
1294 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
1306 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
1312 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
1313 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
1314 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_get()
1328 if (!test_bit(offset, pdata->gchip_output)) { in ti_sn_bridge_gpio_set()
1329 dev_err(pdata->dev, "Ignoring GPIO set while input\n"); in ti_sn_bridge_gpio_set()
1334 ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1338 dev_warn(pdata->dev, in ti_sn_bridge_gpio_set()
1349 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1352 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1356 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1365 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1377 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1380 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1386 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1390 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1391 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1410 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_gpio_probe()
1414 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_gpio_probe()
1417 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_gpio_probe()
1418 pdata->gchip.parent = pdata->dev; in ti_sn_gpio_probe()
1419 pdata->gchip.owner = THIS_MODULE; in ti_sn_gpio_probe()
1420 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_gpio_probe()
1421 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_gpio_probe()
1422 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_gpio_probe()
1423 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_gpio_probe()
1424 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_gpio_probe()
1425 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_gpio_probe()
1426 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_gpio_probe()
1427 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_gpio_probe()
1428 pdata->gchip.can_sleep = true; in ti_sn_gpio_probe()
1429 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_gpio_probe()
1430 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_gpio_probe()
1431 pdata->gchip.base = -1; in ti_sn_gpio_probe()
1432 ret = devm_gpiochip_add_data(&adev->dev, &pdata->gchip, pdata); in ti_sn_gpio_probe()
1434 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_gpio_probe()
1469 /* -----------------------------------------------------------------------------
1482 "vcca", "vcc", "vccio", "vpll", in ti_sn65dsi86_parse_regulators()
1486 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn65dsi86_parse_regulators()
1488 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn65dsi86_parse_regulators()
1489 pdata->supplies); in ti_sn65dsi86_parse_regulators()
1495 struct device *dev = &client->dev; in ti_sn65dsi86_probe()
1499 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn65dsi86_probe()
1501 return -ENODEV; in ti_sn65dsi86_probe()
1506 return -ENOMEM; in ti_sn65dsi86_probe()
1508 pdata->dev = dev; in ti_sn65dsi86_probe()
1510 mutex_init(&pdata->comms_mutex); in ti_sn65dsi86_probe()
1512 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn65dsi86_probe()
1514 if (IS_ERR(pdata->regmap)) in ti_sn65dsi86_probe()
1515 return dev_err_probe(dev, PTR_ERR(pdata->regmap), in ti_sn65dsi86_probe()
1518 pdata->enable_gpio = devm_gpiod_get_optional(dev, "enable", in ti_sn65dsi86_probe()
1520 if (IS_ERR(pdata->enable_gpio)) in ti_sn65dsi86_probe()
1521 return dev_err_probe(dev, PTR_ERR(pdata->enable_gpio), in ti_sn65dsi86_probe()
1528 pdata->refclk = devm_clk_get_optional(dev, "refclk"); in ti_sn65dsi86_probe()
1529 if (IS_ERR(pdata->refclk)) in ti_sn65dsi86_probe()
1530 return dev_err_probe(dev, PTR_ERR(pdata->refclk), in ti_sn65dsi86_probe()
1537 pm_runtime_set_autosuspend_delay(pdata->dev, 500); in ti_sn65dsi86_probe()
1538 pm_runtime_use_autosuspend(pdata->dev); in ti_sn65dsi86_probe()
1544 * motiviation here is to solve the chicken-and-egg problem of probe in ti_sn65dsi86_probe()
1549 * problem. Having sub-devices allows the some sub devices to finish in ti_sn65dsi86_probe()
1550 * probing even if others return -EPROBE_DEFER and gets us around the in ti_sn65dsi86_probe()
1555 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->gpio_aux, "gpio"); in ti_sn65dsi86_probe()
1566 return ti_sn65dsi86_add_aux_device(pdata, &pdata->aux_aux, "aux"); in ti_sn65dsi86_probe()