Lines Matching refs:pixelclock
289 static int anx7625_calculate_m_n(u32 pixelclock, in anx7625_calculate_m_n() argument
294 if (pixelclock > PLL_OUT_FREQ_ABS_MAX / POST_DIVIDER_MIN) { in anx7625_calculate_m_n()
297 pixelclock, in anx7625_calculate_m_n()
302 if (pixelclock < PLL_OUT_FREQ_ABS_MIN / POST_DIVIDER_MAX) { in anx7625_calculate_m_n()
305 pixelclock, in anx7625_calculate_m_n()
311 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));) in anx7625_calculate_m_n()
316 (pixelclock < in anx7625_calculate_m_n()
339 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) { in anx7625_calculate_m_n()
341 pixelclock * (*post_divider), in anx7625_calculate_m_n()
346 *m = pixelclock; in anx7625_calculate_m_n()
414 ret = anx7625_calculate_m_n(ctx->dt.pixelclock.min * 1000, in anx7625_dsi_video_timing_config()
427 (ctx->dt.pixelclock.min / 1000) & 0xFF); in anx7625_dsi_video_timing_config()
429 (ctx->dt.pixelclock.min / 1000) >> 8); in anx7625_dsi_video_timing_config()
1420 ctx->dt.pixelclock.min = mode->clock; in anx7625_bridge_mode_set()
1432 DRM_DEV_DEBUG_DRIVER(dev, "pixelclock(%d).\n", ctx->dt.pixelclock.min); in anx7625_bridge_mode_set()