Lines Matching +full:0 +full:x2c
36 .regs_offset = 0x40,
37 .id = 0,
39 .cfgs_offset = 0x2c,
45 .clut_offset = 0x400,
50 .min_width = 0,
51 .min_height = 0,
54 .max_spw = 0x3f,
55 .max_vpw = 0x3f,
56 .max_hpw = 0xff,
66 .regs_offset = 0x40,
67 .id = 0,
69 .cfgs_offset = 0x2c,
77 .clut_offset = 0x400,
82 .regs_offset = 0x100,
85 .cfgs_offset = 0x2c,
96 .clut_offset = 0x800,
101 .regs_offset = 0x280,
104 .cfgs_offset = 0x4c,
118 .clut_offset = 0x1000,
123 .regs_offset = 0x340,
128 .cfgs_offset = 0x2c,
138 .clut_offset = 0x1400,
143 .min_width = 0,
144 .min_height = 0,
147 .max_spw = 0x3f,
148 .max_vpw = 0x3f,
149 .max_hpw = 0xff,
159 .regs_offset = 0x40,
160 .id = 0,
162 .cfgs_offset = 0x2c,
170 .clut_offset = 0x600,
175 .regs_offset = 0x140,
178 .cfgs_offset = 0x2c,
189 .clut_offset = 0xa00,
194 .regs_offset = 0x240,
197 .cfgs_offset = 0x2c,
208 .clut_offset = 0xe00,
213 .regs_offset = 0x340,
216 .cfgs_offset = 0x4c,
234 .clut_offset = 0x1200,
239 .regs_offset = 0x440,
244 .cfgs_offset = 0x2c,
256 .clut_offset = 0x1600,
261 .min_width = 0,
262 .min_height = 0,
265 .max_spw = 0x3f,
266 .max_vpw = 0x3f,
267 .max_hpw = 0x1ff,
277 .regs_offset = 0x40,
278 .id = 0,
280 .cfgs_offset = 0x2c,
288 .clut_offset = 0x600,
293 .regs_offset = 0x140,
296 .cfgs_offset = 0x2c,
307 .clut_offset = 0xa00,
312 .regs_offset = 0x240,
315 .cfgs_offset = 0x2c,
326 .clut_offset = 0xe00,
331 .regs_offset = 0x340,
334 .cfgs_offset = 0x4c,
352 .clut_offset = 0x1200,
357 .min_width = 0,
358 .min_height = 0,
361 .max_spw = 0xff,
362 .max_vpw = 0xff,
363 .max_hpw = 0x3ff,
372 .regs_offset = 0x60,
373 .id = 0,
375 .cfgs_offset = 0x2c,
383 .clut_offset = 0x600,
388 .regs_offset = 0x160,
391 .cfgs_offset = 0x2c,
402 .clut_offset = 0xa00,
407 .regs_offset = 0x260,
410 .cfgs_offset = 0x2c,
421 .clut_offset = 0xe00,
426 .regs_offset = 0x360,
429 .cfgs_offset = 0x4c,
447 .clut_offset = 0x1200,
452 .min_width = 0,
453 .min_height = 0,
456 .max_spw = 0xff,
457 .max_vpw = 0xff,
458 .max_hpw = 0x3ff,
516 vback_porch > dc->desc->max_vpw || vback_porch < 0 || in atmel_hlcdc_dc_mode_valid()
551 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) { in atmel_hlcdc_dc_irq_handler()
562 unsigned int cfg = 0; in atmel_hlcdc_dc_irq_postinstall()
566 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) { in atmel_hlcdc_dc_irq_postinstall()
579 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, 0xffffffff); in atmel_hlcdc_dc_irq_disable()
589 ret = devm_request_irq(dev->dev, irq, atmel_hlcdc_dc_irq_handler, 0, in atmel_hlcdc_dc_irq_install()
596 return 0; in atmel_hlcdc_dc_irq_install()
642 return 0; in atmel_hlcdc_dc_modeset_init()
680 if (ret < 0) { in atmel_hlcdc_dc_load()
686 if (ret < 0) { in atmel_hlcdc_dc_load()
696 if (ret < 0) { in atmel_hlcdc_dc_load()
705 return 0; in atmel_hlcdc_dc_load()
742 .minor = 0,
758 ret = drm_dev_register(ddev, 0); in atmel_hlcdc_dc_drm_probe()
764 return 0; in atmel_hlcdc_dc_drm_probe()
783 return 0; in atmel_hlcdc_dc_drm_remove()
804 return 0; in atmel_hlcdc_dc_drm_suspend()