916 	return pp_funcs->get_sclk((adev)->powerplay.pp_handle, (low));  in amdgpu_dpm_get_sclk()
923 	return pp_funcs->get_mclk((adev)->powerplay.pp_handle, (low));  in amdgpu_dpm_get_mclk()
963 				(adev)->powerplay.pp_handle, block_type, gate));  in amdgpu_dpm_set_powergating_by_smu()
975 				(adev)->powerplay.pp_handle, block_type, gate));  in amdgpu_dpm_set_powergating_by_smu()
988 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_enter()  local
995 	ret = pp_funcs->set_asic_baco_state(pp_handle, 1);  in amdgpu_dpm_baco_enter()
1003 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_exit()  local
1010 	ret = pp_funcs->set_asic_baco_state(pp_handle, 0);  in amdgpu_dpm_baco_exit()
1023 				adev->powerplay.pp_handle,  in amdgpu_dpm_set_mp1_state()
1033 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_is_baco_supported()  local
1039 	if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap))  in amdgpu_dpm_is_baco_supported()
1048 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_mode2_reset()  local
1053 	return pp_funcs->asic_reset_mode_2(pp_handle);  in amdgpu_dpm_mode2_reset()
1059 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_reset()  local
1066 	ret = pp_funcs->set_asic_baco_state(pp_handle, 1);  in amdgpu_dpm_baco_reset()
1071 	ret = pp_funcs->set_asic_baco_state(pp_handle, 0);  in amdgpu_dpm_baco_reset()
1110 			adev->powerplay.pp_handle, type, en);  in amdgpu_dpm_switch_power_profile()
1122 		ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,  in amdgpu_dpm_set_xgmi_pstate()
1133 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_set_df_cstate()  local
1136 		ret = pp_funcs->set_df_cstate(pp_handle, cstate);  in amdgpu_dpm_set_df_cstate()
1153 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_enable_mgpu_fan_boost()  local
1159 		ret = pp_funcs->enable_mgpu_fan_boost(pp_handle);  in amdgpu_dpm_enable_mgpu_fan_boost()
1167 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_set_clockgating_by_smu()  local
1173 		ret = pp_funcs->set_clockgating_by_smu(pp_handle,  in amdgpu_dpm_set_clockgating_by_smu()
1182 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_smu_i2c_bus_access()  local
1188 		ret = pp_funcs->smu_i2c_bus_access(pp_handle,  in amdgpu_dpm_smu_i2c_bus_access()
1222 		ret = pp_funcs->read_sensor((adev)->powerplay.pp_handle,  in amdgpu_dpm_read_sensor()
1496 							adev->powerplay.pp_handle,  in amdgpu_pm_compute_clocks()
1533 			struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;  in amdgpu_dpm_enable_uvd()
1595 		r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);  in amdgpu_pm_load_smu_firmware()