914 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_sclk()  local
916 	return pp_funcs->get_sclk((adev)->powerplay.pp_handle, (low));  in amdgpu_dpm_get_sclk()
921 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_mclk()  local
923 	return pp_funcs->get_mclk((adev)->powerplay.pp_handle, (low));  in amdgpu_dpm_get_mclk()
929 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_powergating_by_smu()  local
934 		if (pp_funcs && pp_funcs->set_powergating_by_smu) {  in amdgpu_dpm_set_powergating_by_smu()
962 			ret = (pp_funcs->set_powergating_by_smu(  in amdgpu_dpm_set_powergating_by_smu()
973 		if (pp_funcs && pp_funcs->set_powergating_by_smu) {  in amdgpu_dpm_set_powergating_by_smu()
974 			ret = (pp_funcs->set_powergating_by_smu(  in amdgpu_dpm_set_powergating_by_smu()
987 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_enter()  local
991 	if (!pp_funcs || !pp_funcs->set_asic_baco_state)  in amdgpu_dpm_baco_enter()
995 	ret = pp_funcs->set_asic_baco_state(pp_handle, 1);  in amdgpu_dpm_baco_enter()
1002 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_exit()  local
1006 	if (!pp_funcs || !pp_funcs->set_asic_baco_state)  in amdgpu_dpm_baco_exit()
1010 	ret = pp_funcs->set_asic_baco_state(pp_handle, 0);  in amdgpu_dpm_baco_exit()
1019 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_mp1_state()  local
1021 	if (pp_funcs && pp_funcs->set_mp1_state) {  in amdgpu_dpm_set_mp1_state()
1022 		ret = pp_funcs->set_mp1_state(  in amdgpu_dpm_set_mp1_state()
1032 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_is_baco_supported()  local
1036 	if (!pp_funcs || !pp_funcs->get_asic_baco_capability)  in amdgpu_dpm_is_baco_supported()
1039 	if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap))  in amdgpu_dpm_is_baco_supported()
1047 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_mode2_reset()  local
1050 	if (!pp_funcs || !pp_funcs->asic_reset_mode_2)  in amdgpu_dpm_mode2_reset()
1053 	return pp_funcs->asic_reset_mode_2(pp_handle);  in amdgpu_dpm_mode2_reset()
1058 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_reset()  local
1062 	if (!pp_funcs || !pp_funcs->set_asic_baco_state)  in amdgpu_dpm_baco_reset()
1066 	ret = pp_funcs->set_asic_baco_state(pp_handle, 1);  in amdgpu_dpm_baco_reset()
1071 	ret = pp_funcs->set_asic_baco_state(pp_handle, 0);  in amdgpu_dpm_baco_reset()
1102 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_switch_power_profile()  local
1108 	if (pp_funcs && pp_funcs->switch_power_profile)  in amdgpu_dpm_switch_power_profile()
1109 		ret = pp_funcs->switch_power_profile(  in amdgpu_dpm_switch_power_profile()
1118 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_xgmi_pstate()  local
1121 	if (pp_funcs && pp_funcs->set_xgmi_pstate)  in amdgpu_dpm_set_xgmi_pstate()
1122 		ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,  in amdgpu_dpm_set_xgmi_pstate()
1132 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_df_cstate()  local
1135 	if (pp_funcs && pp_funcs->set_df_cstate)  in amdgpu_dpm_set_df_cstate()
1136 		ret = pp_funcs->set_df_cstate(pp_handle, cstate);  in amdgpu_dpm_set_df_cstate()
1154 	const struct amd_pm_funcs *pp_funcs =  in amdgpu_dpm_enable_mgpu_fan_boost()  local
1155 			adev->powerplay.pp_funcs;  in amdgpu_dpm_enable_mgpu_fan_boost()
1158 	if (pp_funcs && pp_funcs->enable_mgpu_fan_boost)  in amdgpu_dpm_enable_mgpu_fan_boost()
1159 		ret = pp_funcs->enable_mgpu_fan_boost(pp_handle);  in amdgpu_dpm_enable_mgpu_fan_boost()
1168 	const struct amd_pm_funcs *pp_funcs =  in amdgpu_dpm_set_clockgating_by_smu()  local
1169 			adev->powerplay.pp_funcs;  in amdgpu_dpm_set_clockgating_by_smu()
1172 	if (pp_funcs && pp_funcs->set_clockgating_by_smu)  in amdgpu_dpm_set_clockgating_by_smu()
1173 		ret = pp_funcs->set_clockgating_by_smu(pp_handle,  in amdgpu_dpm_set_clockgating_by_smu()
1183 	const struct amd_pm_funcs *pp_funcs =  in amdgpu_dpm_smu_i2c_bus_access()  local
1184 			adev->powerplay.pp_funcs;  in amdgpu_dpm_smu_i2c_bus_access()
1187 	if (pp_funcs && pp_funcs->smu_i2c_bus_access)  in amdgpu_dpm_smu_i2c_bus_access()
1188 		ret = pp_funcs->smu_i2c_bus_access(pp_handle,  in amdgpu_dpm_smu_i2c_bus_access()
1202 		if (adev->powerplay.pp_funcs &&  in amdgpu_pm_acpi_event_handler()
1203 		    adev->powerplay.pp_funcs->enable_bapm)  in amdgpu_pm_acpi_event_handler()
1215 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_read_sensor()  local
1221 	if (pp_funcs && pp_funcs->read_sensor)  in amdgpu_dpm_read_sensor()
1222 		ret = pp_funcs->read_sensor((adev)->powerplay.pp_handle,  in amdgpu_dpm_read_sensor()
1273 	if (single_display && adev->powerplay.pp_funcs->vblank_too_short) {  in amdgpu_dpm_pick_power_state()
1422 	if (amdgpu_dpm == 1 && adev->powerplay.pp_funcs->print_power_state) {  in amdgpu_dpm_change_power_state_locked()
1431 	if (adev->powerplay.pp_funcs->display_configuration_changed)  in amdgpu_dpm_change_power_state_locked()
1438 	if (adev->powerplay.pp_funcs->check_state_equal) {  in amdgpu_dpm_change_power_state_locked()
1452 	if (adev->powerplay.pp_funcs->force_performance_level) {  in amdgpu_dpm_change_power_state_locked()
1482 	if (adev->powerplay.pp_funcs->dispatch_tasks) {  in amdgpu_pm_compute_clocks()
1494 			if (adev->powerplay.pp_funcs->display_configuration_change)  in amdgpu_pm_compute_clocks()
1495 				adev->powerplay.pp_funcs->display_configuration_change(  in amdgpu_pm_compute_clocks()
1572 	if (adev->powerplay.pp_funcs->print_power_state == NULL)  in amdgpu_pm_print_power_states()
1594 	if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) {  in amdgpu_pm_load_smu_firmware()
1595 		r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);  in amdgpu_pm_load_smu_firmware()