Lines Matching +full:0 +full:x409

31 #define DP_SINK_HW_REVISION_START 0x409
35 	DPCD_REV_10 = 0x10,
36 	DPCD_REV_11 = 0x11,
37 	DPCD_REV_12 = 0x12,
38 	DPCD_REV_13 = 0x13,
39 	DPCD_REV_14 = 0x14
44 	DOWNSTREAM_DP = 0,
51 	LINK_TEST_PATTERN_NONE = 0,
58 	TEST_COLOR_FORMAT_RGB = 0,
64 	TEST_BIT_DEPTH_6 = 0,
72 The order of test patterns follows DPCD register PHY_TEST_PATTERN (0x248)
75 	PHY_TEST_PATTERN_NONE = 0,
86 	TEST_DYN_RANGE_VESA = 0,
91 	AUDIO_TEST_PATTERN_OPERATOR_DEFINED = 0,/* direct HW translation */
96 	AUDIO_SAMPLING_RATE_32KHZ = 0,/* direct HW translation */
106 	AUDIO_CHANNELS_1 = 0,/* direct HW translation */
119 	DPCD_AUDIO_TEST_PATTERN_PERIOD_NOTUSED = 0,/* direct HW translation */
134 	DPCD_TRAINING_PATTERN_VIDEOIDLE = 0,/* direct HW translation! */
144 	PSR_SINK_STATE_INACTIVE = 0,
152 #define DP_SOURCE_TABLE_REVISION	    0x310
153 #define DP_SOURCE_PAYLOAD_SIZE		    0x311
154 #define DP_SOURCE_SINK_CAP		    0x317
155 #define DP_SOURCE_BACKLIGHT_LEVEL	    0x320
156 #define DP_SOURCE_BACKLIGHT_CURRENT_PEAK    0x326
157 #define DP_SOURCE_BACKLIGHT_CONTROL	    0x32E
158 #define DP_SOURCE_BACKLIGHT_ENABLE	    0x32F
159 #define DP_SOURCE_MINIMUM_HBLANK_SUPPORTED	0x340