Lines Matching refs:dc

279 struct dc;
285 bool (*get_dcc_compression_cap)(const struct dc *dc,
417 unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
418 dm_get_timestamp(dc->ctx) : 0
421 if (dc->debug.bw_val_profile.enable) \
422 dc->debug.bw_val_profile.total_count++
425 if (dc->debug.bw_val_profile.enable) { \
427 voltage_level_tick = dm_get_timestamp(dc->ctx); \
428 dc->debug.bw_val_profile.skip_ ## status ## _count++; \
432 if (dc->debug.bw_val_profile.enable) \
433 voltage_level_tick = dm_get_timestamp(dc->ctx)
436 if (dc->debug.bw_val_profile.enable) \
437 watermark_tick = dm_get_timestamp(dc->ctx)
440 if (dc->debug.bw_val_profile.enable) { \
441 end_tick = dm_get_timestamp(dc->ctx); \
442 dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
443 dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
445 dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
446 dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
634 struct dc { struct
737 struct dc *dc_create(const struct dc_init_data *init_params);
738 void dc_hardware_init(struct dc *dc);
740 int dc_get_vmid_use_vector(struct dc *dc);
741 void dc_setup_vm_context(struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid);
743 int dc_setup_system_context(struct dc *dc, struct dc_phy_addr_space_config *pa_config);
744 void dc_init_callbacks(struct dc *dc,
746 void dc_deinit_callbacks(struct dc *dc);
747 void dc_destroy(struct dc **dc);
999 struct dc_plane_state *dc_create_plane_state(struct dc *dc);
1031 struct dc *dc);
1044 bool dc_validate_seamless_boot_timing(const struct dc *dc,
1048 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
1060 struct dc *dc,
1066 const struct dc *dc,
1071 struct dc *dc, bool acquire,
1082 const struct dc *dc,
1087 bool dc_resource_is_dsc_encoding_supported(const struct dc *dc);
1098 bool dc_commit_state(struct dc *dc, struct dc_state *context);
1100 struct dc_state *dc_create_state(struct dc *dc);
1197 uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);
1282 struct dc *dc,
1285 bool dc_interrupt_set(struct dc *dc, enum dc_irq_source src, bool enable);
1286 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
1288 struct dc *dc, uint32_t link_index);
1295 struct dc *dc,
1297 void dc_resume(struct dc *dc);
1299 void dc_power_down_on_boot(struct dc *dc);
1310 bool dc_is_dmcu_initialized(struct dc *dc);
1312 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_…
1313 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);
1316 bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_state *plane,
1319 void dc_allow_idle_optimizations(struct dc *dc, bool allow);
1325 void dc_unlock_memory_clock_frequency(struct dc *dc);
1331 void dc_lock_memory_clock_frequency(struct dc *dc);
1334 void dc_hardware_release(struct dc *dc);
1338 bool dc_set_psr_allow_active(struct dc *dc, bool enable);
1340 void dc_z10_restore(struct dc *dc);
1341 void dc_z10_save_init(struct dc *dc);
1344 bool dc_enable_dmub_notifications(struct dc *dc);
1346 bool dc_process_dmub_aux_transfer_async(struct dc *dc,
1358 void dc_disable_accelerated_mode(struct dc *dc);