102 	int i, se, sh, cu;  in mqd_symmetrically_map_cu_mask()  local
121 	/* Count active CUs per SH.  in mqd_symmetrically_map_cu_mask()
123 	 * Some CUs in an SH may be disabled.	HW expects disabled CUs to be  in mqd_symmetrically_map_cu_mask()
124 	 * represented in the high bits of each SH's enable mask (the upper and lower  in mqd_symmetrically_map_cu_mask()
126 	 * disabled CUs within each SH automatically.  in mqd_symmetrically_map_cu_mask()
127 	 * Each half of se_mask must be filled only on bits 0-cu_per_sh[se][sh]-1.  in mqd_symmetrically_map_cu_mask()
132 		for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++)  in mqd_symmetrically_map_cu_mask()
133 			cu_per_sh[se][sh] = hweight32(cu_info.cu_bitmap[se % 4][sh + (se / 4)]);  in mqd_symmetrically_map_cu_mask()
136 	 * se_mask programs up to 2 SH in the upper and lower 16 bits.  in mqd_symmetrically_map_cu_mask()
139 	 * Assuming 1 SH/SE, 4 SEs:  in mqd_symmetrically_map_cu_mask()
146 	 * Assuming 2 SH/SE, 4 SEs  in mqd_symmetrically_map_cu_mask()
163 		for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++) {  in mqd_symmetrically_map_cu_mask()
165 				if (cu_per_sh[se][sh] > cu) {  in mqd_symmetrically_map_cu_mask()
167 						se_mask[se] |= 1 << (cu + sh * 16);  in mqd_symmetrically_map_cu_mask()