Lines Matching refs:RREG32_PCIE

1122 	orig = data = RREG32_PCIE(ixPCIE_LC_CNTL);  in vi_enable_aspm()
1146 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); in vi_program_aspm()
1153 orig = data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); in vi_program_aspm()
1160 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL3); in vi_program_aspm()
1165 orig = data = RREG32_PCIE(ixPCIE_P_CNTL); in vi_program_aspm()
1170 data = RREG32_PCIE(ixPCIE_LC_L1_PM_SUBSTATE); in vi_program_aspm()
1185 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL6); in vi_program_aspm()
1190 orig = data = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); in vi_program_aspm()
1232 orig = data = RREG32_PCIE(ixCPM_CONTROL); in vi_program_aspm()
1238 orig = data = RREG32_PCIE(ixPCIE_CONFIG_CNTL); in vi_program_aspm()
1249 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL7); in vi_program_aspm()
1254 orig = data = RREG32_PCIE(ixPCIE_HW_DEBUG); in vi_program_aspm()
1259 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL2); in vi_program_aspm()
1271 data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); in vi_program_aspm()
1272 data1 = RREG32_PCIE(ixPCIE_LC_STATUS1); in vi_program_aspm()
1276 orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); in vi_program_aspm()
1285 orig = data = RREG32_PCIE(ixPCIE_LC_TRAINING_CNTL); in vi_program_aspm()
1403 tmp = RREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK); in vi_get_pcie_usage()
1408 *count0 = RREG32_PCIE(ixPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); in vi_get_pcie_usage()
1409 *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); in vi_get_pcie_usage()
1417 nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK); in vi_get_pcie_replay_count()
1418 nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED); in vi_get_pcie_replay_count()
1784 temp = data = RREG32_PCIE(ixPCIE_CNTL2); in vi_update_bif_medium_grain_light_sleep()
2041 data = RREG32_PCIE(ixPCIE_CNTL2); in vi_common_get_clockgating_state()