Lines Matching refs:wptr

914 	ring->wptr = RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR);  in vcn_v2_0_start_dpg_mode()
916 lower_32_bits(ring->wptr)); in vcn_v2_0_start_dpg_mode()
1072 ring->wptr = RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR); in vcn_v2_0_start()
1074 lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1079 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1080 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1088 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1089 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1230 ring->wptr = 0; in vcn_v2_0_pause_dpg_mode()
1234 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1235 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1240 ring->wptr = 0; in vcn_v2_0_pause_dpg_mode()
1244 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1245 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1354 lower_32_bits(ring->wptr) | 0x80000000); in vcn_v2_0_dec_ring_set_wptr()
1357 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_dec_ring_set_wptr()
1358 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_dec_ring_set_wptr()
1360 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_dec_ring_set_wptr()
1409 WARN_ON(ring->wptr % 2 || count % 2); in vcn_v2_0_dec_ring_insert_nop()
1589 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
1590 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1592 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1596 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
1597 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1599 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1812 adev->vcn.inst->ring_dec.wptr = 0; in vcn_v2_0_start_mmsch()
1817 adev->vcn.inst->ring_enc[i].wptr = 0; in vcn_v2_0_start_mmsch()
1945 ring->wptr = 0; in vcn_v2_0_start_sriov()
1958 ring->wptr = 0; in vcn_v2_0_start_sriov()